| 204c0867 |
1 | ------------------------------------------------------------------------------- |
| 2 | ON Semi CAT24C256 |
| 3 | ------------------------------------------------------------------------------- |
| 4 | |
| 5 | This is a set of example captures of ON Semi CAT24C256 I2C traffic. |
| 6 | |
| 7 | Details: |
| 8 | http://www.onsemi.com/PowerSolutions/product.do?id=CAT24C256 |
| 9 | https://www.onsemi.com/pub/Collateral/CAT24C256-D.PDF |
| 10 | https://github.com/whitequark/Glasgow |
| 11 | |
| 12 | |
| 13 | Logic analyzer setup |
| 14 | -------------------- |
| 15 | |
| 16 | The logic analyzer used was an mcupro Saleae 16 clone (at 2 MHz). |
| 17 | |
| 18 | Probe I2C pin |
| 19 | ------------------- |
| 20 | 0 (black) SCL |
| 21 | 1 (brown) SDA |
| 22 | |
| 23 | |
| 24 | glasgow-firmware-flash.sr |
| 25 | ------------------------- |
| 26 | |
| 27 | This is the I2C communication of the FX2_MEM EEPROM being flashed with |
| 28 | 8051 firmware and then verified on a Glasgow board. Only the changed bytes are |
| 29 | written, which is why there are two read sequences. The uneven pages are |
| 30 | because of the EP0 buffer being limited to 64 bytes. |
| 31 | |
projects / sigrok-dumps.git / blame