projects / sigrok-dumps.git / blame
| Commit | Line | Data |
|---|---|---|
| 547a4b12 HK |
1 | ------------------------------------------------------------------------------- |
| 2 | AVR ISP / Atmel ATmega8L | |
| 3 | ------------------------------------------------------------------------------- | |
| 4 | ||
| 5 | This is a set of example captures of the AVR in-system programming (ISP) | |
| 6 | protocol. The target was a board with an Atmel ATmega8L chip, and another | |
| 7 | microcontroller was used as master for the ISP process. | |
| 8 | ||
| 9 | Details: | |
| 10 | http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-2486-8-bit-AVR-microcontroller-ATmega8_L_datasheet.pdf | |
| 11 | ||
| 12 | ||
| 13 | Logic analyzer setup | |
| 14 | -------------------- | |
| 15 | ||
| 16 | The logic analyzer used was a Saleae Logic (at 4MHz): | |
| 17 | ||
| 18 | Probe AVR ISP header | |
| 19 | ------------------------- | |
| 20 | 5 (green) MOSI | |
| 21 | 6 (blue) CLK | |
| 22 | 7 (violet) MOSI |