Show sampling points in logic traces.

[pulseview.git] / pv / storesession.cpp

diff --git a/pv/storesession.cpp b/pv/storesession.cpp
index 55b199a3380bfee054f1152000c7c87c380b55c9..52a6be34c490fe27cb9bcfb3cf263c5a47b530df 100644 (file)
--- a/pv/storesession.cpp
+++ b/pv/storesession.cpp
@@ -69,7 +69,7 @@ using sigrok::OutputFlag;
 
 namespace pv {
 
-const size_t StoreSession::BlockSize = 1024 * 1024;
+const size_t StoreSession::BlockSize = 10 * 1024 * 1024;
 
 StoreSession::StoreSession(const std::string &file_name,
        const shared_ptr<OutputFormat> &output_format,
@@ -258,8 +258,6 @@ void StoreSession::store_proc(vector< shared_ptr<data::SignalBase> > achannel_li
                                const float *adata =
                                        asegment->get_samples(start_sample_, start_sample_ + packet_len);
 
-                               // The srzip format currently only supports packets with one
-                               // analog channel. See zip_append_analog() in srzip.c
                                auto analog = context->create_analog_packet(
                                        vector<shared_ptr<sigrok::Channel> >{achannel},
                                        (float *)adata, packet_len,