]> sigrok.org Git - pulseview.git/blobdiff - pv/devinst.cpp
LogicSignal: Un-break trigger configuration. (bug #318)
[pulseview.git] / pv / devinst.cpp
index c0b87fe243414bf5167f7af7f49aed527367d124..b28fce08269f4c3f238d01c8fd016e5aecb560ec 100644 (file)
@@ -98,6 +98,7 @@ void DevInst::enable_probe(const sr_probe *probe, bool enable)
        for (const GSList *p = _sdi->probes; p; p = p->next)
                if (probe == p->data) {
                        const_cast<sr_probe*>(probe)->enabled = enable;
+                       config_changed();
                        return;
                }
 
@@ -105,4 +106,17 @@ void DevInst::enable_probe(const sr_probe *probe, bool enable)
        assert(0);
 }
 
+uint64_t DevInst::get_sample_limit()
+{
+       uint64_t sample_limit;
+       GVariant* gvar = get_config(NULL, SR_CONF_LIMIT_SAMPLES);
+       if (gvar != NULL) {
+               sample_limit = g_variant_get_uint64(gvar);
+               g_variant_unref(gvar);
+       } else {
+               sample_limit = 0U;
+       }
+       return sample_limit;
+}
+
 } // pv