sdcard_spi: Define annotation rows.

[libsigrokdecode.git] / decoders / uart / pd.py

diff --git a/decoders/uart/pd.py b/decoders/uart/pd.py
index 051c803418baee787ed22d3e5a494313c22edac3..0c6b839d21cc72abe889064924b7b192f1f057bc 100644 (file)
--- a/decoders/uart/pd.py
+++ b/decoders/uart/pd.py
@@ -77,13 +77,13 @@ class Decoder(srd.Decoder):
     license = 'gplv2+'
     inputs = ['logic']
     outputs = ['uart']
-    probes = [
+    probes = []
+    optional_probes = [
         # Allow specifying only one of the signals, e.g. if only one data
         # direction exists (or is relevant).
         {'id': 'rx', 'name': 'RX', 'desc': 'UART receive line'},
         {'id': 'tx', 'name': 'TX', 'desc': 'UART transmit line'},
     ]
-    optional_probes = []
     options = {
         'baudrate': ['Baud rate', 115200],
         'num_data_bits': ['Data bits', 8], # Valid: 5-9.
@@ -95,13 +95,25 @@ class Decoder(srd.Decoder):
         # TODO: Options to invert the signal(s).
     }
     annotations = [
-        ['rx-data', 'UART RX data'],
-        ['tx-data', 'UART TX data'],
-        ['start-bits', 'UART start bits'],
-        ['parity-bits', 'UART parity bits'],
-        ['stop-bits', 'UART stop bits'],
-        ['warnings', 'Warnings'],
+        ['rx-data', 'RX data'],
+        ['tx-data', 'TX data'],
+        ['rx-start', 'RX start bits'],
+        ['tx-start', 'TX start bits'],
+        ['rx-parity-ok', 'RX parity OK bits'],
+        ['tx-parity-ok', 'TX parity OK bits'],
+        ['rx-parity-err', 'RX parity error bits'],
+        ['tx-parity-err', 'TX parity error bits'],
+        ['rx-stop', 'RX stop bits'],
+        ['tx-stop', 'TX stop bits'],
+        ['rx-warnings', 'RX warnings'],
+        ['tx-warnings', 'TX warnings'],
     ]
+    annotation_rows = (
+        ('rx-data', 'RX', (0, 2, 4, 6, 8)),
+        ('tx-data', 'TX', (1, 3, 5, 7, 9)),
+        ('rx-warnings', 'RX warnings', (10,)),
+        ('tx-warnings', 'TX warnings', (11,)),
+    )
     binary = (
         ('rx', 'RX dump'),
         ('tx', 'TX dump'),
@@ -196,7 +208,7 @@ class Decoder(srd.Decoder):
         self.state[rxtx] = 'GET DATA BITS'
 
         self.putp(['STARTBIT', rxtx, self.startbit[rxtx]])
-        self.putg([2, ['Start bit', 'Start', 'S']])
+        self.putg([rxtx + 2, ['Start bit', 'Start', 'S']])
 
     def get_data_bits(self, rxtx, signal):
         # Skip samples until we're in the middle of the desired data bit.
@@ -263,11 +275,11 @@ class Decoder(srd.Decoder):
         if parity_ok(self.options['parity_type'], self.paritybit[rxtx],
                      self.databyte[rxtx], self.options['num_data_bits']):
             self.putp(['PARITYBIT', rxtx, self.paritybit[rxtx]])
-            self.putg([3, ['Parity bit', 'Parity', 'P']])
+            self.putg([rxtx + 4, ['Parity bit', 'Parity', 'P']])
         else:
             # TODO: Return expected/actual parity values.
             self.putp(['PARITY ERROR', rxtx, (0, 1)]) # FIXME: Dummy tuple...
-            self.putg([5, ['Parity error', 'Parity err', 'PE']])
+            self.putg([rxtx + 6, ['Parity error', 'Parity err', 'PE']])
 
     # TODO: Currently only supports 1 stop bit.
     def get_stop_bits(self, rxtx, signal):
@@ -282,18 +294,17 @@ class Decoder(srd.Decoder):
         # Stop bits must be 1. If not, we report an error.
         if self.stopbit1[rxtx] != 1:
             self.putp(['INVALID STOPBIT', rxtx, self.stopbit1[rxtx]])
-            self.putg([5, ['Frame error', 'Frame err', 'FE']])
+            self.putg([rxtx + 8, ['Frame error', 'Frame err', 'FE']])
             # TODO: Abort? Ignore the frame? Other?
 
         self.state[rxtx] = 'WAIT FOR START BIT'
 
         self.putp(['STOPBIT', rxtx, self.stopbit1[rxtx]])
-        self.putg([4, ['Stop bit', 'Stop', 'T']])
+        self.putg([rxtx + 4, ['Stop bit', 'Stop', 'T']])
 
     def decode(self, ss, es, data):
         if self.samplerate is None:
             raise Exception("Cannot decode without samplerate.")
-        # TODO: Either RX or TX could be omitted (optional probe).
         for (self.samplenum, pins) in data:
 
             # Note: Ignoring identical samples here for performance reasons
@@ -302,8 +313,17 @@ class Decoder(srd.Decoder):
             #     continue
             self.oldpins, (rx, tx) = pins, pins
 
+            # Either RX or TX (but not both) can be omitted.
+            has_pin = [rx in (0, 1), tx in (0, 1)]
+            if has_pin == [False, False]:
+                raise Exception('Either TX or RX (or both) pins required.')
+
             # State machine.
             for rxtx in (RX, TX):
+                # Don't try to handle RX (or TX) if not supplied.
+                if not has_pin[rxtx]:
+                    continue
+
                 signal = rx if (rxtx == RX) else tx
 
                 if self.state[rxtx] == 'WAIT FOR START BIT':