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scpi-pps: Rigol DP71x: Make OVP/OCP threshold listable.
[libsigrok.git] / src / hardware / scpi-pps / profiles.c
1 /*
2  * This file is part of the libsigrok project.
3  *
4  * Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
5  * Copyright (C) 2015 Google, Inc.
6  * (Written by Alexandru Gagniuc <mrnuke@google.com> for Google, Inc.)
7  * Copyright (C) 2017 Frank Stettner <frank-stettner@gmx.net>
8  *
9  * This program is free software: you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License as published by
11  * the Free Software Foundation, either version 3 of the License, or
12  * (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
21  */
22
23 #include <config.h>
24 #include <string.h>
25 #include <strings.h>
26 #include "protocol.h"
27
28 #define CH_IDX(x) (1 << x)
29 #define FREQ_DC_ONLY {0, 0, 0, 0, 0}
30 #define NO_OVP_LIMITS {0, 0, 0, 0, 0}
31 #define NO_OCP_LIMITS {0, 0, 0, 0, 0}
32
33 /* Agilent/Keysight N5700A series */
34 static const uint32_t agilent_n5700a_devopts[] = {
35         SR_CONF_CONTINUOUS,
36 };
37
38 static const uint32_t agilent_n5700a_devopts_cg[] = {
39         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
40         SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
41         SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
42         SR_CONF_VOLTAGE | SR_CONF_GET,
43         SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
44         SR_CONF_CURRENT | SR_CONF_GET,
45         SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
46 };
47
48 static const struct channel_group_spec agilent_n5700a_cg[] = {
49         { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
50 };
51
52 static const struct channel_spec agilent_n5767a_ch[] = {
53         { "1", { 0, 60, 0.0072, 3, 4 }, { 0, 25, 0.003, 3, 4 }, { 0, 1500 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
54 };
55
56 static const struct channel_spec agilent_n5763a_ch[] = {
57         { "1", { 0, 12.5, 0.0015, 3, 4 }, { 0, 120, 0.0144, 3, 4 }, { 0, 1500 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
58 };
59
60 /*
61  * TODO: OVER_CURRENT_PROTECTION_ACTIVE status can be determined by the OC bit
62  * in STAT:QUES:EVEN?, but this is not implemented.
63  */
64 static const struct scpi_command agilent_n5700a_cmd[] = {
65         { SCPI_CMD_REMOTE, "SYST:COMM:RLST REM" },
66         { SCPI_CMD_LOCAL, "SYST:COMM:RLST LOC" },
67         { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
68         { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" },
69         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
70         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
71         { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
72         { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
73         { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP:STAT?" },
74         { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
75         { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
76         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT?" },
77         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT %.6f" },
78         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":CURR:PROT:STAT?" },
79         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":CURR:PROT:STAT ON?"},
80         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":CURR:PROT:STAT OFF?"},
81         /* Current limit (CC mode) and OCP are set using the same command. */
82         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR?" },
83         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR %.6f" },
84         ALL_ZERO
85 };
86
87 /* Chroma 61600 series AC source */
88 static const uint32_t chroma_61604_devopts[] = {
89         SR_CONF_CONTINUOUS,
90 };
91
92 static const uint32_t chroma_61604_devopts_cg[] = {
93         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
94         SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
95         SR_CONF_VOLTAGE | SR_CONF_GET,
96         SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
97         SR_CONF_OUTPUT_FREQUENCY | SR_CONF_GET,
98         SR_CONF_OUTPUT_FREQUENCY_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
99         SR_CONF_CURRENT | SR_CONF_GET,
100         SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
101 };
102
103 static const struct channel_spec chroma_61604_ch[] = {
104         { "1", { 0, 300, 0.1, 1, 1 }, { 0, 16, 0.1, 2, 2 }, { 0, 2000, 0, 1, 1 }, { 1.0, 1000.0, 0.01 }, NO_OVP_LIMITS, NO_OCP_LIMITS },
105 };
106
107 static const struct channel_group_spec chroma_61604_cg[] = {
108         { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
109 };
110
111 static const struct scpi_command chroma_61604_cmd[] = {
112         { SCPI_CMD_REMOTE, "SYST:REM" },
113         { SCPI_CMD_LOCAL, "SYST:LOC" },
114         { SCPI_CMD_GET_MEAS_VOLTAGE, ":FETC:VOLT:ACDC?" },
115         { SCPI_CMD_GET_MEAS_FREQUENCY, ":FETC:FREQ?" },
116         { SCPI_CMD_GET_MEAS_CURRENT, ":FETC:CURR:AC?" },
117         { SCPI_CMD_GET_MEAS_POWER, ":FETC:POW:AC?" },
118         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT:AC?" },
119         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT:AC %.1f" },
120         { SCPI_CMD_GET_FREQUENCY_TARGET, ":SOUR:FREQ?" },
121         { SCPI_CMD_SET_FREQUENCY_TARGET, ":SOUR:FREQ %.2f" },
122         { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
123         { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
124         { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
125         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC?" },
126         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC %.1f" },
127         /* This is not a current limit mode. It is overcurrent protection. */
128         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM?" },
129         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM %.2f" },
130         ALL_ZERO
131 };
132
133 /* Chroma 62000 series DC source */
134 static const uint32_t chroma_62000_devopts[] = {
135         SR_CONF_CONTINUOUS,
136 };
137
138 static const uint32_t chroma_62000_devopts_cg[] = {
139         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
140         SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
141         SR_CONF_VOLTAGE | SR_CONF_GET,
142         SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
143         SR_CONF_CURRENT | SR_CONF_GET,
144         SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
145         SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
146 };
147
148 static const struct channel_group_spec chroma_62000_cg[] = {
149         { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
150 };
151
152 static const struct scpi_command chroma_62000_cmd[] = {
153         { SCPI_CMD_REMOTE, ":CONF:REM ON" },
154         { SCPI_CMD_LOCAL, ":CONF:REM OFF" },
155         { SCPI_CMD_BEEPER, ":CONF:BEEP?" },
156         { SCPI_CMD_BEEPER_ENABLE, ":CONF:BEEP ON" },
157         { SCPI_CMD_BEEPER_DISABLE, ":CONF:BEEP OFF" },
158         { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
159         { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
160         { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POW?" },
161         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
162         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.2f" },
163         { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
164         { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
165         { SCPI_CMD_GET_OUTPUT_ENABLED, ":CONF:OUTP?" },
166         { SCPI_CMD_SET_OUTPUT_ENABLE, ":CONF:OUTP ON" },
167         { SCPI_CMD_SET_OUTPUT_DISABLE, ":CONF:OUTP OFF" },
168         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH?" },
169         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH %.6f" },
170         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH?" },
171         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH %.6f" },
172         ALL_ZERO
173 };
174
175 static int chroma_62000p_probe_channels(struct sr_dev_inst *sdi,
176                 struct sr_scpi_hw_info *hw_info,
177                 struct channel_spec **channels, unsigned int *num_channels,
178                 struct channel_group_spec **channel_groups,
179                 unsigned int *num_channel_groups)
180 {
181         unsigned int volts, amps, watts;
182         struct channel_spec *channel;
183
184         (void)sdi;
185
186         sscanf(hw_info->model, "620%uP-%u-%u", &watts, &volts, &amps);
187         watts *= 100;
188         sr_dbg("Found device rated for %d V, %d A and %d W", volts, amps, watts);
189
190         if (volts > 600) {
191                 sr_err("Probed max voltage of %u V is out of spec.", volts);
192                 return SR_ERR_BUG;
193         }
194
195         if (amps > 120) {
196                 sr_err("Probed max current of %u A is out of spec.", amps);
197                 return SR_ERR_BUG;
198         }
199
200         if (watts > 5000) {
201                 sr_err("Probed max power of %u W is out of spec.", watts);
202                 return SR_ERR_BUG;
203         }
204
205         channel = g_malloc0(sizeof(struct channel_spec));
206         channel->name = "1";
207         channel->voltage[0] = channel->current[0] = channel->power[0] = 0.0;
208         channel->voltage[1] = volts;
209         channel->current[1] = amps;
210         channel->power[1]   = watts;
211         channel->voltage[2] = channel->current[2] = 0.01;
212         channel->voltage[3] = channel->voltage[4] = 3;
213         channel->current[3] = channel->current[4] = 4;
214         *channels = channel;
215         *num_channels = 1;
216
217         *channel_groups = g_malloc(sizeof(struct channel_group_spec));
218         **channel_groups = chroma_62000_cg[0];
219         *num_channel_groups = 1;
220
221         return SR_OK;
222 }
223
224 /* Rigol DP700 series */
225 static const uint32_t rigol_dp700_devopts[] = {
226         SR_CONF_CONTINUOUS,
227 };
228
229 static const uint32_t rigol_dp700_devopts_cg[] = {
230         SR_CONF_REGULATION | SR_CONF_GET,
231         SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
232         SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
233         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
234         SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
235         SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
236         SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
237         SR_CONF_VOLTAGE | SR_CONF_GET,
238         SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
239         SR_CONF_CURRENT | SR_CONF_GET,
240         SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
241         SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
242 };
243
244 static const struct channel_spec rigol_dp711_ch[] = {
245         { "1", { 0, 30, 0.01, 3, 3 }, { 0, 5, 0.01, 3, 3 }, { 0, 150, 0, 3, 3 }, FREQ_DC_ONLY, { 0.01, 33, 0.01}, { 0.01, 5.5, 0.01 } },
246 };
247
248 static const struct channel_spec rigol_dp712_ch[] = {
249         { "1", { 0, 50, 0.01, 3, 3 }, { 0, 3, 0.01, 3, 3 }, { 0, 150, 0, 3, 3 }, FREQ_DC_ONLY, { 0.01, 55, 0.01}, { 0.01, 3.3, 0.01 } },
250 };
251
252 static const struct channel_group_spec rigol_dp700_cg[] = {
253         { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
254 };
255
256 /* Same as the DP800 series, except for the missing :SYST:OTP* commands. */
257 static const struct scpi_command rigol_dp700_cmd[] = {
258         { SCPI_CMD_REMOTE, "SYST:REMOTE" },
259         { SCPI_CMD_LOCAL, "SYST:LOCAL" },
260         { SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" },
261         { SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" },
262         { SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" },
263         { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
264         { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
265         { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
266         { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" },
267         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
268         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
269         { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
270         { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
271         { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
272         { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
273         { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
274         { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
275         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" },
276         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" },
277         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" },
278         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" },
279         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" },
280         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" },
281         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" },
282         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" },
283         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" },
284         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" },
285         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" },
286         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" },
287         ALL_ZERO
288 };
289
290 /* Rigol DP800 series */
291 static const uint32_t rigol_dp800_devopts[] = {
292         SR_CONF_CONTINUOUS,
293         SR_CONF_OVER_TEMPERATURE_PROTECTION | SR_CONF_GET | SR_CONF_SET,
294 };
295
296 static const uint32_t rigol_dp800_devopts_cg[] = {
297         SR_CONF_REGULATION | SR_CONF_GET,
298         SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
299         SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
300         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
301         SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
302         SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
303         SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
304         SR_CONF_VOLTAGE | SR_CONF_GET,
305         SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
306         SR_CONF_CURRENT | SR_CONF_GET,
307         SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
308         SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
309 };
310
311 static const struct channel_spec rigol_dp821a_ch[] = {
312         { "1", { 0, 60, 0.001, 3, 3 }, { 0, 1, 0.0001, 4, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
313         { "2", { 0,  8, 0.001, 3, 3 }, { 0, 10, 0.001, 3, 3 }, { 0, 80, 0, 3, 3 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
314 };
315
316 static const struct channel_spec rigol_dp831_ch[] = {
317         { "1", { 0,   8, 0.001, 3, 4 }, { 0, 5, 0.0003, 3, 4 }, { 0, 40, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
318         { "2", { 0,  30, 0.001, 3, 4 }, { 0, 2, 0.0001, 3, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
319         { "3", { 0, -30, 0.001, 3, 4 }, { 0, 2, 0.0001, 3, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
320 };
321
322 static const struct channel_spec rigol_dp832_ch[] = {
323         { "1", { 0, 30, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
324         { "2", { 0, 30, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
325         { "3", { 0,  5, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
326 };
327
328 static const struct channel_group_spec rigol_dp820_cg[] = {
329         { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
330         { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
331 };
332
333 static const struct channel_group_spec rigol_dp830_cg[] = {
334         { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
335         { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
336         { "3", CH_IDX(2), PPS_OVP | PPS_OCP },
337 };
338
339 static const struct scpi_command rigol_dp800_cmd[] = {
340         { SCPI_CMD_REMOTE, "SYST:REMOTE" },
341         { SCPI_CMD_LOCAL, "SYST:LOCAL" },
342         { SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" },
343         { SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" },
344         { SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" },
345         { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
346         { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
347         { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
348         { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" },
349         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
350         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
351         { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
352         { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
353         { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
354         { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
355         { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
356         { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
357         { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" },
358         { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_ENABLE, ":SYST:OTP ON" },
359         { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_DISABLE, ":SYST:OTP OFF" },
360         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" },
361         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" },
362         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" },
363         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" },
364         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" },
365         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" },
366         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" },
367         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" },
368         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" },
369         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" },
370         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" },
371         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" },
372         ALL_ZERO
373 };
374
375 /* HP 663xx series */
376 static const uint32_t hp_6630a_devopts[] = {
377         SR_CONF_CONTINUOUS,
378 };
379
380 static const uint32_t hp_6630a_devopts_cg[] = {
381         SR_CONF_ENABLED | SR_CONF_SET,
382         SR_CONF_VOLTAGE | SR_CONF_GET,
383         SR_CONF_CURRENT | SR_CONF_GET,
384         SR_CONF_VOLTAGE_TARGET | SR_CONF_SET | SR_CONF_LIST,
385         SR_CONF_CURRENT_LIMIT | SR_CONF_SET | SR_CONF_LIST,
386         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_SET | SR_CONF_LIST,
387         SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_SET,
388 };
389
390 static const uint32_t hp_6630b_devopts[] = {
391         SR_CONF_CONTINUOUS,
392 };
393
394 static const uint32_t hp_6630b_devopts_cg[] = {
395         SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
396         SR_CONF_VOLTAGE | SR_CONF_GET,
397         SR_CONF_CURRENT | SR_CONF_GET,
398         SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
399         SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
400         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
401         SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
402 };
403
404 static const struct channel_spec hp_6633a_ch[] = {
405         { "1", { 0, 51.188, 0.0125, 3, 4 }, { 0, 2.0475, 0.0005, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 55, 0.25 }, NO_OCP_LIMITS },
406 };
407
408 static const struct channel_spec hp_6631b_ch[] = {
409         { "1", { 0, 8.19, 0.002, 3, 4 }, { 0, 10.237, 0.00263, 4, 5 }, { 0, 83.84103 }, FREQ_DC_ONLY, { 0, 12, 0.06 }, NO_OCP_LIMITS },
410 };
411
412 static const struct channel_spec hp_6632b_ch[] = {
413         { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 5.1188, 0.00132, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 22, 0.1 }, NO_OCP_LIMITS },
414 };
415
416 static const struct channel_spec hp_66332a_ch[] = {
417         { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 5.1188, 0.00132, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 22, 0.1 }, NO_OCP_LIMITS },
418 };
419
420 static const struct channel_spec hp_6633b_ch[] = {
421         { "1", { 0, 51.188, 0.0125, 3, 4 }, { 0, 2.0475, 0.000526, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 55, 0.25 }, NO_OCP_LIMITS },
422 };
423
424 static const struct channel_spec hp_6634b_ch[] = {
425         { "1", { 0, 102.38, 0.025, 3, 4 }, { 0, 1.0238, 0.000263, 4, 5 }, { 0, 104.81664 }, FREQ_DC_ONLY, { 0, 110, 0.5 }, NO_OCP_LIMITS },
426 };
427
428 static const struct channel_group_spec hp_663xx_cg[] = {
429         { "1", CH_IDX(0), 0 },
430 };
431
432 static const struct scpi_command hp_6630a_cmd[] = {
433         { SCPI_CMD_SET_OUTPUT_ENABLE, "OUT 1" },
434         { SCPI_CMD_SET_OUTPUT_DISABLE, "OUT 0" },
435         { SCPI_CMD_GET_MEAS_VOLTAGE, "VOUT?" },
436         { SCPI_CMD_GET_MEAS_CURRENT, "IOUT?" },
437         { SCPI_CMD_SET_VOLTAGE_TARGET, "VSET %.4f" },
438         { SCPI_CMD_SET_CURRENT_LIMIT, "ISET %.4f" },
439         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, "OCP 1" },
440         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, "OCP 0" },
441         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "OVSET %.4f" },
442         ALL_ZERO
443 };
444
445 static const struct scpi_command hp_6630b_cmd[] = {
446         { SCPI_CMD_REMOTE, "SYST:REM" },
447         { SCPI_CMD_LOCAL, "SYST:LOC" },
448         { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" },
449         { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" },
450         { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" },
451         { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
452         { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
453         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
454         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
455         { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
456         { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
457         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":CURR:PROT:STAT?" },
458         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":CURR:PROT:STAT 1" },
459         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":CURR:PROT:STAT 0" },
460         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT?" },
461         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT %.6f" },
462         ALL_ZERO
463 };
464
465 /* Philips/Fluke PM2800 series */
466 static const uint32_t philips_pm2800_devopts[] = {
467         SR_CONF_CONTINUOUS,
468 };
469
470 static const uint32_t philips_pm2800_devopts_cg[] = {
471         SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
472         SR_CONF_VOLTAGE | SR_CONF_GET,
473         SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
474         SR_CONF_CURRENT | SR_CONF_GET,
475         SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
476         SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
477         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
478         SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
479         SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
480         SR_CONF_REGULATION | SR_CONF_GET,
481 };
482
483 enum philips_pm2800_modules {
484         PM2800_MOD_30V_10A = 1,
485         PM2800_MOD_60V_5A,
486         PM2800_MOD_60V_10A,
487         PM2800_MOD_8V_15A,
488         PM2800_MOD_60V_2A,
489         PM2800_MOD_120V_1A,
490 };
491
492 static const struct philips_pm2800_module_spec {
493         /* Min, max, programming resolution. */
494         double voltage[5];
495         double current[5];
496         double power[5];
497 } philips_pm2800_module_specs[] = {
498         /* Autoranging modules. */
499         [PM2800_MOD_30V_10A] = { { 0, 30, 0.0075, 2, 4 }, { 0, 10, 0.0025, 2, 4 }, { 0, 60 } },
500         [PM2800_MOD_60V_5A] = { { 0, 60, 0.015, 2, 3 }, { 0, 5, 0.00125, 2, 5 }, { 0, 60 } },
501         [PM2800_MOD_60V_10A] = { { 0, 60, 0.015, 2, 3 }, { 0, 10, 0.0025, 2, 5 }, { 0, 120 } },
502         /* Linear modules. */
503         [PM2800_MOD_8V_15A] = { { 0, 8, 0.002, 3, 3 }, { -15, 15, 0.00375, 3, 5 }, { 0, 120 } },
504         [PM2800_MOD_60V_2A] = { { 0, 60, 0.015, 2, 3 }, { -2, 2, 0.0005, 3, 4 }, { 0, 120 } },
505         [PM2800_MOD_120V_1A] = { { 0, 120, 0.030, 2, 2 }, { -1, 1, 0.00025, 3, 5 }, { 0, 120 } },
506 };
507
508 static const struct philips_pm2800_model {
509         unsigned int chassis;
510         unsigned int num_modules;
511         unsigned int set;
512         unsigned int modules[3];
513 } philips_pm2800_matrix[] = {
514         /* Autoranging chassis. */
515         { 1, 1, 0, { PM2800_MOD_30V_10A, 0, 0 } },
516         { 1, 1, 1, { PM2800_MOD_60V_5A, 0, 0 } },
517         { 1, 2, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, 0 } },
518         { 1, 2, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, 0 } },
519         { 1, 2, 2, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, 0 } },
520         { 1, 2, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_10A, 0 } },
521         { 1, 2, 4, { PM2800_MOD_60V_5A, PM2800_MOD_60V_10A, 0 } },
522         { 1, 3, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_30V_10A } },
523         { 1, 3, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
524         { 1, 3, 2, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_60V_5A } },
525         { 1, 3, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
526         /* Linear chassis. */
527         { 3, 1, 0, { PM2800_MOD_60V_2A, 0, 0 } },
528         { 3, 1, 1, { PM2800_MOD_120V_1A, 0, 0 } },
529         { 3, 1, 2, { PM2800_MOD_8V_15A, 0, 0 } },
530         { 3, 2, 0, { PM2800_MOD_60V_2A, 0, 0 } },
531         { 3, 2, 1, { PM2800_MOD_120V_1A, 0, 0 } },
532         { 3, 2, 2, { PM2800_MOD_60V_2A, PM2800_MOD_120V_1A, 0 } },
533         { 3, 2, 3, { PM2800_MOD_8V_15A, PM2800_MOD_8V_15A, 0 } },
534 };
535
536 static const char *philips_pm2800_names[] = { "1", "2", "3" };
537
538 static int philips_pm2800_probe_channels(struct sr_dev_inst *sdi,
539                 struct sr_scpi_hw_info *hw_info,
540                 struct channel_spec **channels, unsigned int *num_channels,
541                 struct channel_group_spec **channel_groups, unsigned int *num_channel_groups)
542 {
543         const struct philips_pm2800_model *model;
544         const struct philips_pm2800_module_spec *spec;
545         unsigned int chassis, num_modules, set, module, m, i;
546
547         (void)sdi;
548
549         /*
550          * The model number as reported by *IDN? looks like e.g. PM2813/11,
551          * Where "PM28" is fixed, followed by the chassis code (1 = autoranging,
552          * 3 = linear series) and the number of modules: 1-3 for autoranging,
553          * 1-2 for linear.
554          * After the slash, the first digit denotes the module set. The
555          * digit after that denotes front (5) or rear (1) binding posts.
556          */
557         chassis = hw_info->model[4] - 0x30;
558         num_modules = hw_info->model[5] - 0x30;
559         set = hw_info->model[7] - 0x30;
560         for (m = 0; m < ARRAY_SIZE(philips_pm2800_matrix); m++) {
561                 model = &philips_pm2800_matrix[m];
562                 if (model->chassis == chassis && model->num_modules == num_modules
563                                 && model->set == set)
564                         break;
565         }
566         if (m == ARRAY_SIZE(philips_pm2800_matrix)) {
567                 sr_dbg("Model %s not found in matrix.", hw_info->model);
568                 return SR_ERR;
569         }
570
571         sr_dbg("Found %d output channel%s:", num_modules, num_modules > 1 ? "s" : "");
572         *channels = g_malloc0(sizeof(struct channel_spec) * num_modules);
573         *channel_groups = g_malloc0(sizeof(struct channel_group_spec) * num_modules);
574         for (i = 0; i < num_modules; i++) {
575                 module = model->modules[i];
576                 spec = &philips_pm2800_module_specs[module];
577                 sr_dbg("output %d: %.0f - %.0fV, %.0f - %.0fA, %.0f - %.0fW", i + 1,
578                                 spec->voltage[0], spec->voltage[1],
579                                 spec->current[0], spec->current[1],
580                                 spec->power[0], spec->power[1]);
581                 (*channels)[i].name = (char *)philips_pm2800_names[i];
582                 memcpy(&((*channels)[i].voltage), spec, sizeof(double) * 15);
583                 (*channel_groups)[i].name = (char *)philips_pm2800_names[i];
584                 (*channel_groups)[i].channel_index_mask = 1 << i;
585                 (*channel_groups)[i].features = PPS_OTP | PPS_OVP | PPS_OCP;
586         }
587         *num_channels = *num_channel_groups = num_modules;
588
589         return SR_OK;
590 }
591
592 static const struct scpi_command philips_pm2800_cmd[] = {
593         { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
594         { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
595         { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
596         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
597         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
598         { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
599         { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
600         { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
601         { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
602         { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
603         { SCPI_CMD_GET_OUTPUT_REGULATION, ":SOUR:FUNC:MODE?" },
604         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":SOUR:VOLT:PROT:TRIP?" },
605         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV?" },
606         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV %.6f" },
607         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":SOUR:CURR:PROT:STAT?" },
608         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":SOUR:CURR:PROT:STAT ON" },
609         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":SOUR:CURR:PROT:STAT OFF" },
610         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":SOUR:CURR:PROT:TRIP?" },
611         ALL_ZERO
612 };
613
614 static const uint32_t rs_hmc8043_devopts[] = {
615         SR_CONF_CONTINUOUS,
616 };
617
618 static const uint32_t rs_hmc8043_devopts_cg[] = {
619         SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
620         SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
621         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
622         SR_CONF_VOLTAGE | SR_CONF_GET,
623         SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
624         SR_CONF_CURRENT | SR_CONF_GET,
625         SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
626         SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
627 };
628
629 static const struct channel_spec rs_hmc8043_ch[] = {
630         { "1", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
631         { "2", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
632         { "3", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
633 };
634
635 static const struct channel_group_spec rs_hmc8043_cg[] = {
636         { "1", CH_IDX(0), PPS_OVP },
637         { "2", CH_IDX(1), PPS_OVP },
638         { "3", CH_IDX(2), PPS_OVP },
639 };
640
641 static const struct scpi_command rs_hmc8043_cmd[] = {
642         { SCPI_CMD_SELECT_CHANNEL, "INST:NSEL %s" },
643         { SCPI_CMD_GET_MEAS_VOLTAGE, "MEAS:VOLT?" },
644         { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" },
645         { SCPI_CMD_GET_VOLTAGE_TARGET, "VOLT?" },
646         { SCPI_CMD_SET_VOLTAGE_TARGET, "VOLT %.6f" },
647         { SCPI_CMD_GET_CURRENT_LIMIT, "CURR?" },
648         { SCPI_CMD_SET_CURRENT_LIMIT, "CURR %.6f" },
649         { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP?" },
650         { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP ON" },
651         { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP OFF" },
652         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, "VOLT:PROT:TRIP?" },
653         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:PROT:LEV?" },
654         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:PROT:LEV %.6f" },
655         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, "VOLT:PROT:STAT?" },
656         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, "VOLT:PROT:STAT ON" },
657         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, "VOLT:PROT:STAT OFF" },
658         ALL_ZERO
659 };
660
661 SR_PRIV const struct scpi_pps pps_profiles[] = {
662         /* Agilent N5763A */
663         { "Agilent", "N5763A", 0,
664                 ARRAY_AND_SIZE(agilent_n5700a_devopts),
665                 ARRAY_AND_SIZE(agilent_n5700a_devopts_cg),
666                 ARRAY_AND_SIZE(agilent_n5763a_ch),
667                 ARRAY_AND_SIZE(agilent_n5700a_cg),
668                 agilent_n5700a_cmd,
669                 .probe_channels = NULL,
670         },
671
672         /* Agilent N5767A */
673         { "Agilent", "N5767A", 0,
674                 ARRAY_AND_SIZE(agilent_n5700a_devopts),
675                 ARRAY_AND_SIZE(agilent_n5700a_devopts_cg),
676                 ARRAY_AND_SIZE(agilent_n5767a_ch),
677                 ARRAY_AND_SIZE(agilent_n5700a_cg),
678                 agilent_n5700a_cmd,
679                 .probe_channels = NULL,
680         },
681
682         /* Chroma 61604 */
683         { "Chroma", "61604", 0,
684                 ARRAY_AND_SIZE(chroma_61604_devopts),
685                 ARRAY_AND_SIZE(chroma_61604_devopts_cg),
686                 ARRAY_AND_SIZE(chroma_61604_ch),
687                 ARRAY_AND_SIZE(chroma_61604_cg),
688                 chroma_61604_cmd,
689                 .probe_channels = NULL,
690         },
691
692         /* Chroma 62000 series */
693         { "Chroma", "620[0-9]{2}P-[0-9]{2,3}-[0-9]{1,3}", 0,
694                 ARRAY_AND_SIZE(chroma_62000_devopts),
695                 ARRAY_AND_SIZE(chroma_62000_devopts_cg),
696                 NULL, 0,
697                 NULL, 0,
698                 chroma_62000_cmd,
699                 .probe_channels = chroma_62000p_probe_channels,
700         },
701
702         /* HP 6633A */
703         { "HP", "6633A", 0,
704                 ARRAY_AND_SIZE(hp_6630a_devopts),
705                 ARRAY_AND_SIZE(hp_6630a_devopts_cg),
706                 ARRAY_AND_SIZE(hp_6633a_ch),
707                 ARRAY_AND_SIZE(hp_663xx_cg),
708                 hp_6630a_cmd,
709                 .probe_channels = NULL,
710         },
711
712         /* HP 6631B */
713         { "HP", "6631B", PPS_OVP | PPS_OCP | PPS_OTP,
714                 ARRAY_AND_SIZE(hp_6630b_devopts),
715                 ARRAY_AND_SIZE(hp_6630b_devopts_cg),
716                 ARRAY_AND_SIZE(hp_6631b_ch),
717                 ARRAY_AND_SIZE(hp_663xx_cg),
718                 hp_6630b_cmd,
719                 .probe_channels = NULL,
720         },
721
722         /* HP 6632B */
723         { "HP", "6632B", PPS_OVP | PPS_OCP | PPS_OTP,
724                 ARRAY_AND_SIZE(hp_6630b_devopts),
725                 ARRAY_AND_SIZE(hp_6630b_devopts_cg),
726                 ARRAY_AND_SIZE(hp_6632b_ch),
727                 ARRAY_AND_SIZE(hp_663xx_cg),
728                 hp_6630b_cmd,
729                 .probe_channels = NULL,
730         },
731
732         /* HP 66332A */
733         { "HP", "66332A", PPS_OVP | PPS_OCP | PPS_OTP,
734                 ARRAY_AND_SIZE(hp_6630b_devopts),
735                 ARRAY_AND_SIZE(hp_6630b_devopts_cg),
736                 ARRAY_AND_SIZE(hp_66332a_ch),
737                 ARRAY_AND_SIZE(hp_663xx_cg),
738                 hp_6630b_cmd,
739                 .probe_channels = NULL,
740         },
741
742         /* HP 6633B */
743         { "HP", "6633B", PPS_OVP | PPS_OCP | PPS_OTP,
744                 ARRAY_AND_SIZE(hp_6630b_devopts),
745                 ARRAY_AND_SIZE(hp_6630b_devopts_cg),
746                 ARRAY_AND_SIZE(hp_6633b_ch),
747                 ARRAY_AND_SIZE(hp_663xx_cg),
748                 hp_6630b_cmd,
749                 .probe_channels = NULL,
750         },
751
752         /* HP 6634B */
753         { "HP", "6634B", PPS_OVP | PPS_OCP | PPS_OTP,
754                 ARRAY_AND_SIZE(hp_6630b_devopts),
755                 ARRAY_AND_SIZE(hp_6630b_devopts_cg),
756                 ARRAY_AND_SIZE(hp_6634b_ch),
757                 ARRAY_AND_SIZE(hp_663xx_cg),
758                 hp_6630b_cmd,
759                 .probe_channels = NULL,
760         },
761
762         /* Rigol DP700 series */
763         { "Rigol", "^DP711$", 0,
764                 ARRAY_AND_SIZE(rigol_dp700_devopts),
765                 ARRAY_AND_SIZE(rigol_dp700_devopts_cg),
766                 ARRAY_AND_SIZE(rigol_dp711_ch),
767                 ARRAY_AND_SIZE(rigol_dp700_cg),
768                 rigol_dp700_cmd,
769                 .probe_channels = NULL,
770         },
771         { "Rigol", "^DP712$", 0,
772                 ARRAY_AND_SIZE(rigol_dp700_devopts),
773                 ARRAY_AND_SIZE(rigol_dp700_devopts_cg),
774                 ARRAY_AND_SIZE(rigol_dp712_ch),
775                 ARRAY_AND_SIZE(rigol_dp700_cg),
776                 rigol_dp700_cmd,
777                 .probe_channels = NULL,
778         },
779
780         /* Rigol DP800 series */
781         { "Rigol", "^DP821A$", PPS_OTP,
782                 ARRAY_AND_SIZE(rigol_dp800_devopts),
783                 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
784                 ARRAY_AND_SIZE(rigol_dp821a_ch),
785                 ARRAY_AND_SIZE(rigol_dp820_cg),
786                 rigol_dp800_cmd,
787                 .probe_channels = NULL,
788         },
789         { "Rigol", "^DP831A$", PPS_OTP,
790                 ARRAY_AND_SIZE(rigol_dp800_devopts),
791                 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
792                 ARRAY_AND_SIZE(rigol_dp831_ch),
793                 ARRAY_AND_SIZE(rigol_dp830_cg),
794                 rigol_dp800_cmd,
795                 .probe_channels = NULL,
796         },
797         { "Rigol", "^(DP832|DP832A)$", PPS_OTP,
798                 ARRAY_AND_SIZE(rigol_dp800_devopts),
799                 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
800                 ARRAY_AND_SIZE(rigol_dp832_ch),
801                 ARRAY_AND_SIZE(rigol_dp830_cg),
802                 rigol_dp800_cmd,
803                 .probe_channels = NULL,
804         },
805
806         /* Philips/Fluke PM2800 series */
807         { "Philips", "^PM28[13][123]/[01234]{1,2}$", 0,
808                 ARRAY_AND_SIZE(philips_pm2800_devopts),
809                 ARRAY_AND_SIZE(philips_pm2800_devopts_cg),
810                 NULL, 0,
811                 NULL, 0,
812                 philips_pm2800_cmd,
813                 philips_pm2800_probe_channels,
814         },
815
816         /* Rohde & Schwarz HMC8043 */
817         { "Rohde&Schwarz", "HMC8043", 0,
818                 ARRAY_AND_SIZE(rs_hmc8043_devopts),
819                 ARRAY_AND_SIZE(rs_hmc8043_devopts_cg),
820                 ARRAY_AND_SIZE(rs_hmc8043_ch),
821                 ARRAY_AND_SIZE(rs_hmc8043_cg),
822                 rs_hmc8043_cmd,
823                 .probe_channels = NULL,
824         },
825 };
826
827 SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles);