src/hardware/scpi-pps/profiles.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
   5  * Copyright (C) 2015 Google, Inc.
   6  * (Written by Alexandru Gagniuc <mrnuke@google.com> for Google, Inc.)
   7  * Copyright (C) 2017,2019 Frank Stettner <frank-stettner@gmx.net>
   8  *
   9  * This program is free software: you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation, either version 3 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  21  */
  22
  23 #include <config.h>
  24 #include <string.h>
  25 #include <strings.h>
  26 #include "protocol.h"
  27
  28 #define CH_IDX(x) (1 << x)
  29 #define FREQ_DC_ONLY {0, 0, 0, 0, 0}
  30 #define NO_OVP_LIMITS {0, 0, 0, 0, 0}
  31 #define NO_OCP_LIMITS {0, 0, 0, 0, 0}
  32 #define NO_OCP_DELAY {0, 0, 0, 0, 0}
  33
  34 /* Agilent/Keysight N5700A series */
  35 static const uint32_t agilent_n5700a_devopts[] = {
  36         SR_CONF_CONTINUOUS,
  37         SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
  38         SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
  39 };
  40
  41 static const uint32_t agilent_n5700a_devopts_cg[] = {
  42         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
  43         SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
  44         SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
  45         SR_CONF_VOLTAGE | SR_CONF_GET,
  46         SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  47         SR_CONF_CURRENT | SR_CONF_GET,
  48         SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
  49 };
  50
  51 static const struct channel_group_spec agilent_n5700a_cg[] = {
  52         { "1", CH_IDX(0), PPS_OVP | PPS_OCP, SR_MQFLAG_DC },
  53 };
  54
  55 static const struct channel_spec agilent_n5767a_ch[] = {
  56         { "1", { 0, 60, 0.0072, 3, 4 }, { 0, 25, 0.003, 3, 4 }, { 0, 1500 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
  57 };
  58
  59 static const struct channel_spec agilent_n5763a_ch[] = {
  60         { "1", { 0, 12.5, 0.0015, 3, 4 }, { 0, 120, 0.0144, 3, 4 }, { 0, 1500 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
  61 };
  62
  63 /*
  64  * TODO: OVER_CURRENT_PROTECTION_ACTIVE status can be determined by the OC bit
  65  * in STAT:QUES:EVEN?, but this is not implemented.
  66  */
  67 static const struct scpi_command agilent_n5700a_cmd[] = {
  68         { SCPI_CMD_REMOTE, "SYST:COMM:RLST REM" },
  69         { SCPI_CMD_LOCAL, "SYST:COMM:RLST LOC" },
  70         { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
  71         { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" },
  72         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
  73         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
  74         { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
  75         { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
  76         { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP:STAT?" },
  77         { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
  78         { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
  79         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT?" },
  80         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT %.6f" },
  81         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":CURR:PROT:STAT?" },
  82         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":CURR:PROT:STAT ON?"},
  83         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":CURR:PROT:STAT OFF?"},
  84         /* Current limit (CC mode) and OCP are set using the same command. */
  85         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR?" },
  86         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR %.6f" },
  87         ALL_ZERO
  88 };
  89
  90 /* BK Precision 9130 series */
  91 static const uint32_t bk_9130_devopts[] = {
  92         SR_CONF_CONTINUOUS,
  93         SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
  94         SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
  95 };
  96
  97 static const uint32_t bk_9130_devopts_cg[] = {
  98         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
  99         SR_CONF_VOLTAGE | SR_CONF_GET,
 100         SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 101         SR_CONF_CURRENT | SR_CONF_GET,
 102         SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 103         SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
 104 };
 105
 106 static const struct channel_spec bk_9130_ch[] = {
 107         { "1", { 0, 30, 0.001, 3, 3 }, { 0, 3, 0.001, 3, 3 }, { 0, 90, 0, 3, 3 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
 108         { "2", { 0, 30, 0.001, 3, 3 }, { 0, 3, 0.001, 3, 3 }, { 0, 90, 0, 3, 3 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
 109         { "3", { 0,  5, 0.001, 3, 3 }, { 0, 3, 0.001, 3, 3 }, { 0, 15, 0, 3, 3 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
 110 };
 111
 112 static const struct channel_group_spec bk_9130_cg[] = {
 113         { "1", CH_IDX(0), PPS_OVP, SR_MQFLAG_DC },
 114         { "2", CH_IDX(1), PPS_OVP, SR_MQFLAG_DC },
 115         { "3", CH_IDX(2), PPS_OVP, SR_MQFLAG_DC },
 116 };
 117
 118 static const struct scpi_command bk_9130_cmd[] = {
 119         { SCPI_CMD_REMOTE, "SYST:REMOTE" },
 120         { SCPI_CMD_LOCAL, "SYST:LOCAL" },
 121         { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
 122         { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
 123         { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
 124         { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWER?" },
 125         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
 126         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
 127         { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
 128         { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
 129         { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
 130         { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP 1" },
 131         { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP 0" },
 132         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT?" },
 133         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT %.6f" },
 134         ALL_ZERO
 135 };
 136
 137 /* Chroma 61600 series AC source */
 138 static const uint32_t chroma_61604_devopts[] = {
 139         SR_CONF_CONTINUOUS,
 140         SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
 141         SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
 142 };
 143
 144 static const uint32_t chroma_61604_devopts_cg[] = {
 145         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
 146         SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
 147         SR_CONF_VOLTAGE | SR_CONF_GET,
 148         SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 149         SR_CONF_OUTPUT_FREQUENCY | SR_CONF_GET,
 150         SR_CONF_OUTPUT_FREQUENCY_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 151         SR_CONF_CURRENT | SR_CONF_GET,
 152         SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
 153 };
 154
 155 static const struct channel_spec chroma_61604_ch[] = {
 156         { "1", { 0, 300, 0.1, 1, 1 }, { 0, 16, 0.1, 2, 2 }, { 0, 2000, 0, 1, 1 }, { 1.0, 1000.0, 0.01 }, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
 157 };
 158
 159 static const struct channel_group_spec chroma_61604_cg[] = {
 160         { "1", CH_IDX(0), PPS_OVP | PPS_OCP, SR_MQFLAG_AC },
 161 };
 162
 163 static const struct scpi_command chroma_61604_cmd[] = {
 164         { SCPI_CMD_REMOTE, "SYST:REM" },
 165         { SCPI_CMD_LOCAL, "SYST:LOC" },
 166         { SCPI_CMD_GET_MEAS_VOLTAGE, ":FETC:VOLT:ACDC?" },
 167         { SCPI_CMD_GET_MEAS_FREQUENCY, ":FETC:FREQ?" },
 168         { SCPI_CMD_GET_MEAS_CURRENT, ":FETC:CURR:AC?" },
 169         { SCPI_CMD_GET_MEAS_POWER, ":FETC:POW:AC?" },
 170         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT:AC?" },
 171         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT:AC %.1f" },
 172         { SCPI_CMD_GET_FREQUENCY_TARGET, ":SOUR:FREQ?" },
 173         { SCPI_CMD_SET_FREQUENCY_TARGET, ":SOUR:FREQ %.2f" },
 174         { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
 175         { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
 176         { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
 177         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC?" },
 178         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC %.1f" },
 179         /* This is not a current limit mode. It is overcurrent protection. */
 180         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM?" },
 181         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM %.2f" },
 182         ALL_ZERO
 183 };
 184
 185 /* Chroma 62000 series DC source */
 186 static const uint32_t chroma_62000_devopts[] = {
 187         SR_CONF_CONTINUOUS,
 188         SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
 189         SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
 190 };
 191
 192 static const uint32_t chroma_62000_devopts_cg[] = {
 193         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
 194         SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
 195         SR_CONF_VOLTAGE | SR_CONF_GET,
 196         SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 197         SR_CONF_CURRENT | SR_CONF_GET,
 198         SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 199         SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
 200 };
 201
 202 static const struct channel_group_spec chroma_62000_cg[] = {
 203         { "1", CH_IDX(0), PPS_OVP | PPS_OCP, SR_MQFLAG_DC },
 204 };
 205
 206 static const struct scpi_command chroma_62000_cmd[] = {
 207         { SCPI_CMD_REMOTE, ":CONF:REM ON" },
 208         { SCPI_CMD_LOCAL, ":CONF:REM OFF" },
 209         { SCPI_CMD_BEEPER, ":CONF:BEEP?" },
 210         { SCPI_CMD_BEEPER_ENABLE, ":CONF:BEEP ON" },
 211         { SCPI_CMD_BEEPER_DISABLE, ":CONF:BEEP OFF" },
 212         { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
 213         { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
 214         { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POW?" },
 215         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
 216         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.2f" },
 217         { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
 218         { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
 219         { SCPI_CMD_GET_OUTPUT_ENABLED, ":CONF:OUTP?" },
 220         { SCPI_CMD_SET_OUTPUT_ENABLE, ":CONF:OUTP ON" },
 221         { SCPI_CMD_SET_OUTPUT_DISABLE, ":CONF:OUTP OFF" },
 222         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH?" },
 223         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH %.6f" },
 224         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH?" },
 225         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH %.6f" },
 226         ALL_ZERO
 227 };
 228
 229 static int chroma_62000p_probe_channels(struct sr_dev_inst *sdi,
 230                 struct sr_scpi_hw_info *hw_info,
 231                 struct channel_spec **channels, unsigned int *num_channels,
 232                 struct channel_group_spec **channel_groups,
 233                 unsigned int *num_channel_groups)
 234 {
 235         unsigned int volts, amps, watts;
 236         struct channel_spec *channel;
 237
 238         (void)sdi;
 239
 240         sscanf(hw_info->model, "620%uP-%u-%u", &watts, &volts, &amps);
 241         watts *= 100;
 242         sr_dbg("Found device rated for %d V, %d A and %d W", volts, amps, watts);
 243
 244         if (volts > 600) {
 245                 sr_err("Probed max voltage of %u V is out of spec.", volts);
 246                 return SR_ERR_BUG;
 247         }
 248
 249         if (amps > 120) {
 250                 sr_err("Probed max current of %u A is out of spec.", amps);
 251                 return SR_ERR_BUG;
 252         }
 253
 254         if (watts > 5000) {
 255                 sr_err("Probed max power of %u W is out of spec.", watts);
 256                 return SR_ERR_BUG;
 257         }
 258
 259         channel = g_malloc0(sizeof(struct channel_spec));
 260         channel->name = "1";
 261         channel->voltage[0] = channel->current[0] = channel->power[0] = 0.0;
 262         channel->voltage[1] = volts;
 263         channel->current[1] = amps;
 264         channel->power[1]   = watts;
 265         channel->voltage[2] = channel->current[2] = 0.01;
 266         channel->voltage[3] = channel->voltage[4] = 3;
 267         channel->current[3] = channel->current[4] = 4;
 268         *channels = channel;
 269         *num_channels = 1;
 270
 271         *channel_groups = g_malloc(sizeof(struct channel_group_spec));
 272         **channel_groups = chroma_62000_cg[0];
 273         *num_channel_groups = 1;
 274
 275         return SR_OK;
 276 }
 277
 278 /* Envox EEZ PSU Series */
 279 static const uint32_t eez_psu_devopts[] = {
 280         SR_CONF_CONTINUOUS,
 281         SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
 282         SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
 283 };
 284
 285 static const uint32_t eez_psu_devopts_cg[] = {
 286         SR_CONF_VOLTAGE | SR_CONF_GET,
 287         SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 288         SR_CONF_CURRENT | SR_CONF_GET,
 289         SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 290         SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
 291         SR_CONF_REGULATION | SR_CONF_GET,
 292         SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
 293         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET,
 294         SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
 295         SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET,
 296 };
 297
 298 static const struct scpi_command eez_psu_cmd[] = {
 299         { SCPI_CMD_REMOTE, "SYST:REMOTE" },
 300         { SCPI_CMD_LOCAL, "SYST:LOCAL" },
 301         { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
 302         { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
 303         { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
 304         { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWER?" },
 305         { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
 306         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
 307         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.2f" },
 308         { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
 309         { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
 310         { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
 311         { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
 312         { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
 313         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT?" },
 314         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT?" },
 315         ALL_ZERO
 316 };
 317
 318 /*
 319  * The EEZ BB3 protocol currently specifies up to six channels. The older
 320  * EEZ PSU design only has room for two in its enclosure design.
 321  *
 322  * If a future model's SCPI spec allows more than six models then we can
 323  * extend this to support more.
 324  */
 325 static const char *eez_psu_channel_names[] = { "1", "2", "3", "4", "5", "6", };
 326
 327 static int eez_psu_probe_channels(struct sr_dev_inst *sdi,
 328                 struct sr_scpi_hw_info *hw_info,
 329                 struct channel_spec **channels, unsigned int *num_channels,
 330                 struct channel_group_spec **channel_groups,
 331                 unsigned int *num_channel_groups)
 332 {
 333         struct sr_scpi_dev_inst *scpi;
 334         int ret, intval;
 335         size_t i, channel_count;
 336         double limit_val;
 337         const char *channel_name;
 338
 339         /*
 340          * The EEZ PSU family is intended by the designer to be end-user
 341          * customizable, so this is intentionally a little more dynamic
 342          * than strictly necessary for the "stock" models, to make it
 343          * more likely to automatically support end-user upgrades of the
 344          * various ranges.
 345          *
 346          * The BB3 in particular supports various different modular
 347          * power supply frontends that offer different voltage/current
 348          * limits and different numbers of independent channels, such as
 349          * three PSU modules that have two channels each for a total of
 350          * six controllable channels.
 351          *
 352          * This currently supports both the original EEZ PSU design
 353          * (H24005, when in its stock build configuration) and the
 354          * successor EEZ BB3 design.
 355          */
 356
 357         scpi = sdi->conn;
 358         ret = sr_scpi_get_int(scpi, ":SYST:CHAN:COUN?", &intval);
 359         if (ret != SR_OK) {
 360                 sr_err("Failed to probe EEZ PSU channel count.");
 361                 return ret;
 362         }
 363         if (intval < 0) {
 364                 sr_err("Suspicious channel count %d, ignoring.", intval);
 365                 return SR_ERR_DATA;
 366         }
 367         channel_count = intval;
 368         if (channel_count > ARRAY_SIZE(eez_psu_channel_names)) {
 369                 /*
 370                  * No known EEZ PSU specifies more than six channels at
 371                  * the time of writing, so it would be weird to get here
 372                  * but we'll allow it to be robust.
 373                  */
 374                 sr_warn("Only using first %zu of %zu EEZ PSU channels.",
 375                         channel_count, ARRAY_SIZE(eez_psu_channel_names));
 376                 channel_count = ARRAY_SIZE(eez_psu_channel_names);
 377         }
 378
 379         sr_spew("EEZ PSU (%s) has channel count %zu.",
 380                 hw_info->model, channel_count);
 381
 382         *channels = g_malloc0(sizeof(**channels) * channel_count);
 383         *channel_groups = g_malloc0(sizeof(**channel_groups) * channel_count);
 384         for (i = 0; i < channel_count; i++) {
 385                 channel_name = eez_psu_channel_names[i];
 386
 387                 /*
 388                  * Select the channel to prepare for our various "get"
 389                  * calls below.
 390                  */
 391                 ret = sr_scpi_send(scpi, ":INST:NSEL %s", channel_name);
 392                 if (ret != SR_OK) {
 393                         sr_err("Failed to select %s to retrieve its limits.",
 394                                 channel_name);
 395                         return ret;
 396                 }
 397
 398                 (*channel_groups)[i].name = channel_name;
 399                 (*channel_groups)[i].channel_index_mask = CH_IDX(i);
 400                 (*channel_groups)[i].features = PPS_OVP | PPS_OCP;
 401                 (*channel_groups)[i].mqflags = SR_MQFLAG_DC;
 402
 403                 (*channels)[i].name = channel_name;
 404
 405                 ret = sr_scpi_get_double(scpi,
 406                         ":SYST:CHAN:INFO:CURR?", &limit_val);
 407                 if (ret != SR_OK) {
 408                         sr_err("Failed to read the current limit for %s.",
 409                                 channel_name);
 410                         return ret;
 411                 }
 412                 (*channels)[i].current[0] = 0.0;
 413                 (*channels)[i].current[1] = limit_val;
 414                 (*channels)[i].current[2] = 0.01; /* Programming resolution. */
 415                 (*channels)[i].current[3] = 2; /* Spec digits. */
 416                 (*channels)[i].current[4] = 2; /* Encoding digits. */
 417
 418                 ret = sr_scpi_get_double(scpi,
 419                         ":SYST:CHAN:INFO:VOLT?", &limit_val);
 420                 if (ret != SR_OK) {
 421                         sr_err("Failed to read the voltage limit for %s.",
 422                                 channel_name);
 423                         return ret;
 424                 }
 425                 (*channels)[i].voltage[0] = 0.0;
 426                 (*channels)[i].voltage[1] = limit_val;
 427                 (*channels)[i].voltage[2] = 0.01; /* Programming resolution. */
 428                 (*channels)[i].voltage[3] = 2; /* Spec digits. */
 429                 (*channels)[i].voltage[4] = 2; /* Encoding digits. */
 430
 431                 ret = sr_scpi_get_double(scpi,
 432                         ":SYST:CHAN:INFO:POW?", &limit_val);
 433                 if (ret != SR_OK) {
 434                         sr_err("Failed to read the power limit for %s.",
 435                                 channel_name);
 436                         return ret;
 437                 }
 438                 (*channels)[i].power[0] = 0.0;
 439                 (*channels)[i].power[1] = limit_val;
 440                 (*channels)[i].power[2] = 0.01; /* Programming resolution. */
 441                 (*channels)[i].power[3] = 2; /* Spec digits. */
 442                 (*channels)[i].power[4] = 2; /* Encoding digits. */
 443         }
 444         *num_channels = *num_channel_groups = channel_count;
 445
 446         return SR_OK;
 447 }
 448
 449 /* Rigol DP700 series */
 450 static const uint32_t rigol_dp700_devopts[] = {
 451         SR_CONF_CONTINUOUS,
 452         SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
 453         SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
 454 };
 455
 456 static const uint32_t rigol_dp700_devopts_cg[] = {
 457         SR_CONF_REGULATION | SR_CONF_GET,
 458         SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
 459         SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
 460         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 461         SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
 462         SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
 463         SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 464         SR_CONF_VOLTAGE | SR_CONF_GET,
 465         SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 466         SR_CONF_CURRENT | SR_CONF_GET,
 467         SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 468         SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
 469 };
 470
 471 static const struct channel_spec rigol_dp711_ch[] = {
 472         { "1", { 0, 30, 0.01, 3, 3 }, { 0, 5, 0.01, 3, 3 }, { 0, 150, 0, 3, 3 }, FREQ_DC_ONLY, { 0.01, 33, 0.01}, { 0.01, 5.5, 0.01 }, NO_OCP_DELAY },
 473 };
 474
 475 static const struct channel_spec rigol_dp712_ch[] = {
 476         { "1", { 0, 50, 0.01, 3, 3 }, { 0, 3, 0.01, 3, 3 }, { 0, 150, 0, 3, 3 }, FREQ_DC_ONLY, { 0.01, 55, 0.01}, { 0.01, 3.3, 0.01 }, NO_OCP_DELAY },
 477 };
 478
 479 static const struct channel_group_spec rigol_dp700_cg[] = {
 480         { "1", CH_IDX(0), PPS_OVP | PPS_OCP, SR_MQFLAG_DC },
 481 };
 482
 483 /* Same as the DP800 series, except for the missing :SYST:OTP* commands. */
 484 static const struct scpi_command rigol_dp700_cmd[] = {
 485         { SCPI_CMD_REMOTE, "SYST:REMOTE" },
 486         { SCPI_CMD_LOCAL, "SYST:LOCAL" },
 487         { SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" },
 488         { SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" },
 489         { SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" },
 490         { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
 491         { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
 492         { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
 493         { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" },
 494         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
 495         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
 496         { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
 497         { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
 498         { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
 499         { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
 500         { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
 501         { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
 502         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" },
 503         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" },
 504         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" },
 505         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" },
 506         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" },
 507         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" },
 508         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" },
 509         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" },
 510         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" },
 511         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" },
 512         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" },
 513         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" },
 514         ALL_ZERO
 515 };
 516
 517 /* Rigol DP800 series */
 518 static const uint32_t rigol_dp800_devopts[] = {
 519         SR_CONF_CONTINUOUS,
 520         SR_CONF_OVER_TEMPERATURE_PROTECTION | SR_CONF_GET | SR_CONF_SET,
 521         SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
 522         SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
 523 };
 524
 525 static const uint32_t rigol_dp800_devopts_cg[] = {
 526         SR_CONF_REGULATION | SR_CONF_GET,
 527         SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
 528         SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
 529         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
 530         SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
 531         SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
 532         SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
 533         SR_CONF_VOLTAGE | SR_CONF_GET,
 534         SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 535         SR_CONF_CURRENT | SR_CONF_GET,
 536         SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 537         SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
 538 };
 539
 540 static const struct channel_spec rigol_dp821a_ch[] = {
 541         { "1", { 0, 60, 0.001, 3, 3 }, { 0, 1, 0.0001, 4, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
 542         { "2", { 0,  8, 0.001, 3, 3 }, { 0, 10, 0.001, 3, 3 }, { 0, 80, 0, 3, 3 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
 543 };
 544
 545 static const struct channel_spec rigol_dp831_ch[] = {
 546         { "1", { 0,   8, 0.001, 3, 4 }, { 0, 5, 0.0003, 3, 4 }, { 0, 40, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
 547         { "2", { 0,  30, 0.001, 3, 4 }, { 0, 2, 0.0001, 3, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
 548         { "3", { 0, -30, 0.001, 3, 4 }, { 0, 2, 0.0001, 3, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
 549 };
 550
 551 static const struct channel_spec rigol_dp832_ch[] = {
 552         { "1", { 0, 30, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
 553         { "2", { 0, 30, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
 554         { "3", { 0,  5, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
 555 };
 556
 557 static const struct channel_group_spec rigol_dp820_cg[] = {
 558         { "1", CH_IDX(0), PPS_OVP | PPS_OCP, SR_MQFLAG_DC },
 559         { "2", CH_IDX(1), PPS_OVP | PPS_OCP, SR_MQFLAG_DC },
 560 };
 561
 562 static const struct channel_group_spec rigol_dp830_cg[] = {
 563         { "1", CH_IDX(0), PPS_OVP | PPS_OCP, SR_MQFLAG_DC },
 564         { "2", CH_IDX(1), PPS_OVP | PPS_OCP, SR_MQFLAG_DC },
 565         { "3", CH_IDX(2), PPS_OVP | PPS_OCP, SR_MQFLAG_DC },
 566 };
 567
 568 static const struct scpi_command rigol_dp800_cmd[] = {
 569         { SCPI_CMD_REMOTE, "SYST:REMOTE" },
 570         { SCPI_CMD_LOCAL, "SYST:LOCAL" },
 571         { SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" },
 572         { SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" },
 573         { SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" },
 574         { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
 575         { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
 576         { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
 577         { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" },
 578         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
 579         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
 580         { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
 581         { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
 582         { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
 583         { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
 584         { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
 585         { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
 586         { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" },
 587         { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_ENABLE, ":SYST:OTP ON" },
 588         { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_DISABLE, ":SYST:OTP OFF" },
 589         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" },
 590         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" },
 591         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" },
 592         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" },
 593         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" },
 594         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" },
 595         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" },
 596         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" },
 597         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" },
 598         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" },
 599         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" },
 600         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" },
 601         ALL_ZERO
 602 };
 603
 604 /* HP 663xA series */
 605 static const uint32_t hp_6630a_devopts[] = {
 606         SR_CONF_CONTINUOUS,
 607         SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
 608         SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
 609 };
 610
 611 static const uint32_t hp_6630a_devopts_cg[] = {
 612         SR_CONF_ENABLED | SR_CONF_SET,
 613         SR_CONF_VOLTAGE | SR_CONF_GET,
 614         SR_CONF_CURRENT | SR_CONF_GET,
 615         SR_CONF_VOLTAGE_TARGET | SR_CONF_SET | SR_CONF_LIST,
 616         SR_CONF_CURRENT_LIMIT | SR_CONF_SET | SR_CONF_LIST,
 617         SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
 618         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_SET | SR_CONF_LIST,
 619         SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_SET,
 620         SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
 621         SR_CONF_OVER_TEMPERATURE_PROTECTION_ACTIVE | SR_CONF_GET,
 622         SR_CONF_REGULATION | SR_CONF_GET,
 623 };
 624
 625 static const struct channel_spec hp_6632a_ch[] = {
 626         { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 5.1188, 0.00125, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 22, 0.1 }, NO_OCP_LIMITS, NO_OCP_DELAY },
 627 };
 628
 629 static const struct channel_spec hp_6633a_ch[] = {
 630         { "1", { 0, 51.188, 0.0125, 3, 4 }, { 0, 2.0475, 0.0005, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 55, 0.25 }, NO_OCP_LIMITS, NO_OCP_DELAY },
 631 };
 632
 633 static const struct channel_spec hp_6634a_ch[] = {
 634         { "1", { 0, 102.38, 0.025, 3, 4 }, { 0, 1.0238, 0.00025, 4, 5 }, { 0, 104.81664 }, FREQ_DC_ONLY, { 0, 110, 0.5 }, NO_OCP_LIMITS, NO_OCP_DELAY },
 635 };
 636
 637 static const struct channel_group_spec hp_6630a_cg[] = {
 638         { "1", CH_IDX(0), PPS_OVP | PPS_OCP, SR_MQFLAG_DC },
 639 };
 640
 641 static const struct scpi_command hp_6630a_cmd[] = {
 642         { SCPI_CMD_SET_OUTPUT_ENABLE, "OUT 1" },
 643         { SCPI_CMD_SET_OUTPUT_DISABLE, "OUT 0" },
 644         { SCPI_CMD_GET_MEAS_VOLTAGE, "VOUT?" },
 645         { SCPI_CMD_GET_MEAS_CURRENT, "IOUT?" },
 646         { SCPI_CMD_SET_VOLTAGE_TARGET, "VSET %.4f" },
 647         { SCPI_CMD_SET_CURRENT_LIMIT, "ISET %.4f" },
 648         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, "STS?" },
 649         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "OVSET %.4f" },
 650         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, "OCP 1" },
 651         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, "OCP 0" },
 652         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, "STS?" },
 653         { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION_ACTIVE, "STS?" },
 654         { SCPI_CMD_GET_OUTPUT_REGULATION, "STS?" },
 655         ALL_ZERO
 656 };
 657
 658 static int hp_6630a_init_acquisition(const struct sr_dev_inst *sdi)
 659 {
 660         struct sr_scpi_dev_inst *scpi;
 661
 662         scpi = sdi->conn;
 663
 664         /*
 665          * Monitor CV (1), CC+ (2), UR (4), OVP (8), OTP (16), OCP (64) and
 666          * CC- (256) bits of the Status Register for the FAULT? query.
 667          */
 668         return sr_scpi_send(scpi, "UNMASK 607");
 669 }
 670
 671 static int hp_6630a_update_status(const struct sr_dev_inst *sdi)
 672 {
 673         struct sr_scpi_dev_inst *scpi;
 674         int ret;
 675         int fault;
 676         gboolean cv, cc_pos, unreg, cc_neg;
 677         gboolean regulation_changed;
 678         char *regulation;
 679
 680         scpi = sdi->conn;
 681
 682         /*
 683          * Use the FAULT register (only 0->1 transitions), this way multiple set
 684          * regulation bits in the STS/ASTS registers are ignored. In rare cases
 685          * we will miss some changes (1->0 transitions, e.g. no regulation at all),
 686          * but SPS/ASPS doesn't work either, unless all states are stored and
 687          * compared to the states in STS/ASTS.
 688          * TODO: Use SPoll or SRQ when SCPI over GPIB is used.
 689          */
 690         ret = sr_scpi_get_int(scpi, "FAULT?", &fault);
 691         if (ret != SR_OK)
 692                 return ret;
 693
 694         /* OVP */
 695         if (fault & (1 << 3))
 696                 sr_session_send_meta(sdi, SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE,
 697                         g_variant_new_boolean(fault & (1 << 3)));
 698
 699         /* OCP */
 700         if (fault & (1 << 6))
 701                 sr_session_send_meta(sdi, SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE,
 702                         g_variant_new_boolean(fault & (1 << 6)));
 703
 704         /* OTP */
 705         if (fault & (1 << 4))
 706                 sr_session_send_meta(sdi, SR_CONF_OVER_TEMPERATURE_PROTECTION_ACTIVE,
 707                         g_variant_new_boolean(fault & (1 << 4)));
 708
 709         /* CV */
 710         cv = (fault & (1 << 0));
 711         regulation_changed = (fault & (1 << 0));
 712         /* CC+ */
 713         cc_pos = (fault & (1 << 1));
 714         regulation_changed = (fault & (1 << 1)) | regulation_changed;
 715         /* UNREG */
 716         unreg = (fault & (1 << 2));
 717         regulation_changed = (fault & (1 << 2)) | regulation_changed;
 718         /* CC- */
 719         cc_neg = (fault & (1 << 9));
 720         regulation_changed = (fault & (1 << 9)) | regulation_changed;
 721
 722         if (regulation_changed) {
 723                 if (cv && !cc_pos && !cc_neg && !unreg)
 724                         regulation = "CV";
 725                 else if (cc_pos && !cv && !cc_neg && !unreg)
 726                         regulation = "CC";
 727                 else if (cc_neg && !cv && !cc_pos && !unreg)
 728                         regulation = "CC-";
 729                 else if (unreg && !cv && !cc_pos && !cc_neg)
 730                         regulation = "UR";
 731                 else if (!cv && !cc_pos && !cc_neg && !unreg)
 732                         regulation = "";
 733                 else {
 734                         sr_dbg("Undefined regulation for HP 66xxA "
 735                                 "(CV=%i, CC+=%i, CC-=%i, UR=%i).",
 736                                 cv, cc_pos, cc_neg, unreg);
 737                         return FALSE;
 738                 }
 739                 sr_session_send_meta(sdi, SR_CONF_REGULATION,
 740                         g_variant_new_string(regulation));
 741         }
 742
 743         return SR_OK;
 744 }
 745
 746 /* HP 663xB series */
 747 static const uint32_t hp_6630b_devopts[] = {
 748         SR_CONF_CONTINUOUS,
 749         SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
 750         SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
 751 };
 752
 753 static const uint32_t hp_6630b_devopts_cg[] = {
 754         SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
 755         SR_CONF_VOLTAGE | SR_CONF_GET,
 756         SR_CONF_CURRENT | SR_CONF_GET,
 757         SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 758         SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 759         SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
 760         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 761         SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
 762         SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
 763         SR_CONF_OVER_TEMPERATURE_PROTECTION_ACTIVE | SR_CONF_GET,
 764         SR_CONF_REGULATION | SR_CONF_GET,
 765 };
 766
 767 static const struct channel_spec hp_6611c_ch[] = {
 768         { "1", { 0, 8.19, 0.002, 3, 4 }, { 0, 5.1188, 0.00125, 4, 5 }, { 0, 41.92297 }, FREQ_DC_ONLY, { 0, 12, 0.06 }, NO_OCP_LIMITS, NO_OCP_DELAY },
 769 };
 770
 771 static const struct channel_spec hp_6612c_ch[] = {
 772         { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 2.0475, 0.0005, 4, 5 }, { 0, 41.92256 }, FREQ_DC_ONLY, { 0, 22, 0.1 }, NO_OCP_LIMITS, NO_OCP_DELAY },
 773 };
 774
 775 static const struct channel_spec hp_6613c_ch[] = {
 776         { "1", { 0, 51.188, 0.0125, 3, 4 }, { 0, 1.0238, 0.00025, 4, 5 }, { 0, 52.40627 }, FREQ_DC_ONLY, { 0, 55, 0.25 }, NO_OCP_LIMITS, NO_OCP_DELAY },
 777 };
 778
 779 static const struct channel_spec hp_6614c_ch[] = {
 780         { "1", { 0, 102.38, 0.025, 3, 4 }, { 0, 0.5118, 0.000125, 4, 5 }, { 0, 52.39808 }, FREQ_DC_ONLY, { 0, 110, 0.5 }, NO_OCP_LIMITS, NO_OCP_DELAY },
 781 };
 782
 783 static const struct channel_spec hp_6631b_ch[] = {
 784         { "1", { 0, 8.19, 0.002, 3, 4 }, { 0, 10.237, 0.00263, 4, 5 }, { 0, 83.84103 }, FREQ_DC_ONLY, { 0, 12, 0.06 }, NO_OCP_LIMITS, NO_OCP_DELAY },
 785 };
 786
 787 static const struct channel_spec hp_6632b_ch[] = {
 788         { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 5.1188, 0.00132, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 22, 0.1 }, NO_OCP_LIMITS, NO_OCP_DELAY },
 789 };
 790
 791 static const struct channel_spec hp_66312a_ch[] = {
 792         { "1", { 0, 20.475, 0.0001, 4, 5 }, { 0, 2.0475, 0.0001, 4, 5 }, { 0, 41.92256 }, FREQ_DC_ONLY, { 0, 22, 0.01 }, NO_OCP_LIMITS, NO_OCP_DELAY },
 793 };
 794
 795 static const struct channel_spec hp_66332a_ch[] = {
 796         { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 5.1188, 0.00132, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 22, 0.1 }, NO_OCP_LIMITS, NO_OCP_DELAY },
 797 };
 798
 799 static const struct channel_spec hp_6633b_ch[] = {
 800         { "1", { 0, 51.188, 0.0125, 3, 4 }, { 0, 2.0475, 0.000526, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 55, 0.25 }, NO_OCP_LIMITS, NO_OCP_DELAY },
 801 };
 802
 803 static const struct channel_spec hp_6634b_ch[] = {
 804         { "1", { 0, 102.38, 0.025, 3, 4 }, { 0, 1.0238, 0.000263, 4, 5 }, { 0, 104.81664 }, FREQ_DC_ONLY, { 0, 110, 0.5 }, NO_OCP_LIMITS, NO_OCP_DELAY },
 805 };
 806
 807 static const struct channel_group_spec hp_6630b_cg[] = {
 808         { "1", CH_IDX(0), PPS_OVP | PPS_OCP, SR_MQFLAG_DC },
 809 };
 810
 811 static const struct scpi_command hp_6630b_cmd[] = {
 812         /*
 813          * SCPI_CMD_REMOTE and SCPI_CMD_LOCAL are not used when GPIB is used,
 814          * otherwise the device will report (non critical) error 602.
 815          */
 816         { SCPI_CMD_REMOTE, "SYST:REM" },
 817         { SCPI_CMD_LOCAL, "SYST:LOC" },
 818         { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" },
 819         { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" },
 820         { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" },
 821         { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
 822         { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
 823         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
 824         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
 825         { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
 826         { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
 827         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":CURR:PROT:STAT?" },
 828         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":CURR:PROT:STAT 1" },
 829         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":CURR:PROT:STAT 0" },
 830         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, "STAT:QUES:COND?" },
 831         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, "STAT:QUES:COND?" },
 832         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT?" },
 833         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT %.6f" },
 834         { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION_ACTIVE, "STAT:QUES:COND?" },
 835         { SCPI_CMD_GET_OUTPUT_REGULATION, "STAT:OPER:COND?" },
 836         ALL_ZERO
 837 };
 838
 839 static int hp_6630b_init_acquisition(const struct sr_dev_inst *sdi)
 840 {
 841         struct sr_scpi_dev_inst *scpi;
 842         int ret;
 843
 844         scpi = sdi->conn;
 845
 846         /*
 847          * Monitor CV (256), CC+ (1024) and CC- (2048) bits of the
 848          * Operational Status Register.
 849          * Use both positive and negative transitions of the status bits.
 850          */
 851         ret = sr_scpi_send(scpi, "STAT:OPER:PTR 3328;NTR 3328;ENAB 3328");
 852         if (ret != SR_OK)
 853                 return ret;
 854
 855         /*
 856          * Monitor OVP (1), OCP (2), OTP (16) and Unreg (1024) bits of the
 857          * Questionable Status Register.
 858          * Use both positive and negative transitions of the status bits.
 859          */
 860         ret = sr_scpi_send(scpi, "STAT:QUES:PTR 1043;NTR 1043;ENAB 1043");
 861         if (ret != SR_OK)
 862                 return ret;
 863
 864         /*
 865          * Service Request Enable Register set for Operational Status Register
 866          * bits (128) and Questionable Status Register bits (8).
 867          * This masks the Status Register generating a SRQ/RQS. Not implemented yet!
 868          */
 869         /*
 870         ret = sr_scpi_send(scpi, "*SRE 136");
 871         if (ret != SR_OK)
 872                 return ret;
 873         */
 874
 875         return SR_OK;
 876 }
 877
 878 static int hp_6630b_update_status(const struct sr_dev_inst *sdi)
 879 {
 880         struct sr_scpi_dev_inst *scpi;
 881         int ret;
 882         int stb;
 883         int ques_even, ques_cond;
 884         int oper_even, oper_cond;
 885         gboolean output_enabled;
 886         gboolean unreg, cv, cc_pos, cc_neg;
 887         gboolean regulation_changed;
 888         char *regulation;
 889
 890         scpi = sdi->conn;
 891
 892         unreg = FALSE;
 893         cv = FALSE;
 894         cc_pos = FALSE;
 895         cc_neg = FALSE;
 896         regulation_changed = FALSE;
 897
 898         /*
 899          * Use SPoll when SCPI uses GPIB as transport layer.
 900          * SPoll is approx. twice as fast as a normal GPIB write + read would be!
 901          */
 902 #ifdef HAVE_LIBGPIB
 903         char spoll_buf;
 904
 905         if (scpi->transport == SCPI_TRANSPORT_LIBGPIB) {
 906                 ret = sr_scpi_gpib_spoll(scpi, &spoll_buf);
 907                 if (ret != SR_OK)
 908                         return ret;
 909                 stb = (uint8_t)spoll_buf;
 910         }
 911         else {
 912 #endif
 913                 ret = sr_scpi_get_int(scpi, "*STB?", &stb);
 914                 if (ret != SR_OK)
 915                         return ret;
 916 #ifdef HAVE_LIBGPIB
 917         }
 918 #endif
 919
 920         /* Questionable status summary bit */
 921         if (stb & (1 << 3)) {
 922                 /* Read the event register to clear it! */
 923                 ret = sr_scpi_get_int(scpi, "STAT:QUES:EVEN?", &ques_even);
 924                 if (ret != SR_OK)
 925                         return ret;
 926                 /* Now get the values. */
 927                 ret = sr_scpi_get_int(scpi, "STAT:QUES:COND?", &ques_cond);
 928                 if (ret != SR_OK)
 929                         return ret;
 930
 931                 /* OVP */
 932                 if (ques_even & (1 << 0))
 933                         sr_session_send_meta(sdi, SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE,
 934                                 g_variant_new_boolean(ques_cond & (1 << 0)));
 935
 936                 /* OCP */
 937                 if (ques_even & (1 << 1))
 938                         sr_session_send_meta(sdi, SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE,
 939                                 g_variant_new_boolean(ques_cond & (1 << 1)));
 940
 941                 /* OTP */
 942                 if (ques_even & (1 << 4))
 943                         sr_session_send_meta(sdi, SR_CONF_OVER_TEMPERATURE_PROTECTION_ACTIVE,
 944                                 g_variant_new_boolean(ques_cond & (1 << 4)));
 945
 946                 /* UNREG */
 947                 unreg = (ques_cond & (1 << 10));
 948                 regulation_changed = (ques_even & (1 << 10)) | regulation_changed;
 949
 950                 /*
 951                  * Check if output state has changed, due to one of the
 952                  * questionable states changed.
 953                  * NOTE: The output state is sent even if it hasn't changed,
 954                  * but that only happens rarely.
 955                  */
 956                 ret = sr_scpi_get_bool(scpi, "OUTP:STAT?", &output_enabled);
 957                 if (ret != SR_OK)
 958                         return ret;
 959                 sr_session_send_meta(sdi, SR_CONF_ENABLED,
 960                         g_variant_new_boolean(output_enabled));
 961         }
 962
 963         /* Operation status summary bit */
 964         if (stb & (1 << 7)) {
 965                 /* Read the event register to clear it! */
 966                 ret = sr_scpi_get_int(scpi, "STAT:OPER:EVEN?", &oper_even);
 967                 if (ret != SR_OK)
 968                         return ret;
 969                 /* Now get the values. */
 970                 ret = sr_scpi_get_int(scpi, "STAT:OPER:COND?", &oper_cond);
 971                 if (ret != SR_OK)
 972                         return ret;
 973
 974                 /* CV */
 975                 cv = (oper_cond & (1 << 8));
 976                 regulation_changed = (oper_even & (1 << 8)) | regulation_changed;
 977                 /* CC+ */
 978                 cc_pos = (oper_cond & (1 << 10));
 979                 regulation_changed = (oper_even & (1 << 10)) | regulation_changed;
 980                 /* CC- */
 981                 cc_neg = (oper_cond & (1 << 11));
 982                 regulation_changed = (oper_even & (1 << 11)) | regulation_changed;
 983         }
 984
 985         if (regulation_changed) {
 986                 if (cv && !cc_pos && !cc_neg && !unreg)
 987                         regulation = "CV";
 988                 else if (cc_pos && !cv && !cc_neg && !unreg)
 989                         regulation = "CC";
 990                 else if (cc_neg && !cv && !cc_pos && !unreg)
 991                         regulation = "CC-";
 992                 else if (unreg && !cv && !cc_pos && !cc_neg)
 993                         regulation = "UR";
 994                 else if (!cv && !cc_pos && !cc_neg && !unreg)
 995                         /* This happens in case of OCP active. */
 996                         regulation = "";
 997                 else {
 998                         /* This happens from time to time (CV and CC+ active). */
 999                         sr_dbg("Undefined regulation for HP 66xxB "
1000                                 "(CV=%i, CC+=%i, CC-=%i, UR=%i).",
1001                                 cv, cc_pos, cc_neg, unreg);
1002                         return FALSE;
1003                 }
1004                 sr_session_send_meta(sdi, SR_CONF_REGULATION,
1005                         g_variant_new_string(regulation));
1006         }
1007
1008         return SR_OK;
1009 }
1010
1011 /* Owon P4000 series */
1012 static const uint32_t owon_p4000_devopts[] = {
1013         SR_CONF_CONTINUOUS,
1014         SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
1015         SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET
1016 };
1017
1018 static const uint32_t owon_p4000_devopts_cg[] = {
1019         SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
1020         SR_CONF_VOLTAGE | SR_CONF_GET,
1021         SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
1022         SR_CONF_CURRENT | SR_CONF_GET,
1023         SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
1024         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
1025         SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
1026 };
1027
1028 static const struct channel_spec owon_p4603_ch[] = {
1029         { "1", { 0.01, 60, 0.001, 3, 3 }, { 0.001, 3, 0.001, 3, 3 }, { 0, 180, 0, 3, 3 }, FREQ_DC_ONLY, { 0.01, 61, 0.001}, { 0.001, 3.1, 0.001}, NO_OCP_DELAY },
1030 };
1031
1032 static const struct channel_spec owon_p4305_ch[] = {
1033         { "1", { 0.01, 30, 0.001, 3, 3 }, { 0.001, 5, 0.001, 3, 3 }, { 0, 180, 0, 3, 3 }, FREQ_DC_ONLY, { 0.01, 31, 0.001}, { 0.001, 3.1, 0.001}, NO_OCP_DELAY },
1034 };
1035
1036 static const struct channel_group_spec owon_p4000_cg[] = {
1037         { "1", CH_IDX(0), PPS_OVP | PPS_OCP, SR_MQFLAG_DC },
1038 };
1039
1040 static const struct scpi_command owon_p4000_cmd[] = {
1041         { SCPI_CMD_GET_MEAS_VOLTAGE, "MEAS:VOLT?" },
1042         { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" },
1043         { SCPI_CMD_GET_MEAS_POWER, "MEAS:POW?" },
1044         { SCPI_CMD_GET_VOLTAGE_TARGET, "VOLT?" },
1045         { SCPI_CMD_SET_VOLTAGE_TARGET, "VOLT %.6f" },
1046         { SCPI_CMD_GET_CURRENT_LIMIT, "CURR?" },
1047         { SCPI_CMD_SET_CURRENT_LIMIT, "CURR %.6f" },
1048         { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP?" },
1049         { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP 1" },
1050         { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP 0" },
1051         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:LIM?" },
1052         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:LIM %.6f" },
1053         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, "CURR:LIM?" },
1054         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, "CURR:LIM %.6f" },
1055         ALL_ZERO
1056 };
1057
1058 /* Owon SPE series*/
1059
1060 static const struct channel_spec owon_spe6103_ch[] = {
1061         { "1", { 0.01, 60, 0.01, 3, 3 }, { 0.001, 10, 0.001, 3, 3 }, { 0, 300, 0, 3, 3 }, FREQ_DC_ONLY, { 0.01, 61, 0.01}, { 0.001, 10.1, 0.001}, NO_OCP_DELAY },
1062 };
1063
1064 static const struct scpi_command owon_spe6103_cmd[] = {
1065         { SCPI_CMD_REMOTE, "SYST:REM" },
1066         { SCPI_CMD_LOCAL, "SYST:LOC" },
1067         { SCPI_CMD_GET_MEAS_VOLTAGE, "MEAS:VOLT?" },
1068         { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" },
1069         { SCPI_CMD_GET_MEAS_POWER, "MEAS:POW?" },
1070         { SCPI_CMD_GET_VOLTAGE_TARGET, "VOLT?" },
1071         { SCPI_CMD_SET_VOLTAGE_TARGET, "VOLT %.6f" },
1072         { SCPI_CMD_GET_CURRENT_LIMIT, "CURR?" },
1073         { SCPI_CMD_SET_CURRENT_LIMIT, "CURR %.6f" },
1074         { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP?" },
1075         { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP 1" },
1076         { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP 0" },
1077         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:LIM?" },
1078         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:LIM %.6f" },
1079         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, "CURR:LIM?" },
1080         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, "CURR:LIM %.6f" },
1081         ALL_ZERO
1082 };
1083
1084 /* Philips/Fluke PM2800 series */
1085 static const uint32_t philips_pm2800_devopts[] = {
1086         SR_CONF_CONTINUOUS,
1087         SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
1088         SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
1089 };
1090
1091 static const uint32_t philips_pm2800_devopts_cg[] = {
1092         SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
1093         SR_CONF_VOLTAGE | SR_CONF_GET,
1094         SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
1095         SR_CONF_CURRENT | SR_CONF_GET,
1096         SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
1097         SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
1098         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
1099         SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
1100         SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
1101         SR_CONF_REGULATION | SR_CONF_GET,
1102 };
1103
1104 enum philips_pm2800_modules {
1105         PM2800_MOD_30V_10A = 1,
1106         PM2800_MOD_60V_5A,
1107         PM2800_MOD_60V_10A,
1108         PM2800_MOD_8V_15A,
1109         PM2800_MOD_60V_2A,
1110         PM2800_MOD_120V_1A,
1111 };
1112
1113 static const struct philips_pm2800_module_spec {
1114         /* Min, max, programming resolution. */
1115         double voltage[5];
1116         double current[5];
1117         double power[5];
1118 } philips_pm2800_module_specs[] = {
1119         /* Autoranging modules. */
1120         [PM2800_MOD_30V_10A] = { { 0, 30, 0.0075, 2, 4 }, { 0, 10, 0.0025, 2, 4 }, { 0, 60 } },
1121         [PM2800_MOD_60V_5A] = { { 0, 60, 0.015, 2, 3 }, { 0, 5, 0.00125, 2, 5 }, { 0, 60 } },
1122         [PM2800_MOD_60V_10A] = { { 0, 60, 0.015, 2, 3 }, { 0, 10, 0.0025, 2, 5 }, { 0, 120 } },
1123         /* Linear modules. */
1124         [PM2800_MOD_8V_15A] = { { 0, 8, 0.002, 3, 3 }, { -15, 15, 0.00375, 3, 5 }, { 0, 120 } },
1125         [PM2800_MOD_60V_2A] = { { 0, 60, 0.015, 2, 3 }, { -2, 2, 0.0005, 3, 4 }, { 0, 120 } },
1126         [PM2800_MOD_120V_1A] = { { 0, 120, 0.030, 2, 2 }, { -1, 1, 0.00025, 3, 5 }, { 0, 120 } },
1127 };
1128
1129 static const struct philips_pm2800_model {
1130         unsigned int chassis;
1131         unsigned int num_modules;
1132         unsigned int set;
1133         unsigned int modules[3];
1134 } philips_pm2800_matrix[] = {
1135         /* Autoranging chassis. */
1136         { 1, 1, 0, { PM2800_MOD_30V_10A, 0, 0 } },
1137         { 1, 1, 1, { PM2800_MOD_60V_5A, 0, 0 } },
1138         { 1, 2, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, 0 } },
1139         { 1, 2, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, 0 } },
1140         { 1, 2, 2, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, 0 } },
1141         { 1, 2, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_10A, 0 } },
1142         { 1, 2, 4, { PM2800_MOD_60V_5A, PM2800_MOD_60V_10A, 0 } },
1143         { 1, 3, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_30V_10A } },
1144         { 1, 3, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
1145         { 1, 3, 2, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_60V_5A } },
1146         { 1, 3, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
1147         /* Linear chassis. */
1148         { 3, 1, 0, { PM2800_MOD_60V_2A, 0, 0 } },
1149         { 3, 1, 1, { PM2800_MOD_120V_1A, 0, 0 } },
1150         { 3, 1, 2, { PM2800_MOD_8V_15A, 0, 0 } },
1151         { 3, 2, 0, { PM2800_MOD_60V_2A, 0, 0 } },
1152         { 3, 2, 1, { PM2800_MOD_120V_1A, 0, 0 } },
1153         { 3, 2, 2, { PM2800_MOD_60V_2A, PM2800_MOD_120V_1A, 0 } },
1154         { 3, 2, 3, { PM2800_MOD_8V_15A, PM2800_MOD_8V_15A, 0 } },
1155 };
1156
1157 static const char *philips_pm2800_names[] = { "1", "2", "3" };
1158
1159 static int philips_pm2800_probe_channels(struct sr_dev_inst *sdi,
1160                 struct sr_scpi_hw_info *hw_info,
1161                 struct channel_spec **channels, unsigned int *num_channels,
1162                 struct channel_group_spec **channel_groups, unsigned int *num_channel_groups)
1163 {
1164         const struct philips_pm2800_model *model;
1165         const struct philips_pm2800_module_spec *spec;
1166         unsigned int chassis, num_modules, set, module, m, i;
1167
1168         (void)sdi;
1169
1170         /*
1171          * The model number as reported by *IDN? looks like e.g. PM2813/11,
1172          * Where "PM28" is fixed, followed by the chassis code (1 = autoranging,
1173          * 3 = linear series) and the number of modules: 1-3 for autoranging,
1174          * 1-2 for linear.
1175          * After the slash, the first digit denotes the module set. The
1176          * digit after that denotes front (5) or rear (1) binding posts.
1177          */
1178         chassis = hw_info->model[4] - 0x30;
1179         num_modules = hw_info->model[5] - 0x30;
1180         set = hw_info->model[7] - 0x30;
1181         for (m = 0; m < ARRAY_SIZE(philips_pm2800_matrix); m++) {
1182                 model = &philips_pm2800_matrix[m];
1183                 if (model->chassis == chassis && model->num_modules == num_modules
1184                                 && model->set == set)
1185                         break;
1186         }
1187         if (m == ARRAY_SIZE(philips_pm2800_matrix)) {
1188                 sr_dbg("Model %s not found in matrix.", hw_info->model);
1189                 return SR_ERR;
1190         }
1191
1192         sr_dbg("Found %d output channel%s:", num_modules, num_modules > 1 ? "s" : "");
1193         *channels = g_malloc0(sizeof(struct channel_spec) * num_modules);
1194         *channel_groups = g_malloc0(sizeof(struct channel_group_spec) * num_modules);
1195         for (i = 0; i < num_modules; i++) {
1196                 module = model->modules[i];
1197                 spec = &philips_pm2800_module_specs[module];
1198                 sr_dbg("output %d: %.0f - %.0fV, %.0f - %.0fA, %.0f - %.0fW", i + 1,
1199                                 spec->voltage[0], spec->voltage[1],
1200                                 spec->current[0], spec->current[1],
1201                                 spec->power[0], spec->power[1]);
1202                 (*channels)[i].name = (char *)philips_pm2800_names[i];
1203                 memcpy(&((*channels)[i].voltage), spec, sizeof(double) * 15);
1204                 (*channel_groups)[i].name = (char *)philips_pm2800_names[i];
1205                 (*channel_groups)[i].channel_index_mask = 1 << i;
1206                 (*channel_groups)[i].features = PPS_OTP | PPS_OVP | PPS_OCP;
1207                 (*channel_groups)[i].mqflags = SR_MQFLAG_DC;
1208         }
1209         *num_channels = *num_channel_groups = num_modules;
1210
1211         return SR_OK;
1212 }
1213
1214 static const struct scpi_command philips_pm2800_cmd[] = {
1215         { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
1216         { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
1217         { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
1218         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
1219         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
1220         { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
1221         { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
1222         { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
1223         { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
1224         { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
1225         { SCPI_CMD_GET_OUTPUT_REGULATION, ":SOUR:FUNC:MODE?" },
1226         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":SOUR:VOLT:PROT:TRIP?" },
1227         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV?" },
1228         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV %.6f" },
1229         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":SOUR:CURR:PROT:STAT?" },
1230         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":SOUR:CURR:PROT:STAT ON" },
1231         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":SOUR:CURR:PROT:STAT OFF" },
1232         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":SOUR:CURR:PROT:TRIP?" },
1233         ALL_ZERO
1234 };
1235
1236 static const uint32_t rs_hmc8043_devopts[] = {
1237         SR_CONF_CONTINUOUS,
1238         SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
1239         SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
1240 };
1241
1242 static const uint32_t rs_hmc8043_devopts_cg[] = {
1243         SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
1244         SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
1245         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
1246         SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
1247         SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
1248         SR_CONF_OVER_CURRENT_PROTECTION_DELAY | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
1249         SR_CONF_VOLTAGE | SR_CONF_GET,
1250         SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
1251         SR_CONF_CURRENT | SR_CONF_GET,
1252         SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
1253         SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
1254 };
1255
1256 static const struct channel_spec rs_hmc8043_ch[] = {
1257         { "1", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, { 0.01, 10, 0.001, 3, 4}  },
1258         { "2", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, { 0.01, 10, 0.001, 3, 4} },
1259         { "3", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, { 0.01, 10, 0.001, 3, 4} },
1260 };
1261
1262 static const struct channel_group_spec rs_hmc8043_cg[] = {
1263         { "1", CH_IDX(0), PPS_OVP | PPS_OCP, SR_MQFLAG_DC },
1264         { "2", CH_IDX(1), PPS_OVP | PPS_OCP, SR_MQFLAG_DC },
1265         { "3", CH_IDX(2), PPS_OVP | PPS_OCP, SR_MQFLAG_DC },
1266 };
1267
1268 static const struct scpi_command rs_hmc8043_cmd[] = {
1269         { SCPI_CMD_SELECT_CHANNEL, "INST:NSEL %s" },
1270         { SCPI_CMD_GET_MEAS_VOLTAGE, "MEAS:VOLT?" },
1271         { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" },
1272         { SCPI_CMD_GET_VOLTAGE_TARGET, "VOLT?" },
1273         { SCPI_CMD_SET_VOLTAGE_TARGET, "VOLT %.6f" },
1274         { SCPI_CMD_GET_CURRENT_LIMIT, "CURR?" },
1275         { SCPI_CMD_SET_CURRENT_LIMIT, "CURR %.6f" },
1276         { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP?" },
1277         { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP ON" },
1278         { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP OFF" },
1279         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, "VOLT:PROT:TRIP?" },
1280         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:PROT:LEV?" },
1281         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:PROT:LEV %.6f" },
1282         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, "VOLT:PROT:STAT?" },
1283         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, "VOLT:PROT:STAT ON" },
1284         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, "VOLT:PROT:STAT OFF" },
1285         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, "FUSE:TRIP?" },
1286         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, "FUSE:STAT?" },
1287         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, "FUSE:STAT ON" },
1288         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, "FUSE:STAT OFF" },
1289         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_DELAY, "FUSE:DEL?" },
1290         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DELAY, "FUSE:DEL %.03f" },
1291         ALL_ZERO
1292 };
1293
1294 static const uint32_t rs_hmp4040_devopts[] = {
1295         SR_CONF_CONTINUOUS,
1296         SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
1297         SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
1298 };
1299
1300 static const uint32_t rs_hmp4040_devopts_cg[] = {
1301         SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET,
1302         SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
1303         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
1304         SR_CONF_VOLTAGE | SR_CONF_GET,
1305         SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
1306         SR_CONF_CURRENT | SR_CONF_GET,
1307         SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
1308         SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
1309         SR_CONF_OVER_TEMPERATURE_PROTECTION_ACTIVE | SR_CONF_GET,
1310         SR_CONF_REGULATION | SR_CONF_GET,
1311 };
1312
1313 static const struct channel_spec rs_hmp2020_ch[] = {
1314         { "1", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 10.01, 0.0002, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
1315         { "2", { 0, 32.050, 0.001, 3, 4 }, { 0.001,  5.01, 0.0001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
1316 };
1317
1318 static const struct channel_spec rs_hmp2030_ch[] = {
1319         { "1", { 0, 32.050, 0.001, 3, 4 }, { 0.001,  5.01, 0.0001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
1320         { "2", { 0, 32.050, 0.001, 3, 4 }, { 0.001,  5.01, 0.0001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
1321         { "3", { 0, 32.050, 0.001, 3, 4 }, { 0.001,  5.01, 0.0001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
1322 };
1323
1324 static const struct channel_spec rs_hmp4040_ch[] = {
1325         { "1", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 10.01, 0.0002, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
1326         { "2", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 10.01, 0.0002, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
1327         { "3", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 10.01, 0.0002, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
1328         { "4", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 10.01, 0.0002, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS, NO_OCP_DELAY },
1329 };
1330
1331 static const struct channel_group_spec rs_hmp4040_cg[] = {
1332         { "1", CH_IDX(0), PPS_OVP | PPS_OTP, SR_MQFLAG_DC },
1333         { "2", CH_IDX(1), PPS_OVP | PPS_OTP, SR_MQFLAG_DC },
1334         { "3", CH_IDX(2), PPS_OVP | PPS_OTP, SR_MQFLAG_DC },
1335         { "4", CH_IDX(3), PPS_OVP | PPS_OTP, SR_MQFLAG_DC },
1336 };
1337
1338 /*
1339  * Developer's note: Currently unused device commands. Some of them
1340  * are not in use because SCPI_CMD codes are not defined yet.
1341  *   OUTP:GEN
1342  *   VOLT? MAX, CURR? MAX
1343  *   VOLT:PROT:CLE (could set SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE)
1344  *   VOLT:PROT:MODE
1345  *   FUSE:STAT, FUSE:TRIP?, FUSE:LINK, FUSE:UNL
1346  *   ARB:...
1347  *   SYST:LOC, SYST:REM, SYST:RWL, SYST:MIX
1348  *   SYST:BEEP:IMM
1349  */
1350 static const struct scpi_command rs_hmp4040_cmd[] = {
1351         { SCPI_CMD_REMOTE, "SYST:REM" },
1352         { SCPI_CMD_LOCAL, "SYST:LOC" },
1353         { SCPI_CMD_SELECT_CHANNEL, "INST:NSEL %s" },
1354         { SCPI_CMD_GET_MEAS_VOLTAGE, "MEAS:VOLT?" },
1355         { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" },
1356         { SCPI_CMD_GET_VOLTAGE_TARGET, "VOLT?" },
1357         { SCPI_CMD_SET_VOLTAGE_TARGET, "VOLT %.6f" },
1358         { SCPI_CMD_GET_CURRENT_LIMIT, "CURR?" },
1359         { SCPI_CMD_SET_CURRENT_LIMIT, "CURR %.6f" },
1360         { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP?" },
1361         { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP ON" },
1362         { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP OFF" },
1363         { SCPI_CMD_GET_OUTPUT_REGULATION, "STAT:QUES:INST:ISUM%s:COND?" },
1364         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, "VOLT:PROT:TRIP?" },
1365         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:PROT:LEV?" },
1366         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:PROT:LEV %.6f" },
1367         { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION_ACTIVE, "STAT:QUES:INST:ISUM%s:COND?" },
1368         ALL_ZERO
1369 };
1370
1371 SR_PRIV const struct scpi_pps pps_profiles[] = {
1372         /* Agilent N5763A */
1373         { "Agilent", "N5763A", SCPI_DIALECT_UNKNOWN, 0,
1374                 ARRAY_AND_SIZE(agilent_n5700a_devopts),
1375                 ARRAY_AND_SIZE(agilent_n5700a_devopts_cg),
1376                 ARRAY_AND_SIZE(agilent_n5763a_ch),
1377                 ARRAY_AND_SIZE(agilent_n5700a_cg),
1378                 agilent_n5700a_cmd,
1379                 .probe_channels = NULL,
1380                 .init_acquisition = NULL,
1381                 .update_status = NULL,
1382         },
1383
1384         /* Agilent N5767A */
1385         { "Agilent", "N5767A", SCPI_DIALECT_UNKNOWN, 0,
1386                 ARRAY_AND_SIZE(agilent_n5700a_devopts),
1387                 ARRAY_AND_SIZE(agilent_n5700a_devopts_cg),
1388                 ARRAY_AND_SIZE(agilent_n5767a_ch),
1389                 ARRAY_AND_SIZE(agilent_n5700a_cg),
1390                 agilent_n5700a_cmd,
1391                 .probe_channels = NULL,
1392                 .init_acquisition = NULL,
1393                 .update_status = NULL,
1394         },
1395
1396         /* BK Precision 9310 */
1397         { "BK", "^9130$", SCPI_DIALECT_UNKNOWN, 0,
1398                 ARRAY_AND_SIZE(bk_9130_devopts),
1399                 ARRAY_AND_SIZE(bk_9130_devopts_cg),
1400                 ARRAY_AND_SIZE(bk_9130_ch),
1401                 ARRAY_AND_SIZE(bk_9130_cg),
1402                 bk_9130_cmd,
1403                 .probe_channels = NULL,
1404                 .init_acquisition = NULL,
1405                 .update_status = NULL,
1406         },
1407
1408         /* Chroma 61604 */
1409         { "Chroma", "61604", SCPI_DIALECT_UNKNOWN, 0,
1410                 ARRAY_AND_SIZE(chroma_61604_devopts),
1411                 ARRAY_AND_SIZE(chroma_61604_devopts_cg),
1412                 ARRAY_AND_SIZE(chroma_61604_ch),
1413                 ARRAY_AND_SIZE(chroma_61604_cg),
1414                 chroma_61604_cmd,
1415                 .probe_channels = NULL,
1416                 .init_acquisition = NULL,
1417                 .update_status = NULL,
1418         },
1419
1420         /* Chroma 62000 series */
1421         { "Chroma", "620[0-9]{2}P-[0-9]{2,3}-[0-9]{1,3}", SCPI_DIALECT_UNKNOWN, 0,
1422                 ARRAY_AND_SIZE(chroma_62000_devopts),
1423                 ARRAY_AND_SIZE(chroma_62000_devopts_cg),
1424                 NULL, 0,
1425                 NULL, 0,
1426                 chroma_62000_cmd,
1427                 .probe_channels = chroma_62000p_probe_channels,
1428                 .init_acquisition = NULL,
1429                 .update_status = NULL,
1430         },
1431
1432         /*
1433          * Envox EEZ PSU Series
1434          * The documented identification strings disagree with the behavior
1435          * of at least some real units (returning "EEZ"). The first of these
1436          * is the documented one, while the second seems to be returned by
1437          * firmware v1.02 and earlier.
1438          */
1439         { "Envox", "^EEZ H24005 ", SCPI_DIALECT_UNKNOWN, 0,
1440                 ARRAY_AND_SIZE(eez_psu_devopts),
1441                 ARRAY_AND_SIZE(eez_psu_devopts_cg),
1442                 NULL, 0,
1443                 NULL, 0,
1444                 eez_psu_cmd,
1445                 .probe_channels = eez_psu_probe_channels,
1446                 .init_acquisition = NULL,
1447                 .update_status = NULL,
1448         },
1449         { "EEZ", "^PSU ", SCPI_DIALECT_UNKNOWN, 0,
1450                 ARRAY_AND_SIZE(eez_psu_devopts),
1451                 ARRAY_AND_SIZE(eez_psu_devopts_cg),
1452                 NULL, 0,
1453                 NULL, 0,
1454                 eez_psu_cmd,
1455                 .probe_channels = eez_psu_probe_channels,
1456                 .init_acquisition = NULL,
1457                 .update_status = NULL,
1458         },
1459
1460         /* Envox EEZ BB3 Series */
1461         { "Envox", "^BB3 ", SCPI_DIALECT_UNKNOWN, 0,
1462                 ARRAY_AND_SIZE(eez_psu_devopts),
1463                 ARRAY_AND_SIZE(eez_psu_devopts_cg),
1464                 NULL, 0,
1465                 NULL, 0,
1466                 eez_psu_cmd,
1467                 .probe_channels = eez_psu_probe_channels,
1468                 .init_acquisition = NULL,
1469                 .update_status = NULL,
1470         },
1471
1472         /*
1473          * This entry is for testing the HP COMP language with a HP 6632B power
1474          * supply switched to the COMP language ("SYST:LANG COMP"). When used,
1475          * disable the entry for the HP 6632B below!
1476          */
1477         /*
1478         { "HP", "6632B", SCPI_DIALECT_HP_COMP, 0,
1479                 ARRAY_AND_SIZE(hp_6630a_devopts),
1480                 ARRAY_AND_SIZE(hp_6630a_devopts_cg),
1481                 ARRAY_AND_SIZE(hp_6632a_ch),
1482                 ARRAY_AND_SIZE(hp_6630a_cg),
1483                 hp_6630a_cmd,
1484                 .probe_channels = NULL,
1485                 hp_6630a_init_acquisition,
1486                 hp_6630a_update_status,
1487         },
1488         */
1489
1490         /* HP 6632A */
1491         { "HP", "6632A", SCPI_DIALECT_HP_COMP, 0,
1492                 ARRAY_AND_SIZE(hp_6630a_devopts),
1493                 ARRAY_AND_SIZE(hp_6630a_devopts_cg),
1494                 ARRAY_AND_SIZE(hp_6632a_ch),
1495                 ARRAY_AND_SIZE(hp_6630a_cg),
1496                 hp_6630a_cmd,
1497                 .probe_channels = NULL,
1498                 hp_6630a_init_acquisition,
1499                 hp_6630a_update_status,
1500         },
1501
1502         /* HP 6633A */
1503         { "HP", "6633A", SCPI_DIALECT_HP_COMP, 0,
1504                 ARRAY_AND_SIZE(hp_6630a_devopts),
1505                 ARRAY_AND_SIZE(hp_6630a_devopts_cg),
1506                 ARRAY_AND_SIZE(hp_6633a_ch),
1507                 ARRAY_AND_SIZE(hp_6630a_cg),
1508                 hp_6630a_cmd,
1509                 .probe_channels = NULL,
1510                 hp_6630a_init_acquisition,
1511                 hp_6630a_update_status,
1512         },
1513
1514         /* HP 6634A */
1515         { "HP", "6634A", SCPI_DIALECT_HP_COMP, 0,
1516                 ARRAY_AND_SIZE(hp_6630a_devopts),
1517                 ARRAY_AND_SIZE(hp_6630a_devopts_cg),
1518                 ARRAY_AND_SIZE(hp_6634a_ch),
1519                 ARRAY_AND_SIZE(hp_6630a_cg),
1520                 hp_6630a_cmd,
1521                 .probe_channels = NULL,
1522                 hp_6630a_init_acquisition,
1523                 hp_6630a_update_status,
1524         },
1525
1526         /* HP 6611C */
1527         { "HP", "6611C", SCPI_DIALECT_HP_66XXB, PPS_OTP,
1528                 ARRAY_AND_SIZE(hp_6630b_devopts),
1529                 ARRAY_AND_SIZE(hp_6630b_devopts_cg),
1530                 ARRAY_AND_SIZE(hp_6611c_ch),
1531                 ARRAY_AND_SIZE(hp_6630b_cg),
1532                 hp_6630b_cmd,
1533                 .probe_channels = NULL,
1534                 hp_6630b_init_acquisition,
1535                 hp_6630b_update_status,
1536         },
1537
1538         /* HP 6612C */
1539         { "HP", "6612C", SCPI_DIALECT_HP_66XXB, PPS_OTP,
1540                 ARRAY_AND_SIZE(hp_6630b_devopts),
1541                 ARRAY_AND_SIZE(hp_6630b_devopts_cg),
1542                 ARRAY_AND_SIZE(hp_6612c_ch),
1543                 ARRAY_AND_SIZE(hp_6630b_cg),
1544                 hp_6630b_cmd,
1545                 .probe_channels = NULL,
1546                 hp_6630b_init_acquisition,
1547                 hp_6630b_update_status,
1548         },
1549
1550         /* HP 6613C */
1551         { "HP", "6613C", SCPI_DIALECT_HP_66XXB, PPS_OTP,
1552                 ARRAY_AND_SIZE(hp_6630b_devopts),
1553                 ARRAY_AND_SIZE(hp_6630b_devopts_cg),
1554                 ARRAY_AND_SIZE(hp_6613c_ch),
1555                 ARRAY_AND_SIZE(hp_6630b_cg),
1556                 hp_6630b_cmd,
1557                 .probe_channels = NULL,
1558                 hp_6630b_init_acquisition,
1559                 hp_6630b_update_status,
1560         },
1561
1562         /* HP 6614C */
1563         { "HP", "6614C", SCPI_DIALECT_HP_66XXB, PPS_OTP,
1564                 ARRAY_AND_SIZE(hp_6630b_devopts),
1565                 ARRAY_AND_SIZE(hp_6630b_devopts_cg),
1566                 ARRAY_AND_SIZE(hp_6614c_ch),
1567                 ARRAY_AND_SIZE(hp_6630b_cg),
1568                 hp_6630b_cmd,
1569                 .probe_channels = NULL,
1570                 hp_6630b_init_acquisition,
1571                 hp_6630b_update_status,
1572         },
1573
1574         /* HP 6631B */
1575         { "HP", "6631B", SCPI_DIALECT_HP_66XXB, PPS_OTP,
1576                 ARRAY_AND_SIZE(hp_6630b_devopts),
1577                 ARRAY_AND_SIZE(hp_6630b_devopts_cg),
1578                 ARRAY_AND_SIZE(hp_6631b_ch),
1579                 ARRAY_AND_SIZE(hp_6630b_cg),
1580                 hp_6630b_cmd,
1581                 .probe_channels = NULL,
1582                 hp_6630b_init_acquisition,
1583                 hp_6630b_update_status,
1584         },
1585
1586         /* HP 6632B */
1587         { "HP", "6632B", SCPI_DIALECT_HP_66XXB, PPS_OTP,
1588                 ARRAY_AND_SIZE(hp_6630b_devopts),
1589                 ARRAY_AND_SIZE(hp_6630b_devopts_cg),
1590                 ARRAY_AND_SIZE(hp_6632b_ch),
1591                 ARRAY_AND_SIZE(hp_6630b_cg),
1592                 hp_6630b_cmd,
1593                 .probe_channels = NULL,
1594                 hp_6630b_init_acquisition,
1595                 hp_6630b_update_status,
1596         },
1597
1598         /* HP 66312A */
1599         { "HP", "66312A", SCPI_DIALECT_HP_66XXB, PPS_OTP,
1600                 ARRAY_AND_SIZE(hp_6630b_devopts),
1601                 ARRAY_AND_SIZE(hp_6630b_devopts_cg),
1602                 ARRAY_AND_SIZE(hp_66312a_ch),
1603                 ARRAY_AND_SIZE(hp_6630b_cg),
1604                 hp_6630b_cmd,
1605                 .probe_channels = NULL,
1606                 hp_6630b_init_acquisition,
1607                 hp_6630b_update_status,
1608         },
1609
1610         /* HP 66332A */
1611         { "HP", "66332A", SCPI_DIALECT_HP_66XXB, PPS_OTP,
1612                 ARRAY_AND_SIZE(hp_6630b_devopts),
1613                 ARRAY_AND_SIZE(hp_6630b_devopts_cg),
1614                 ARRAY_AND_SIZE(hp_66332a_ch),
1615                 ARRAY_AND_SIZE(hp_6630b_cg),
1616                 hp_6630b_cmd,
1617                 .probe_channels = NULL,
1618                 hp_6630b_init_acquisition,
1619                 hp_6630b_update_status,
1620         },
1621
1622         /* HP 6633B */
1623         { "HP", "6633B", SCPI_DIALECT_HP_66XXB, PPS_OTP,
1624                 ARRAY_AND_SIZE(hp_6630b_devopts),
1625                 ARRAY_AND_SIZE(hp_6630b_devopts_cg),
1626                 ARRAY_AND_SIZE(hp_6633b_ch),
1627                 ARRAY_AND_SIZE(hp_6630b_cg),
1628                 hp_6630b_cmd,
1629                 .probe_channels = NULL,
1630                 hp_6630b_init_acquisition,
1631                 hp_6630b_update_status,
1632         },
1633
1634         /* HP 6634B */
1635         { "HP", "6634B", SCPI_DIALECT_HP_66XXB, PPS_OTP,
1636                 ARRAY_AND_SIZE(hp_6630b_devopts),
1637                 ARRAY_AND_SIZE(hp_6630b_devopts_cg),
1638                 ARRAY_AND_SIZE(hp_6634b_ch),
1639                 ARRAY_AND_SIZE(hp_6630b_cg),
1640                 hp_6630b_cmd,
1641                 .probe_channels = NULL,
1642                 hp_6630b_init_acquisition,
1643                 hp_6630b_update_status,
1644         },
1645
1646         /* Rigol DP700 series */
1647         { "Rigol", "^DP711$", SCPI_DIALECT_UNKNOWN, 0,
1648                 ARRAY_AND_SIZE(rigol_dp700_devopts),
1649                 ARRAY_AND_SIZE(rigol_dp700_devopts_cg),
1650                 ARRAY_AND_SIZE(rigol_dp711_ch),
1651                 ARRAY_AND_SIZE(rigol_dp700_cg),
1652                 rigol_dp700_cmd,
1653                 .probe_channels = NULL,
1654                 .init_acquisition = NULL,
1655                 .update_status = NULL,
1656         },
1657         { "Rigol", "^DP712$", SCPI_DIALECT_UNKNOWN, 0,
1658                 ARRAY_AND_SIZE(rigol_dp700_devopts),
1659                 ARRAY_AND_SIZE(rigol_dp700_devopts_cg),
1660                 ARRAY_AND_SIZE(rigol_dp712_ch),
1661                 ARRAY_AND_SIZE(rigol_dp700_cg),
1662                 rigol_dp700_cmd,
1663                 .probe_channels = NULL,
1664                 .init_acquisition = NULL,
1665                 .update_status = NULL,
1666         },
1667
1668         /* Rigol DP800 series */
1669         { "Rigol", "^DP821A$", SCPI_DIALECT_UNKNOWN, PPS_OTP,
1670                 ARRAY_AND_SIZE(rigol_dp800_devopts),
1671                 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
1672                 ARRAY_AND_SIZE(rigol_dp821a_ch),
1673                 ARRAY_AND_SIZE(rigol_dp820_cg),
1674                 rigol_dp800_cmd,
1675                 .probe_channels = NULL,
1676                 .init_acquisition = NULL,
1677                 .update_status = NULL,
1678         },
1679         { "Rigol", "^DP831A$", SCPI_DIALECT_UNKNOWN, PPS_OTP,
1680                 ARRAY_AND_SIZE(rigol_dp800_devopts),
1681                 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
1682                 ARRAY_AND_SIZE(rigol_dp831_ch),
1683                 ARRAY_AND_SIZE(rigol_dp830_cg),
1684                 rigol_dp800_cmd,
1685                 .probe_channels = NULL,
1686                 .init_acquisition = NULL,
1687                 .update_status = NULL,
1688         },
1689         { "Rigol", "^(DP832|DP832A)$", SCPI_DIALECT_UNKNOWN, PPS_OTP,
1690                 ARRAY_AND_SIZE(rigol_dp800_devopts),
1691                 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
1692                 ARRAY_AND_SIZE(rigol_dp832_ch),
1693                 ARRAY_AND_SIZE(rigol_dp830_cg),
1694                 rigol_dp800_cmd,
1695                 .probe_channels = NULL,
1696                 .init_acquisition = NULL,
1697                 .update_status = NULL,
1698         },
1699
1700         /* Owon P4000 series */
1701         { "OWON", "^P4305$", SCPI_DIALECT_UNKNOWN, 0,
1702                 ARRAY_AND_SIZE(owon_p4000_devopts),
1703                 ARRAY_AND_SIZE(owon_p4000_devopts_cg),
1704                 ARRAY_AND_SIZE(owon_p4305_ch),
1705                 ARRAY_AND_SIZE(owon_p4000_cg),
1706                 owon_p4000_cmd,
1707                 .probe_channels = NULL,
1708                 .init_acquisition = NULL,
1709                 .update_status = NULL,
1710         },
1711         { "OWON", "^P4603$", SCPI_DIALECT_UNKNOWN, 0,
1712                 ARRAY_AND_SIZE(owon_p4000_devopts),
1713                 ARRAY_AND_SIZE(owon_p4000_devopts_cg),
1714                 ARRAY_AND_SIZE(owon_p4603_ch),
1715                 ARRAY_AND_SIZE(owon_p4000_cg),
1716                 owon_p4000_cmd,
1717                 .probe_channels = NULL,
1718                 .init_acquisition = NULL,
1719                 .update_status = NULL,
1720         },
1721
1722         { "OWON", "^SPE6103$", SCPI_DIALECT_UNKNOWN, 0,
1723                 ARRAY_AND_SIZE(owon_p4000_devopts),
1724                 ARRAY_AND_SIZE(owon_p4000_devopts_cg),
1725                 ARRAY_AND_SIZE(owon_spe6103_ch),
1726                 ARRAY_AND_SIZE(owon_p4000_cg),
1727                 owon_spe6103_cmd,
1728                 .probe_channels = NULL,
1729                 .init_acquisition = NULL,
1730                 .update_status = NULL,
1731         },
1732
1733         /* Philips/Fluke PM2800 series */
1734         { "Philips", "^PM28[13][123]/[01234]{1,2}$", SCPI_DIALECT_PHILIPS, 0,
1735                 ARRAY_AND_SIZE(philips_pm2800_devopts),
1736                 ARRAY_AND_SIZE(philips_pm2800_devopts_cg),
1737                 NULL, 0,
1738                 NULL, 0,
1739                 philips_pm2800_cmd,
1740                 philips_pm2800_probe_channels,
1741                 .init_acquisition = NULL,
1742                 .update_status = NULL,
1743         },
1744
1745         /* Rohde & Schwarz HMC8042 */
1746         { "Rohde&Schwarz", "HMC8042", SCPI_DIALECT_UNKNOWN, 0,
1747                 ARRAY_AND_SIZE(rs_hmc8043_devopts),
1748                 ARRAY_AND_SIZE(rs_hmc8043_devopts_cg),
1749                 rs_hmc8043_ch, 2,
1750                 rs_hmc8043_cg, 2,
1751                 rs_hmc8043_cmd,
1752                 .probe_channels = NULL,
1753                 .init_acquisition = NULL,
1754                 .update_status = NULL,
1755         },
1756
1757         /* Rohde & Schwarz HMC8043 */
1758         { "Rohde&Schwarz", "HMC8043", SCPI_DIALECT_UNKNOWN, 0,
1759                 ARRAY_AND_SIZE(rs_hmc8043_devopts),
1760                 ARRAY_AND_SIZE(rs_hmc8043_devopts_cg),
1761                 ARRAY_AND_SIZE(rs_hmc8043_ch),
1762                 ARRAY_AND_SIZE(rs_hmc8043_cg),
1763                 rs_hmc8043_cmd,
1764                 .probe_channels = NULL,
1765                 .init_acquisition = NULL,
1766                 .update_status = NULL,
1767         },
1768
1769         /* Hameg / Rohde&Schwarz HMP4000 series */
1770         /* TODO Match on regex, pass scpi_pps item to .probe_channels(). */
1771         { "HAMEG", "HMP4030", SCPI_DIALECT_HMP, 0,
1772                 ARRAY_AND_SIZE(rs_hmp4040_devopts),
1773                 ARRAY_AND_SIZE(rs_hmp4040_devopts_cg),
1774                 rs_hmp4040_ch, 3,
1775                 rs_hmp4040_cg, 3,
1776                 rs_hmp4040_cmd,
1777                 .probe_channels = NULL,
1778                 .init_acquisition = NULL,
1779                 .update_status = NULL,
1780         },
1781         { "HAMEG", "HMP4040", SCPI_DIALECT_HMP, 0,
1782                 ARRAY_AND_SIZE(rs_hmp4040_devopts),
1783                 ARRAY_AND_SIZE(rs_hmp4040_devopts_cg),
1784                 ARRAY_AND_SIZE(rs_hmp4040_ch),
1785                 ARRAY_AND_SIZE(rs_hmp4040_cg),
1786                 rs_hmp4040_cmd,
1787                 .probe_channels = NULL,
1788                 .init_acquisition = NULL,
1789                 .update_status = NULL,
1790         },
1791         { "ROHDE&SCHWARZ", "HMP2020", SCPI_DIALECT_HMP, 0,
1792                 ARRAY_AND_SIZE(rs_hmp4040_devopts),
1793                 ARRAY_AND_SIZE(rs_hmp4040_devopts_cg),
1794                 rs_hmp2020_ch, 2,
1795                 rs_hmp4040_cg, 2,
1796                 rs_hmp4040_cmd,
1797                 .probe_channels = NULL,
1798                 .init_acquisition = NULL,
1799                 .update_status = NULL,
1800         },
1801         { "ROHDE&SCHWARZ", "HMP2030", SCPI_DIALECT_HMP, 0,
1802                 ARRAY_AND_SIZE(rs_hmp4040_devopts),
1803                 ARRAY_AND_SIZE(rs_hmp4040_devopts_cg),
1804                 rs_hmp2030_ch, 3,
1805                 rs_hmp4040_cg, 3,
1806                 rs_hmp4040_cmd,
1807                 .probe_channels = NULL,
1808                 .init_acquisition = NULL,
1809                 .update_status = NULL,
1810         },
1811         { "ROHDE&SCHWARZ", "HMP4030", SCPI_DIALECT_HMP, 0,
1812                 ARRAY_AND_SIZE(rs_hmp4040_devopts),
1813                 ARRAY_AND_SIZE(rs_hmp4040_devopts_cg),
1814                 rs_hmp4040_ch, 3,
1815                 rs_hmp4040_cg, 3,
1816                 rs_hmp4040_cmd,
1817                 .probe_channels = NULL,
1818                 .init_acquisition = NULL,
1819                 .update_status = NULL,
1820         },
1821         { "ROHDE&SCHWARZ", "HMP4040", SCPI_DIALECT_HMP, 0,
1822                 ARRAY_AND_SIZE(rs_hmp4040_devopts),
1823                 ARRAY_AND_SIZE(rs_hmp4040_devopts_cg),
1824                 ARRAY_AND_SIZE(rs_hmp4040_ch),
1825                 ARRAY_AND_SIZE(rs_hmp4040_cg),
1826                 rs_hmp4040_cmd,
1827                 .probe_channels = NULL,
1828                 .init_acquisition = NULL,
1829                 .update_status = NULL,
1830         },
1831 };
1832
1833 SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles);