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f4816ac6 ML |
1 | /* |
2 | * This file is part of the libsigrok project. | |
3 | * | |
4 | * Copyright (C) 2012 Martin Ling <martin-git@earth.li> | |
88e429c9 | 5 | * Copyright (C) 2013 Bert Vermeulen <bert@biot.com> |
bafd4890 | 6 | * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de> |
f4816ac6 ML |
7 | * |
8 | * This program is free software: you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation, either version 3 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | ||
6ec6c43b | 22 | #include <config.h> |
e0b7d23c ML |
23 | #include <fcntl.h> |
24 | #include <unistd.h> | |
25 | #include <stdlib.h> | |
26 | #include <string.h> | |
ba464a12 | 27 | #include <strings.h> |
2b0e4a46 | 28 | #include <math.h> |
f4816ac6 | 29 | #include <glib.h> |
c1aae900 | 30 | #include <libsigrok/libsigrok.h> |
f4816ac6 | 31 | #include "libsigrok-internal.h" |
5a1afc09 | 32 | #include "scpi.h" |
f4816ac6 ML |
33 | #include "protocol.h" |
34 | ||
a0e0bb41 | 35 | static const uint32_t scanopts[] = { |
ca55277c | 36 | SR_CONF_CONN, |
05199c0a | 37 | SR_CONF_SERIALCOMM, |
ca55277c ML |
38 | }; |
39 | ||
d73aacf1 | 40 | static const uint32_t drvopts[] = { |
1953564a | 41 | SR_CONF_OSCILLOSCOPE, |
d73aacf1 SA |
42 | }; |
43 | ||
44 | static const uint32_t devopts[] = { | |
5827f61b | 45 | SR_CONF_LIMIT_FRAMES | SR_CONF_SET, |
86621306 | 46 | SR_CONF_SAMPLERATE | SR_CONF_GET, |
5827f61b | 47 | SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
86621306 UH |
48 | SR_CONF_NUM_HDIV | SR_CONF_GET, |
49 | SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET, | |
5827f61b | 50 | SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
b0c9d1d1 | 51 | SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
9ea62f2e | 52 | SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET, |
f579d08b | 53 | SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
f48e0249 ML |
54 | }; |
55 | ||
6b82c3e5 | 56 | static const uint32_t devopts_cg_analog[] = { |
5827f61b BV |
57 | SR_CONF_NUM_VDIV | SR_CONF_GET, |
58 | SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
59 | SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
934cf6cf | 60 | SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
e0b7d23c ML |
61 | }; |
62 | ||
f6a0ac9f | 63 | static const uint64_t timebases[][2] = { |
e0b7d23c | 64 | /* nanoseconds */ |
8e06edf5 | 65 | { 1, 1000000000 }, |
e0b7d23c ML |
66 | { 2, 1000000000 }, |
67 | { 5, 1000000000 }, | |
68 | { 10, 1000000000 }, | |
69 | { 20, 1000000000 }, | |
70 | { 50, 1000000000 }, | |
71 | { 100, 1000000000 }, | |
72 | { 500, 1000000000 }, | |
73 | /* microseconds */ | |
74 | { 1, 1000000 }, | |
75 | { 2, 1000000 }, | |
76 | { 5, 1000000 }, | |
77 | { 10, 1000000 }, | |
78 | { 20, 1000000 }, | |
79 | { 50, 1000000 }, | |
80 | { 100, 1000000 }, | |
81 | { 200, 1000000 }, | |
82 | { 500, 1000000 }, | |
83 | /* milliseconds */ | |
84 | { 1, 1000 }, | |
85 | { 2, 1000 }, | |
86 | { 5, 1000 }, | |
87 | { 10, 1000 }, | |
88 | { 20, 1000 }, | |
89 | { 50, 1000 }, | |
90 | { 100, 1000 }, | |
91 | { 200, 1000 }, | |
92 | { 500, 1000 }, | |
93 | /* seconds */ | |
94 | { 1, 1 }, | |
95 | { 2, 1 }, | |
96 | { 5, 1 }, | |
97 | { 10, 1 }, | |
98 | { 20, 1 }, | |
99 | { 50, 1 }, | |
bafd4890 ML |
100 | { 100, 1 }, |
101 | { 200, 1 }, | |
102 | { 500, 1 }, | |
8e06edf5 | 103 | { 1000, 1 }, |
e0b7d23c ML |
104 | }; |
105 | ||
f6a0ac9f | 106 | static const uint64_t vdivs[][2] = { |
bafd4890 ML |
107 | /* microvolts */ |
108 | { 500, 1000000 }, | |
e0b7d23c | 109 | /* millivolts */ |
bafd4890 | 110 | { 1, 1000 }, |
e0b7d23c ML |
111 | { 2, 1000 }, |
112 | { 5, 1000 }, | |
113 | { 10, 1000 }, | |
114 | { 20, 1000 }, | |
115 | { 50, 1000 }, | |
116 | { 100, 1000 }, | |
117 | { 200, 1000 }, | |
118 | { 500, 1000 }, | |
119 | /* volts */ | |
120 | { 1, 1 }, | |
121 | { 2, 1 }, | |
122 | { 5, 1 }, | |
123 | { 10, 1 }, | |
d50725e0 UH |
124 | { 20, 1 }, |
125 | { 50, 1 }, | |
126 | { 100, 1 }, | |
e0b7d23c ML |
127 | }; |
128 | ||
129 | static const char *trigger_sources[] = { | |
130 | "CH1", | |
131 | "CH2", | |
821fbcad ML |
132 | "CH3", |
133 | "CH4", | |
e0b7d23c ML |
134 | "EXT", |
135 | "AC Line", | |
6bb192bc ML |
136 | "D0", |
137 | "D1", | |
138 | "D2", | |
139 | "D3", | |
140 | "D4", | |
141 | "D5", | |
142 | "D6", | |
143 | "D7", | |
144 | "D8", | |
145 | "D9", | |
146 | "D10", | |
147 | "D11", | |
148 | "D12", | |
149 | "D13", | |
150 | "D14", | |
151 | "D15", | |
e0b7d23c ML |
152 | }; |
153 | ||
5d336f11 AJ |
154 | static const char *trigger_slopes[] = { |
155 | "r", | |
156 | "f", | |
157 | }; | |
158 | ||
e0b7d23c ML |
159 | static const char *coupling[] = { |
160 | "AC", | |
161 | "DC", | |
162 | "GND", | |
e0b7d23c ML |
163 | }; |
164 | ||
934cf6cf AJ |
165 | static const uint64_t probe_factor[] = { |
166 | 1, | |
167 | 2, | |
168 | 5, | |
169 | 10, | |
170 | 20, | |
171 | 50, | |
172 | 100, | |
173 | 200, | |
174 | 500, | |
175 | 1000, | |
176 | }; | |
177 | ||
babab622 ML |
178 | /* Do not change the order of entries */ |
179 | static const char *data_sources[] = { | |
180 | "Live", | |
181 | "Memory", | |
182 | "Segmented", | |
183 | }; | |
184 | ||
569d4dbd ML |
185 | enum vendor { |
186 | RIGOL, | |
187 | AGILENT, | |
188 | }; | |
189 | ||
190 | enum series { | |
191 | VS5000, | |
192 | DS1000, | |
193 | DS2000, | |
194 | DS2000A, | |
195 | DSO1000, | |
702f42e8 | 196 | DS1000Z, |
569d4dbd | 197 | }; |
10afee13 | 198 | |
569d4dbd ML |
199 | /* short name, full name */ |
200 | static const struct rigol_ds_vendor supported_vendors[] = { | |
201 | [RIGOL] = {"Rigol", "Rigol Technologies"}, | |
14e1aa6d | 202 | [AGILENT] = {"Agilent", "Agilent Technologies"}, |
569d4dbd ML |
203 | }; |
204 | ||
205 | #define VENDOR(x) &supported_vendors[x] | |
206 | /* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs, | |
207 | * live waveform samples, memory buffer samples */ | |
208 | static const struct rigol_ds_series supported_series[] = { | |
209 | [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW, | |
210 | {50, 1}, {2, 1000}, 14, 2048, 0}, | |
211 | [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2, | |
212 | {50, 1}, {2, 1000}, 12, 600, 1048576}, | |
213 | [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2, | |
96cb7faa | 214 | {500, 1}, {500, 1000000}, 14, 1400, 14000}, |
569d4dbd ML |
215 | [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2, |
216 | {1000, 1}, {500, 1000000}, 14, 1400, 14000}, | |
217 | [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2, | |
218 | {50, 1}, {2, 1000}, 12, 600, 20480}, | |
702f42e8 ML |
219 | [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2, |
220 | {50, 1}, {1, 1000}, 12, 1200, 12000000}, | |
569d4dbd | 221 | }; |
10afee13 | 222 | |
569d4dbd ML |
223 | #define SERIES(x) &supported_series[x] |
224 | /* series, model, min timebase, analog channels, digital */ | |
bafd4890 | 225 | static const struct rigol_ds_model supported_models[] = { |
569d4dbd ML |
226 | {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false}, |
227 | {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false}, | |
228 | {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false}, | |
229 | {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false}, | |
230 | {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false}, | |
231 | {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true}, | |
232 | {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true}, | |
233 | {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true}, | |
234 | {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true}, | |
235 | {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true}, | |
236 | {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false}, | |
237 | {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false}, | |
238 | {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false}, | |
239 | {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true}, | |
240 | {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true}, | |
241 | {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true}, | |
242 | {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false}, | |
243 | {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false}, | |
244 | {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false}, | |
245 | {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false}, | |
246 | {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false}, | |
247 | {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false}, | |
248 | {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false}, | |
249 | {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false}, | |
09f24ef2 ML |
250 | {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, 2, true}, |
251 | {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, 2, true}, | |
252 | {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, 2, true}, | |
253 | {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, 2, true}, | |
569d4dbd ML |
254 | {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false}, |
255 | {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false}, | |
256 | {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false}, | |
257 | {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false}, | |
258 | {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false}, | |
259 | {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false}, | |
702f42e8 ML |
260 | {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, 4, false}, |
261 | {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, 4, false}, | |
262 | {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, 4, false}, | |
263 | {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, 4, false}, | |
264 | {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, 4, false}, | |
d53295e6 KK |
265 | {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, 4, false}, |
266 | {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, 4, false}, | |
702f42e8 ML |
267 | {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, 4, true}, |
268 | {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, 4, true}, | |
269 | {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, 4, true}, | |
270 | {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, 4, true}, | |
512bb890 BV |
271 | }; |
272 | ||
dd5c48a6 | 273 | static struct sr_dev_driver rigol_ds_driver_info; |
f4816ac6 | 274 | |
3553451f | 275 | static void clear_helper(struct dev_context *devc) |
f4816ac6 | 276 | { |
effb9dd1 | 277 | unsigned int i; |
f4816ac6 | 278 | |
babab622 ML |
279 | g_free(devc->data); |
280 | g_free(devc->buffer); | |
effb9dd1 AJ |
281 | for (i = 0; i < ARRAY_SIZE(devc->coupling); i++) |
282 | g_free(devc->coupling[i]); | |
fa85f376 UH |
283 | g_free(devc->trigger_source); |
284 | g_free(devc->trigger_slope); | |
562b7ae5 | 285 | g_free(devc->analog_groups); |
fa85f376 | 286 | } |
f4816ac6 | 287 | |
4f840ce9 | 288 | static int dev_clear(const struct sr_dev_driver *di) |
fa85f376 | 289 | { |
3553451f | 290 | return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper); |
f4816ac6 ML |
291 | } |
292 | ||
9d3ae01b | 293 | static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi) |
f4816ac6 | 294 | { |
cc9fd2d2 BV |
295 | struct dev_context *devc; |
296 | struct sr_dev_inst *sdi; | |
ae1bc1cc | 297 | struct sr_scpi_hw_info *hw_info; |
ba7dd8bb | 298 | struct sr_channel *ch; |
8dd0b290 | 299 | long n[3]; |
f6a0ac9f | 300 | unsigned int i; |
bafd4890 | 301 | const struct rigol_ds_model *model = NULL; |
569d4dbd | 302 | gchar *channel_name, **version; |
fb6e5ba8 | 303 | |
ae1bc1cc | 304 | if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) { |
05238d28 ML |
305 | sr_info("Couldn't get IDN response, retrying."); |
306 | sr_scpi_close(scpi); | |
307 | sr_scpi_open(scpi); | |
308 | if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) { | |
309 | sr_info("Couldn't get IDN response."); | |
310 | return NULL; | |
311 | } | |
ca55277c | 312 | } |
e0b7d23c | 313 | |
ca55277c | 314 | for (i = 0; i < ARRAY_SIZE(supported_models); i++) { |
34577da6 | 315 | if (!g_ascii_strcasecmp(hw_info->manufacturer, |
569d4dbd | 316 | supported_models[i].series->vendor->full_name) && |
10afee13 | 317 | !strcmp(hw_info->model, supported_models[i].name)) { |
bafd4890 | 318 | model = &supported_models[i]; |
ca55277c | 319 | break; |
fb6e5ba8 | 320 | } |
ca55277c | 321 | } |
fb6e5ba8 | 322 | |
0af636be | 323 | if (!model) { |
ae1bc1cc | 324 | sr_scpi_hw_info_free(hw_info); |
9d3ae01b | 325 | return NULL; |
ca55277c | 326 | } |
fb6e5ba8 | 327 | |
aac29cc1 | 328 | sdi = g_malloc0(sizeof(struct sr_dev_inst)); |
0af636be UH |
329 | sdi->vendor = g_strdup(model->series->vendor->name); |
330 | sdi->model = g_strdup(model->name); | |
331 | sdi->version = g_strdup(hw_info->firmware_version); | |
ae1bc1cc | 332 | sdi->conn = scpi; |
4f840ce9 | 333 | sdi->driver = &rigol_ds_driver_info; |
ae1bc1cc | 334 | sdi->inst_type = SR_INST_SCPI; |
b3fccc85 | 335 | sdi->serial_num = g_strdup(hw_info->serial_number); |
f57d8ffe | 336 | devc = g_malloc0(sizeof(struct dev_context)); |
cc9fd2d2 | 337 | devc->limit_frames = 0; |
bafd4890 | 338 | devc->model = model; |
569d4dbd | 339 | devc->format = model->series->format; |
8dd0b290 | 340 | |
569d4dbd ML |
341 | /* DS1000 models with firmware before 0.2.4 used the old data format. */ |
342 | if (model->series == SERIES(DS1000)) { | |
8dd0b290 BV |
343 | version = g_strsplit(hw_info->firmware_version, ".", 0); |
344 | do { | |
345 | if (!version[0] || !version[1] || !version[2]) | |
346 | break; | |
347 | if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0) | |
348 | break; | |
349 | for (i = 0; i < 3; i++) { | |
350 | if (sr_atol(version[i], &n[i]) != SR_OK) | |
351 | break; | |
352 | } | |
353 | if (i != 3) | |
354 | break; | |
de285cce BV |
355 | scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2]; |
356 | if (scpi->firmware_version < 24) { | |
357 | sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format."); | |
358 | devc->format = FORMAT_RAW; | |
359 | } | |
360 | break; | |
0c5f2abc | 361 | } while (0); |
8dd0b290 BV |
362 | g_strfreev(version); |
363 | } | |
364 | ||
365 | sr_scpi_hw_info_free(hw_info); | |
512bb890 | 366 | |
562b7ae5 SA |
367 | devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) * |
368 | model->analog_channels); | |
369 | ||
821fbcad | 370 | for (i = 0; i < model->analog_channels; i++) { |
eac0c613 | 371 | channel_name = g_strdup_printf("CH%d", i + 1); |
5e23fcab | 372 | ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name); |
562b7ae5 SA |
373 | |
374 | devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group)); | |
375 | ||
376 | devc->analog_groups[i]->name = channel_name; | |
377 | devc->analog_groups[i]->channels = g_slist_append(NULL, ch); | |
660e398f | 378 | sdi->channel_groups = g_slist_append(sdi->channel_groups, |
562b7ae5 | 379 | devc->analog_groups[i]); |
ca55277c | 380 | } |
512bb890 | 381 | |
bafd4890 | 382 | if (devc->model->has_digital) { |
16aca766 | 383 | devc->digital_group = g_malloc0(sizeof(struct sr_channel_group)); |
562b7ae5 | 384 | |
effb9dd1 | 385 | for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) { |
eac0c613 | 386 | channel_name = g_strdup_printf("D%d", i); |
5e23fcab | 387 | ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name); |
ca55277c | 388 | g_free(channel_name); |
562b7ae5 SA |
389 | devc->digital_group->channels = g_slist_append( |
390 | devc->digital_group->channels, ch); | |
512bb890 | 391 | } |
562b7ae5 | 392 | devc->digital_group->name = g_strdup("LA"); |
660e398f | 393 | sdi->channel_groups = g_slist_append(sdi->channel_groups, |
562b7ae5 | 394 | devc->digital_group); |
ca55277c | 395 | } |
bafd4890 | 396 | |
396cdca0 | 397 | for (i = 0; i < ARRAY_SIZE(timebases); i++) { |
bafd4890 ML |
398 | if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2]))) |
399 | devc->timebases = &timebases[i]; | |
569d4dbd | 400 | if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2]))) |
bafd4890 ML |
401 | devc->num_timebases = &timebases[i] - devc->timebases + 1; |
402 | } | |
403 | ||
396cdca0 | 404 | for (i = 0; i < ARRAY_SIZE(vdivs); i++) { |
a95f142e UH |
405 | if (!memcmp(&devc->model->series->min_vdiv, |
406 | &vdivs[i], sizeof(uint64_t[2]))) { | |
6ff1394e | 407 | devc->vdivs = &vdivs[i]; |
396cdca0 | 408 | devc->num_vdivs = ARRAY_SIZE(vdivs) - i; |
81b85663 | 409 | } |
a95f142e | 410 | } |
bafd4890 | 411 | |
a95f142e UH |
412 | devc->buffer = g_malloc(ACQ_BUFFER_SIZE); |
413 | devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float)); | |
babab622 ML |
414 | |
415 | devc->data_source = DATA_SOURCE_LIVE; | |
416 | ||
cc9fd2d2 BV |
417 | sdi->priv = devc; |
418 | ||
9d3ae01b | 419 | return sdi; |
ca55277c | 420 | } |
512bb890 | 421 | |
4f840ce9 | 422 | static GSList *scan(struct sr_dev_driver *di, GSList *options) |
ca55277c | 423 | { |
41812aca | 424 | return sr_scpi_scan(di->context, options, probe_device); |
f4816ac6 ML |
425 | } |
426 | ||
6078d2c9 | 427 | static int dev_open(struct sr_dev_inst *sdi) |
f4816ac6 | 428 | { |
e1b5b7e7 | 429 | int ret; |
ae1bc1cc | 430 | struct sr_scpi_dev_inst *scpi = sdi->conn; |
9bd4c956 | 431 | |
e1b5b7e7 UH |
432 | if ((ret = sr_scpi_open(scpi)) < 0) { |
433 | sr_err("Failed to open SCPI device: %s.", sr_strerror(ret)); | |
e0b7d23c | 434 | return SR_ERR; |
e1b5b7e7 | 435 | } |
e0b7d23c | 436 | |
e1b5b7e7 UH |
437 | if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) { |
438 | sr_err("Failed to get device config: %s.", sr_strerror(ret)); | |
254dd102 | 439 | return SR_ERR; |
e1b5b7e7 | 440 | } |
f4816ac6 ML |
441 | |
442 | return SR_OK; | |
443 | } | |
444 | ||
6078d2c9 | 445 | static int dev_close(struct sr_dev_inst *sdi) |
f4816ac6 | 446 | { |
ae1bc1cc | 447 | struct sr_scpi_dev_inst *scpi; |
22c19688 | 448 | struct dev_context *devc; |
ae1bc1cc ML |
449 | |
450 | scpi = sdi->conn; | |
22c19688 ML |
451 | devc = sdi->priv; |
452 | ||
f1ba6b4b UH |
453 | if (!scpi) |
454 | return SR_ERR_BUG; | |
455 | ||
6e94eb41 | 456 | if (devc->model->series->protocol == PROTOCOL_V2) |
38354d9d | 457 | rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE"); |
e0b7d23c | 458 | |
f1ba6b4b | 459 | return sr_scpi_close(scpi); |
f4816ac6 ML |
460 | } |
461 | ||
5415e602 ML |
462 | static int analog_frame_size(const struct sr_dev_inst *sdi) |
463 | { | |
464 | struct dev_context *devc = sdi->priv; | |
ba7dd8bb UH |
465 | struct sr_channel *ch; |
466 | int analog_channels = 0; | |
5415e602 ML |
467 | GSList *l; |
468 | ||
ba7dd8bb UH |
469 | for (l = sdi->channels; l; l = l->next) { |
470 | ch = l->data; | |
3f239f08 | 471 | if (ch->type == SR_CHANNEL_ANALOG && ch->enabled) |
ba7dd8bb | 472 | analog_channels++; |
569d4dbd ML |
473 | } |
474 | ||
ba7dd8bb | 475 | if (analog_channels == 0) |
824eb2ac ML |
476 | return 0; |
477 | ||
569d4dbd ML |
478 | switch (devc->data_source) { |
479 | case DATA_SOURCE_LIVE: | |
480 | return devc->model->series->live_samples; | |
481 | case DATA_SOURCE_MEMORY: | |
ba7dd8bb | 482 | return devc->model->series->buffer_samples / analog_channels; |
470140fc | 483 | default: |
569d4dbd | 484 | return 0; |
5415e602 ML |
485 | } |
486 | } | |
487 | ||
d22250a9 ML |
488 | static int digital_frame_size(const struct sr_dev_inst *sdi) |
489 | { | |
490 | struct dev_context *devc = sdi->priv; | |
491 | ||
569d4dbd ML |
492 | switch (devc->data_source) { |
493 | case DATA_SOURCE_LIVE: | |
494 | return devc->model->series->live_samples * 2; | |
495 | case DATA_SOURCE_MEMORY: | |
496 | return devc->model->series->buffer_samples * 2; | |
d22250a9 ML |
497 | default: |
498 | return 0; | |
499 | } | |
500 | } | |
501 | ||
584560f1 | 502 | static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi, |
53b4680f | 503 | const struct sr_channel_group *cg) |
d62d7ad1 | 504 | { |
e43fdd8d | 505 | struct dev_context *devc; |
ba7dd8bb | 506 | struct sr_channel *ch; |
2b0e4a46 | 507 | const char *tmp_str; |
c2b394d5 | 508 | uint64_t samplerate; |
2b0e4a46 | 509 | int analog_channel = -1; |
c33ff377 | 510 | float smallest_diff = INFINITY; |
2b0e4a46 AJ |
511 | int idx = -1; |
512 | unsigned i; | |
d62d7ad1 | 513 | |
709468ba | 514 | if (!sdi) |
e43fdd8d BV |
515 | return SR_ERR_ARG; |
516 | ||
709468ba UH |
517 | devc = sdi->priv; |
518 | ||
660e398f | 519 | /* If a channel group is specified, it must be a valid one. */ |
53b4680f | 520 | if (cg && !g_slist_find(sdi->channel_groups, cg)) { |
660e398f | 521 | sr_err("Invalid channel group specified."); |
969edf63 | 522 | return SR_ERR; |
be60a9e4 BV |
523 | } |
524 | ||
53b4680f | 525 | if (cg) { |
ba7dd8bb UH |
526 | ch = g_slist_nth_data(cg->channels, 0); |
527 | if (!ch) | |
2b0e4a46 | 528 | return SR_ERR; |
3f239f08 | 529 | if (ch->type == SR_CHANNEL_ANALOG) { |
ba7dd8bb | 530 | if (ch->name[2] < '1' || ch->name[2] > '4') |
2b0e4a46 | 531 | return SR_ERR; |
ba7dd8bb | 532 | analog_channel = ch->name[2] - '1'; |
2b0e4a46 AJ |
533 | } |
534 | } | |
535 | ||
584560f1 | 536 | switch (key) { |
bf622e6d | 537 | case SR_CONF_NUM_HDIV: |
569d4dbd | 538 | *data = g_variant_new_int32(devc->model->series->num_horizontal_divs); |
d62d7ad1 BV |
539 | break; |
540 | case SR_CONF_NUM_VDIV: | |
81b85663 | 541 | *data = g_variant_new_int32(devc->num_vdivs); |
f44f7e61 | 542 | break; |
babab622 ML |
543 | case SR_CONF_DATA_SOURCE: |
544 | if (devc->data_source == DATA_SOURCE_LIVE) | |
545 | *data = g_variant_new_string("Live"); | |
546 | else if (devc->data_source == DATA_SOURCE_MEMORY) | |
547 | *data = g_variant_new_string("Memory"); | |
548 | else | |
549 | *data = g_variant_new_string("Segmented"); | |
550 | break; | |
4914dd4b ML |
551 | case SR_CONF_SAMPLERATE: |
552 | if (devc->data_source == DATA_SOURCE_LIVE) { | |
c2b394d5 | 553 | samplerate = analog_frame_size(sdi) / |
569d4dbd | 554 | (devc->timebase * devc->model->series->num_horizontal_divs); |
4914dd4b | 555 | *data = g_variant_new_uint64(samplerate); |
c2b394d5 | 556 | } else { |
e1b5b7e7 | 557 | sr_dbg("Unknown data source: %d.", devc->data_source); |
4914dd4b | 558 | return SR_ERR_NA; |
c2b394d5 | 559 | } |
4914dd4b | 560 | break; |
2b0e4a46 AJ |
561 | case SR_CONF_TRIGGER_SOURCE: |
562 | if (!strcmp(devc->trigger_source, "ACL")) | |
563 | tmp_str = "AC Line"; | |
564 | else if (!strcmp(devc->trigger_source, "CHAN1")) | |
565 | tmp_str = "CH1"; | |
566 | else if (!strcmp(devc->trigger_source, "CHAN2")) | |
567 | tmp_str = "CH2"; | |
568 | else if (!strcmp(devc->trigger_source, "CHAN3")) | |
569 | tmp_str = "CH3"; | |
570 | else if (!strcmp(devc->trigger_source, "CHAN4")) | |
571 | tmp_str = "CH4"; | |
572 | else | |
573 | tmp_str = devc->trigger_source; | |
574 | *data = g_variant_new_string(tmp_str); | |
575 | break; | |
5d336f11 | 576 | case SR_CONF_TRIGGER_SLOPE: |
e1b5b7e7 | 577 | if (!strncmp(devc->trigger_slope, "POS", 3)) { |
5d336f11 | 578 | tmp_str = "r"; |
e1b5b7e7 | 579 | } else if (!strncmp(devc->trigger_slope, "NEG", 3)) { |
5d336f11 | 580 | tmp_str = "f"; |
e1b5b7e7 UH |
581 | } else { |
582 | sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope); | |
5d336f11 | 583 | return SR_ERR_NA; |
e1b5b7e7 | 584 | } |
5d336f11 AJ |
585 | *data = g_variant_new_string(tmp_str); |
586 | break; | |
9ea62f2e AJ |
587 | case SR_CONF_TRIGGER_LEVEL: |
588 | *data = g_variant_new_double(devc->trigger_level); | |
589 | break; | |
2b0e4a46 AJ |
590 | case SR_CONF_TIMEBASE: |
591 | for (i = 0; i < devc->num_timebases; i++) { | |
592 | float tb = (float)devc->timebases[i][0] / devc->timebases[i][1]; | |
593 | float diff = fabs(devc->timebase - tb); | |
594 | if (diff < smallest_diff) { | |
595 | smallest_diff = diff; | |
596 | idx = i; | |
597 | } | |
598 | } | |
e1b5b7e7 UH |
599 | if (idx < 0) { |
600 | sr_dbg("Negative timebase index: %d.", idx); | |
2b0e4a46 | 601 | return SR_ERR_NA; |
e1b5b7e7 | 602 | } |
2b0e4a46 AJ |
603 | *data = g_variant_new("(tt)", devc->timebases[idx][0], |
604 | devc->timebases[idx][1]); | |
605 | break; | |
606 | case SR_CONF_VDIV: | |
e1b5b7e7 UH |
607 | if (analog_channel < 0) { |
608 | sr_dbg("Negative analog channel: %d.", analog_channel); | |
2b0e4a46 | 609 | return SR_ERR_NA; |
e1b5b7e7 | 610 | } |
2b0e4a46 AJ |
611 | for (i = 0; i < ARRAY_SIZE(vdivs); i++) { |
612 | float vdiv = (float)vdivs[i][0] / vdivs[i][1]; | |
613 | float diff = fabs(devc->vdiv[analog_channel] - vdiv); | |
614 | if (diff < smallest_diff) { | |
615 | smallest_diff = diff; | |
616 | idx = i; | |
617 | } | |
618 | } | |
e1b5b7e7 UH |
619 | if (idx < 0) { |
620 | sr_dbg("Negative vdiv index: %d.", idx); | |
2b0e4a46 | 621 | return SR_ERR_NA; |
e1b5b7e7 | 622 | } |
2b0e4a46 AJ |
623 | *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]); |
624 | break; | |
625 | case SR_CONF_COUPLING: | |
e1b5b7e7 UH |
626 | if (analog_channel < 0) { |
627 | sr_dbg("Negative analog channel: %d.", analog_channel); | |
2b0e4a46 | 628 | return SR_ERR_NA; |
e1b5b7e7 | 629 | } |
2b0e4a46 AJ |
630 | *data = g_variant_new_string(devc->coupling[analog_channel]); |
631 | break; | |
934cf6cf AJ |
632 | case SR_CONF_PROBE_FACTOR: |
633 | if (analog_channel < 0) { | |
634 | sr_dbg("Negative analog channel: %d.", analog_channel); | |
635 | return SR_ERR_NA; | |
636 | } | |
637 | *data = g_variant_new_uint64(devc->attenuation[analog_channel]); | |
638 | break; | |
d62d7ad1 | 639 | default: |
bd6fbf62 | 640 | return SR_ERR_NA; |
d62d7ad1 BV |
641 | } |
642 | ||
643 | return SR_OK; | |
644 | } | |
645 | ||
584560f1 | 646 | static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi, |
53b4680f | 647 | const struct sr_channel_group *cg) |
f4816ac6 | 648 | { |
29d957ce | 649 | struct dev_context *devc; |
ca9b9f48 | 650 | uint64_t p, q; |
254dd102 | 651 | double t_dbl; |
f48e0249 | 652 | unsigned int i, j; |
254dd102 BV |
653 | int ret; |
654 | const char *tmp_str; | |
889ef4a0 | 655 | char buffer[16]; |
f4816ac6 | 656 | |
b0baddef | 657 | devc = sdi->priv; |
29d957ce | 658 | |
660e398f | 659 | /* If a channel group is specified, it must be a valid one. */ |
53b4680f | 660 | if (cg && !g_slist_find(sdi->channel_groups, cg)) { |
660e398f | 661 | sr_err("Invalid channel group specified."); |
969edf63 | 662 | return SR_ERR; |
be60a9e4 BV |
663 | } |
664 | ||
f4816ac6 | 665 | ret = SR_OK; |
584560f1 | 666 | switch (key) { |
1953564a | 667 | case SR_CONF_LIMIT_FRAMES: |
f6a0ac9f | 668 | devc->limit_frames = g_variant_get_uint64(data); |
e0b7d23c | 669 | break; |
1953564a | 670 | case SR_CONF_TRIGGER_SLOPE: |
ca9b9f48 DE |
671 | tmp_str = g_variant_get_string(data, NULL); |
672 | ||
e1b5b7e7 UH |
673 | if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r')) { |
674 | sr_err("Unknown trigger slope: '%s'.", | |
675 | (tmp_str) ? tmp_str : "NULL"); | |
ca9b9f48 | 676 | return SR_ERR_ARG; |
e1b5b7e7 | 677 | } |
ca9b9f48 | 678 | |
254dd102 | 679 | g_free(devc->trigger_slope); |
ca9b9f48 | 680 | devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG"); |
38354d9d | 681 | ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope); |
e0b7d23c | 682 | break; |
1953564a | 683 | case SR_CONF_HORIZ_TRIGGERPOS: |
254dd102 | 684 | t_dbl = g_variant_get_double(data); |
e1b5b7e7 UH |
685 | if (t_dbl < 0.0 || t_dbl > 1.0) { |
686 | sr_err("Invalid horiz. trigger position: %g.", t_dbl); | |
254dd102 | 687 | return SR_ERR; |
e1b5b7e7 | 688 | } |
254dd102 BV |
689 | devc->horiz_triggerpos = t_dbl; |
690 | /* We have the trigger offset as a percentage of the frame, but | |
691 | * need to express this in seconds. */ | |
bafd4890 | 692 | t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases; |
889ef4a0 | 693 | g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl); |
38354d9d | 694 | ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer); |
e0b7d23c | 695 | break; |
9ea62f2e AJ |
696 | case SR_CONF_TRIGGER_LEVEL: |
697 | t_dbl = g_variant_get_double(data); | |
698 | g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl); | |
699 | ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer); | |
700 | if (ret == SR_OK) | |
701 | devc->trigger_level = t_dbl; | |
702 | break; | |
1953564a | 703 | case SR_CONF_TIMEBASE: |
f6a0ac9f | 704 | g_variant_get(data, "(tt)", &p, &q); |
bafd4890 ML |
705 | for (i = 0; i < devc->num_timebases; i++) { |
706 | if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) { | |
254dd102 | 707 | devc->timebase = (float)p / q; |
889ef4a0 AJ |
708 | g_ascii_formatd(buffer, sizeof(buffer), "%.9f", |
709 | devc->timebase); | |
38354d9d | 710 | ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer); |
f6a0ac9f BV |
711 | break; |
712 | } | |
713 | } | |
e1b5b7e7 UH |
714 | if (i == devc->num_timebases) { |
715 | sr_err("Invalid timebase index: %d.", i); | |
254dd102 | 716 | ret = SR_ERR_ARG; |
e1b5b7e7 | 717 | } |
e0b7d23c | 718 | break; |
1953564a | 719 | case SR_CONF_TRIGGER_SOURCE: |
f6a0ac9f | 720 | tmp_str = g_variant_get_string(data, NULL); |
254dd102 BV |
721 | for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) { |
722 | if (!strcmp(trigger_sources[i], tmp_str)) { | |
723 | g_free(devc->trigger_source); | |
724 | devc->trigger_source = g_strdup(trigger_sources[i]); | |
725 | if (!strcmp(devc->trigger_source, "AC Line")) | |
726 | tmp_str = "ACL"; | |
727 | else if (!strcmp(devc->trigger_source, "CH1")) | |
728 | tmp_str = "CHAN1"; | |
729 | else if (!strcmp(devc->trigger_source, "CH2")) | |
730 | tmp_str = "CHAN2"; | |
821fbcad ML |
731 | else if (!strcmp(devc->trigger_source, "CH3")) |
732 | tmp_str = "CHAN3"; | |
733 | else if (!strcmp(devc->trigger_source, "CH4")) | |
734 | tmp_str = "CHAN4"; | |
254dd102 BV |
735 | else |
736 | tmp_str = (char *)devc->trigger_source; | |
38354d9d | 737 | ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str); |
254dd102 BV |
738 | break; |
739 | } | |
4e108ace | 740 | } |
e1b5b7e7 UH |
741 | if (i == ARRAY_SIZE(trigger_sources)) { |
742 | sr_err("Invalid trigger source index: %d.", i); | |
254dd102 | 743 | ret = SR_ERR_ARG; |
e1b5b7e7 | 744 | } |
e0b7d23c | 745 | break; |
1953564a | 746 | case SR_CONF_VDIV: |
53b4680f | 747 | if (!cg) { |
660e398f UH |
748 | sr_err("No channel group specified."); |
749 | return SR_ERR_CHANNEL_GROUP; | |
be60a9e4 | 750 | } |
f6a0ac9f | 751 | g_variant_get(data, "(tt)", &p, &q); |
effb9dd1 | 752 | for (i = 0; i < devc->model->analog_channels; i++) { |
562b7ae5 | 753 | if (cg == devc->analog_groups[i]) { |
78bcc55a | 754 | for (j = 0; j < ARRAY_SIZE(vdivs); j++) { |
f48e0249 ML |
755 | if (vdivs[j][0] != p || vdivs[j][1] != q) |
756 | continue; | |
757 | devc->vdiv[i] = (float)p / q; | |
889ef4a0 AJ |
758 | g_ascii_formatd(buffer, sizeof(buffer), "%.3f", |
759 | devc->vdiv[i]); | |
38354d9d | 760 | return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1, |
889ef4a0 | 761 | buffer); |
f48e0249 | 762 | } |
e1b5b7e7 | 763 | sr_err("Invalid vdiv index: %d.", j); |
f48e0249 ML |
764 | return SR_ERR_ARG; |
765 | } | |
e0b7d23c | 766 | } |
e1b5b7e7 | 767 | sr_dbg("Didn't set vdiv, unknown channel(group)."); |
f48e0249 | 768 | return SR_ERR_NA; |
1953564a | 769 | case SR_CONF_COUPLING: |
53b4680f | 770 | if (!cg) { |
660e398f UH |
771 | sr_err("No channel group specified."); |
772 | return SR_ERR_CHANNEL_GROUP; | |
78bcc55a | 773 | } |
f6a0ac9f | 774 | tmp_str = g_variant_get_string(data, NULL); |
effb9dd1 | 775 | for (i = 0; i < devc->model->analog_channels; i++) { |
562b7ae5 | 776 | if (cg == devc->analog_groups[i]) { |
78bcc55a BV |
777 | for (j = 0; j < ARRAY_SIZE(coupling); j++) { |
778 | if (!strcmp(tmp_str, coupling[j])) { | |
f48e0249 ML |
779 | g_free(devc->coupling[i]); |
780 | devc->coupling[i] = g_strdup(coupling[j]); | |
38354d9d | 781 | return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1, |
f48e0249 ML |
782 | devc->coupling[i]); |
783 | } | |
784 | } | |
e1b5b7e7 | 785 | sr_err("Invalid coupling index: %d.", j); |
f48e0249 | 786 | return SR_ERR_ARG; |
e0b7d23c ML |
787 | } |
788 | } | |
e1b5b7e7 | 789 | sr_dbg("Didn't set coupling, unknown channel(group)."); |
f48e0249 | 790 | return SR_ERR_NA; |
934cf6cf AJ |
791 | case SR_CONF_PROBE_FACTOR: |
792 | if (!cg) { | |
793 | sr_err("No channel group specified."); | |
794 | return SR_ERR_CHANNEL_GROUP; | |
795 | } | |
796 | p = g_variant_get_uint64(data); | |
797 | for (i = 0; i < devc->model->analog_channels; i++) { | |
798 | if (cg == devc->analog_groups[i]) { | |
799 | for (j = 0; j < ARRAY_SIZE(probe_factor); j++) { | |
800 | if (p == probe_factor[j]) { | |
801 | devc->attenuation[i] = p; | |
802 | ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64, | |
803 | i + 1, p); | |
804 | if (ret == SR_OK) | |
805 | rigol_ds_get_dev_cfg_vertical(sdi); | |
806 | return ret; | |
807 | } | |
808 | } | |
809 | sr_err("Invalid probe factor: %"PRIu64".", p); | |
810 | return SR_ERR_ARG; | |
811 | } | |
812 | } | |
813 | sr_dbg("Didn't set probe factor, unknown channel(group)."); | |
814 | return SR_ERR_NA; | |
babab622 ML |
815 | case SR_CONF_DATA_SOURCE: |
816 | tmp_str = g_variant_get_string(data, NULL); | |
817 | if (!strcmp(tmp_str, "Live")) | |
818 | devc->data_source = DATA_SOURCE_LIVE; | |
569d4dbd ML |
819 | else if (devc->model->series->protocol >= PROTOCOL_V2 |
820 | && !strcmp(tmp_str, "Memory")) | |
babab622 | 821 | devc->data_source = DATA_SOURCE_MEMORY; |
569d4dbd | 822 | else if (devc->model->series->protocol >= PROTOCOL_V3 |
babab622 ML |
823 | && !strcmp(tmp_str, "Segmented")) |
824 | devc->data_source = DATA_SOURCE_SEGMENTED; | |
e1b5b7e7 UH |
825 | else { |
826 | sr_err("Unknown data source: '%s'.", tmp_str); | |
babab622 | 827 | return SR_ERR; |
e1b5b7e7 | 828 | } |
babab622 | 829 | break; |
f4816ac6 | 830 | default: |
dcd438ee | 831 | return SR_ERR_NA; |
f4816ac6 ML |
832 | } |
833 | ||
834 | return ret; | |
835 | } | |
836 | ||
584560f1 | 837 | static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi, |
53b4680f | 838 | const struct sr_channel_group *cg) |
a1c743fc | 839 | { |
861c447b | 840 | unsigned int i; |
e66d1892 | 841 | struct dev_context *devc; |
e43fdd8d | 842 | |
e66d1892 | 843 | devc = (sdi) ? sdi->priv : NULL; |
be60a9e4 | 844 | |
e43fdd8d | 845 | switch (key) { |
e66d1892 | 846 | case SR_CONF_SCAN_OPTIONS: |
9a6517d1 | 847 | case SR_CONF_DEVICE_OPTIONS: |
e66d1892 UH |
848 | if (!cg) |
849 | return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts); | |
562b7ae5 | 850 | if (cg == devc->digital_group) { |
105df674 | 851 | *data = std_gvar_array_u32(NULL, 0); |
f48e0249 ML |
852 | return SR_OK; |
853 | } else { | |
effb9dd1 | 854 | for (i = 0; i < devc->model->analog_channels; i++) { |
562b7ae5 | 855 | if (cg == devc->analog_groups[i]) { |
53012da6 | 856 | *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg_analog)); |
f48e0249 ML |
857 | return SR_OK; |
858 | } | |
859 | } | |
860 | return SR_ERR_NA; | |
861 | } | |
5f77dffc | 862 | break; |
2a7b113d | 863 | case SR_CONF_COUPLING: |
e66d1892 | 864 | if (!cg) |
660e398f | 865 | return SR_ERR_CHANNEL_GROUP; |
53012da6 | 866 | *data = g_variant_new_strv(ARRAY_AND_SIZE(coupling)); |
58f43369 | 867 | break; |
934cf6cf | 868 | case SR_CONF_PROBE_FACTOR: |
e66d1892 | 869 | if (!cg) |
934cf6cf | 870 | return SR_ERR_CHANNEL_GROUP; |
53012da6 | 871 | *data = std_gvar_array_u64(ARRAY_AND_SIZE(probe_factor)); |
934cf6cf | 872 | break; |
e4f2b2ad | 873 | case SR_CONF_VDIV: |
7cc1a550 ML |
874 | if (!devc) |
875 | /* Can't know this until we have the exact model. */ | |
876 | return SR_ERR_ARG; | |
e66d1892 | 877 | if (!cg) |
660e398f | 878 | return SR_ERR_CHANNEL_GROUP; |
db944f16 | 879 | *data = std_gvar_tuple_array((const uint64_t (*)[][2])devc->vdivs, devc->num_vdivs); |
58f43369 | 880 | break; |
41f5bd09 | 881 | case SR_CONF_TIMEBASE: |
7cc1a550 ML |
882 | if (!devc) |
883 | /* Can't know this until we have the exact model. */ | |
884 | return SR_ERR_ARG; | |
a31b2ccb AJ |
885 | if (devc->num_timebases <= 0) |
886 | return SR_ERR_NA; | |
db944f16 | 887 | *data = std_gvar_tuple_array((const uint64_t (*)[][2])devc->timebases, devc->num_timebases); |
41f5bd09 | 888 | break; |
328bafab | 889 | case SR_CONF_TRIGGER_SOURCE: |
7cc1a550 ML |
890 | if (!devc) |
891 | /* Can't know this until we have the exact model. */ | |
892 | return SR_ERR_ARG; | |
f6a0ac9f | 893 | *data = g_variant_new_strv(trigger_sources, |
bafd4890 | 894 | devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4); |
328bafab | 895 | break; |
5d336f11 | 896 | case SR_CONF_TRIGGER_SLOPE: |
53012da6 | 897 | *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_slopes)); |
5d336f11 | 898 | break; |
babab622 ML |
899 | case SR_CONF_DATA_SOURCE: |
900 | if (!devc) | |
901 | /* Can't know this until we have the exact model. */ | |
902 | return SR_ERR_ARG; | |
569d4dbd ML |
903 | switch (devc->model->series->protocol) { |
904 | case PROTOCOL_V1: | |
905 | *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2); | |
906 | break; | |
907 | case PROTOCOL_V2: | |
babab622 | 908 | *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1); |
569d4dbd ML |
909 | break; |
910 | default: | |
53012da6 | 911 | *data = g_variant_new_strv(ARRAY_AND_SIZE(data_sources)); |
569d4dbd ML |
912 | break; |
913 | } | |
babab622 | 914 | break; |
a1c743fc | 915 | default: |
bd6fbf62 | 916 | return SR_ERR_NA; |
a1c743fc BV |
917 | } |
918 | ||
919 | return SR_OK; | |
920 | } | |
921 | ||
695dc859 | 922 | static int dev_acquisition_start(const struct sr_dev_inst *sdi) |
f4816ac6 | 923 | { |
ae1bc1cc | 924 | struct sr_scpi_dev_inst *scpi; |
29d957ce | 925 | struct dev_context *devc; |
ba7dd8bb | 926 | struct sr_channel *ch; |
f76c24f6 | 927 | struct sr_datafeed_packet packet; |
702f42e8 | 928 | gboolean some_digital; |
254dd102 | 929 | GSList *l; |
29d957ce | 930 | |
ae1bc1cc | 931 | scpi = sdi->conn; |
29d957ce UH |
932 | devc = sdi->priv; |
933 | ||
51b294cd ML |
934 | devc->num_frames = 0; |
935 | ||
702f42e8 | 936 | some_digital = FALSE; |
ba7dd8bb UH |
937 | for (l = sdi->channels; l; l = l->next) { |
938 | ch = l->data; | |
939 | sr_dbg("handling channel %s", ch->name); | |
3f239f08 | 940 | if (ch->type == SR_CHANNEL_ANALOG) { |
ba7dd8bb | 941 | if (ch->enabled) |
702f42e8 ML |
942 | devc->enabled_channels = g_slist_append( |
943 | devc->enabled_channels, ch); | |
ba7dd8bb | 944 | if (ch->enabled != devc->analog_channels[ch->index]) { |
6bb192bc | 945 | /* Enabled channel is currently disabled, or vice versa. */ |
ba7dd8bb UH |
946 | if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1, |
947 | ch->enabled ? "ON" : "OFF") != SR_OK) | |
6bb192bc | 948 | return SR_ERR; |
ba7dd8bb | 949 | devc->analog_channels[ch->index] = ch->enabled; |
6bb192bc | 950 | } |
3f239f08 | 951 | } else if (ch->type == SR_CHANNEL_LOGIC) { |
01dd7a4c ML |
952 | /* Only one list entry for older protocols. All channels are |
953 | * retrieved together when this entry is processed. */ | |
702f42e8 | 954 | if (ch->enabled && ( |
01dd7a4c | 955 | devc->model->series->protocol > PROTOCOL_V3 || |
702f42e8 ML |
956 | !some_digital)) |
957 | devc->enabled_channels = g_slist_append( | |
958 | devc->enabled_channels, ch); | |
ba7dd8bb | 959 | if (ch->enabled) { |
702f42e8 | 960 | some_digital = TRUE; |
04e8e01e ML |
961 | /* Turn on LA module if currently off. */ |
962 | if (!devc->la_enabled) { | |
702f42e8 | 963 | if (rigol_ds_config_set(sdi, |
01dd7a4c | 964 | devc->model->series->protocol >= PROTOCOL_V3 ? |
702f42e8 | 965 | ":LA:STAT ON" : ":LA:DISP ON") != SR_OK) |
04e8e01e ML |
966 | return SR_ERR; |
967 | devc->la_enabled = TRUE; | |
968 | } | |
969 | } | |
ba7dd8bb | 970 | if (ch->enabled != devc->digital_channels[ch->index]) { |
6bb192bc | 971 | /* Enabled channel is currently disabled, or vice versa. */ |
702f42e8 | 972 | if (rigol_ds_config_set(sdi, |
01dd7a4c | 973 | devc->model->series->protocol >= PROTOCOL_V3 ? |
702f42e8 | 974 | ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index, |
ba7dd8bb | 975 | ch->enabled ? "ON" : "OFF") != SR_OK) |
6bb192bc | 976 | return SR_ERR; |
ba7dd8bb | 977 | devc->digital_channels[ch->index] = ch->enabled; |
6bb192bc | 978 | } |
254dd102 BV |
979 | } |
980 | } | |
1fed20cb | 981 | |
702f42e8 | 982 | if (!devc->enabled_channels) |
254dd102 | 983 | return SR_ERR; |
e0b7d23c | 984 | |
ba7dd8bb | 985 | /* Turn off LA module if on and no digital channels selected. */ |
702f42e8 ML |
986 | if (devc->la_enabled && !some_digital) |
987 | if (rigol_ds_config_set(sdi, | |
01dd7a4c | 988 | devc->model->series->protocol >= PROTOCOL_V3 ? |
702f42e8 | 989 | ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK) |
04e8e01e ML |
990 | return SR_ERR; |
991 | ||
e086b750 ML |
992 | /* Set memory mode. */ |
993 | if (devc->data_source == DATA_SOURCE_SEGMENTED) { | |
994 | sr_err("Data source 'Segmented' not yet supported"); | |
995 | return SR_ERR; | |
996 | } | |
997 | ||
998 | devc->analog_frame_size = analog_frame_size(sdi); | |
999 | devc->digital_frame_size = digital_frame_size(sdi); | |
1000 | ||
569d4dbd ML |
1001 | switch (devc->model->series->protocol) { |
1002 | case PROTOCOL_V2: | |
99af83b7 | 1003 | if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK) |
e086b750 | 1004 | return SR_ERR; |
569d4dbd ML |
1005 | break; |
1006 | case PROTOCOL_V3: | |
e086b750 ML |
1007 | /* Apparently for the DS2000 the memory |
1008 | * depth can only be set in Running state - | |
1009 | * this matches the behaviour of the UI. */ | |
38354d9d | 1010 | if (rigol_ds_config_set(sdi, ":RUN") != SR_OK) |
1fed20cb | 1011 | return SR_ERR; |
e086b750 ML |
1012 | if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d", |
1013 | devc->analog_frame_size) != SR_OK) | |
1014 | return SR_ERR; | |
1015 | if (rigol_ds_config_set(sdi, ":STOP") != SR_OK) | |
1fed20cb | 1016 | return SR_ERR; |
569d4dbd ML |
1017 | break; |
1018 | default: | |
1019 | break; | |
1fed20cb ML |
1020 | } |
1021 | ||
e086b750 ML |
1022 | if (devc->data_source == DATA_SOURCE_LIVE) |
1023 | if (rigol_ds_config_set(sdi, ":RUN") != SR_OK) | |
1024 | return SR_ERR; | |
1025 | ||
102f1239 BV |
1026 | sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50, |
1027 | rigol_ds_receive, (void *)sdi); | |
e0b7d23c | 1028 | |
bee2b016 | 1029 | std_session_send_df_header(sdi); |
e0b7d23c | 1030 | |
702f42e8 | 1031 | devc->channel_entry = devc->enabled_channels; |
821fbcad | 1032 | |
e086b750 ML |
1033 | if (rigol_ds_capture_start(sdi) != SR_OK) |
1034 | return SR_ERR; | |
f4816ac6 | 1035 | |
f76c24f6 ML |
1036 | /* Start of first frame. */ |
1037 | packet.type = SR_DF_FRAME_BEGIN; | |
695dc859 | 1038 | sr_session_send(sdi, &packet); |
f76c24f6 | 1039 | |
f4816ac6 ML |
1040 | return SR_OK; |
1041 | } | |
1042 | ||
695dc859 | 1043 | static int dev_acquisition_stop(struct sr_dev_inst *sdi) |
f4816ac6 | 1044 | { |
29d957ce | 1045 | struct dev_context *devc; |
ae1bc1cc | 1046 | struct sr_scpi_dev_inst *scpi; |
29d957ce | 1047 | |
29d957ce UH |
1048 | devc = sdi->priv; |
1049 | ||
bee2b016 | 1050 | std_session_send_df_end(sdi); |
b751cf7a | 1051 | |
702f42e8 ML |
1052 | g_slist_free(devc->enabled_channels); |
1053 | devc->enabled_channels = NULL; | |
ae1bc1cc | 1054 | scpi = sdi->conn; |
102f1239 | 1055 | sr_scpi_source_remove(sdi->session, scpi); |
f4816ac6 ML |
1056 | |
1057 | return SR_OK; | |
1058 | } | |
1059 | ||
dd5c48a6 | 1060 | static struct sr_dev_driver rigol_ds_driver_info = { |
3086efdd ML |
1061 | .name = "rigol-ds", |
1062 | .longname = "Rigol DS", | |
f4816ac6 | 1063 | .api_version = 1, |
c2fdcc25 | 1064 | .init = std_init, |
700d6b64 | 1065 | .cleanup = std_cleanup, |
6078d2c9 | 1066 | .scan = scan, |
c01bf34c | 1067 | .dev_list = std_dev_list, |
3b412e3a | 1068 | .dev_clear = dev_clear, |
d62d7ad1 | 1069 | .config_get = config_get, |
035a1078 | 1070 | .config_set = config_set, |
a1c743fc | 1071 | .config_list = config_list, |
6078d2c9 UH |
1072 | .dev_open = dev_open, |
1073 | .dev_close = dev_close, | |
254dd102 BV |
1074 | .dev_acquisition_start = dev_acquisition_start, |
1075 | .dev_acquisition_stop = dev_acquisition_stop, | |
41812aca | 1076 | .context = NULL, |
f4816ac6 | 1077 | }; |
dd5c48a6 | 1078 | SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info); |