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Change API of channel accessor functions to take struct sr_channel *.
[libsigrok.git] / src / hardware / rigol-ds / api.c
CommitLineData
f4816ac6
ML		 1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
88e429c9 5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
bafd4890 6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
f4816ac6
ML		 7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
e0b7d23c
ML		 22#include <fcntl.h>
23#include <unistd.h>
24#include <stdlib.h>
25#include <string.h>
2b0e4a46 26#include <math.h>
f4816ac6
ML		 27#include <glib.h>
28#include "libsigrok.h"
29#include "libsigrok-internal.h"
30#include "protocol.h"
31
a0e0bb41 32static const uint32_t scanopts[] = {
ca55277c 33 SR_CONF_CONN,
0dc7b43e 34 SR_CONF_SERIALCOMM
ca55277c
ML		 35};
36
f254bc4b 37static const uint32_t devopts[] = {
1953564a 38 SR_CONF_OSCILLOSCOPE,
5827f61b
BV		 39 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
40 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
41 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
b0c9d1d1 42 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
5827f61b 43 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
bf622e6d 44 SR_CONF_NUM_HDIV | SR_CONF_GET,
5827f61b 45 SR_CONF_SAMPLERATE | SR_CONF_GET,
f48e0249
ML		 46};
47
f254bc4b 48static const uint32_t analog_devopts[] = {
5827f61b
BV		 49 SR_CONF_NUM_VDIV | SR_CONF_GET,
50 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
51 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
e0b7d23c
ML		 53};
54
f6a0ac9f 55static const uint64_t timebases[][2] = {
e0b7d23c 56 /* nanoseconds */
8e06edf5 57 { 1, 1000000000 },
e0b7d23c
ML		 58 { 2, 1000000000 },
59 { 5, 1000000000 },
60 { 10, 1000000000 },
61 { 20, 1000000000 },
62 { 50, 1000000000 },
63 { 100, 1000000000 },
64 { 500, 1000000000 },
65 /* microseconds */
66 { 1, 1000000 },
67 { 2, 1000000 },
68 { 5, 1000000 },
69 { 10, 1000000 },
70 { 20, 1000000 },
71 { 50, 1000000 },
72 { 100, 1000000 },
73 { 200, 1000000 },
74 { 500, 1000000 },
75 /* milliseconds */
76 { 1, 1000 },
77 { 2, 1000 },
78 { 5, 1000 },
79 { 10, 1000 },
80 { 20, 1000 },
81 { 50, 1000 },
82 { 100, 1000 },
83 { 200, 1000 },
84 { 500, 1000 },
85 /* seconds */
86 { 1, 1 },
87 { 2, 1 },
88 { 5, 1 },
89 { 10, 1 },
90 { 20, 1 },
91 { 50, 1 },
bafd4890
ML		 92 { 100, 1 },
93 { 200, 1 },
94 { 500, 1 },
8e06edf5 95 { 1000, 1 },
e0b7d23c
ML		 96};
97
f6a0ac9f 98static const uint64_t vdivs[][2] = {
bafd4890
ML		 99 /* microvolts */
100 { 500, 1000000 },
e0b7d23c 101 /* millivolts */
bafd4890 102 { 1, 1000 },
e0b7d23c
ML		 103 { 2, 1000 },
104 { 5, 1000 },
105 { 10, 1000 },
106 { 20, 1000 },
107 { 50, 1000 },
108 { 100, 1000 },
109 { 200, 1000 },
110 { 500, 1000 },
111 /* volts */
112 { 1, 1 },
113 { 2, 1 },
114 { 5, 1 },
115 { 10, 1 },
d50725e0
UH		 116 { 20, 1 },
117 { 50, 1 },
118 { 100, 1 },
e0b7d23c
ML		 119};
120
bafd4890
ML		 121#define NUM_TIMEBASE ARRAY_SIZE(timebases)
122#define NUM_VDIV ARRAY_SIZE(vdivs)
123
e0b7d23c
ML		 124static const char *trigger_sources[] = {
125 "CH1",
126 "CH2",
821fbcad
ML		 127 "CH3",
128 "CH4",
e0b7d23c
ML		 129 "EXT",
130 "AC Line",
6bb192bc
ML		 131 "D0",
132 "D1",
133 "D2",
134 "D3",
135 "D4",
136 "D5",
137 "D6",
138 "D7",
139 "D8",
140 "D9",
141 "D10",
142 "D11",
143 "D12",
144 "D13",
145 "D14",
146 "D15",
e0b7d23c
ML		 147};
148
5d336f11
AJ		 149static const char *trigger_slopes[] = {
150 "r",
151 "f",
152};
153
e0b7d23c
ML		 154static const char *coupling[] = {
155 "AC",
156 "DC",
157 "GND",
e0b7d23c
ML		 158};
159
babab622
ML		 160/* Do not change the order of entries */
161static const char *data_sources[] = {
162 "Live",
163 "Memory",
164 "Segmented",
165};
166
569d4dbd
ML		 167enum vendor {
168 RIGOL,
169 AGILENT,
170};
171
172enum series {
173 VS5000,
174 DS1000,
175 DS2000,
176 DS2000A,
177 DSO1000,
178};
10afee13 179
569d4dbd
ML		 180/* short name, full name */
181static const struct rigol_ds_vendor supported_vendors[] = {
182 [RIGOL] = {"Rigol", "Rigol Technologies"},
14e1aa6d 183 [AGILENT] = {"Agilent", "Agilent Technologies"},
569d4dbd
ML		 184};
185
186#define VENDOR(x) &supported_vendors[x]
187/* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
188 * live waveform samples, memory buffer samples */
189static const struct rigol_ds_series supported_series[] = {
190 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
191 {50, 1}, {2, 1000}, 14, 2048, 0},
192 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
193 {50, 1}, {2, 1000}, 12, 600, 1048576},
194 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
96cb7faa 195 {500, 1}, {500, 1000000}, 14, 1400, 14000},
569d4dbd
ML		 196 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
197 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
198 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
199 {50, 1}, {2, 1000}, 12, 600, 20480},
200};
10afee13 201
569d4dbd
ML		 202#define SERIES(x) &supported_series[x]
203/* series, model, min timebase, analog channels, digital */
bafd4890 204static const struct rigol_ds_model supported_models[] = {
569d4dbd
ML		 205 {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
206 {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
207 {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
208 {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
209 {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
210 {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
211 {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
212 {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
213 {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
214 {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
215 {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
216 {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
217 {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
218 {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
219 {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
220 {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
221 {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
222 {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
223 {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
224 {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
225 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
226 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
227 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
228 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
229 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
230 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
231 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
232 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
233 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
234 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
512bb890
BV		 235};
236
3086efdd
ML		 237SR_PRIV struct sr_dev_driver rigol_ds_driver_info;
238static struct sr_dev_driver *di = &rigol_ds_driver_info;
f4816ac6 239
fa85f376 240static void clear_helper(void *priv)
f4816ac6 241{
f4816ac6 242 struct dev_context *devc;
effb9dd1 243 unsigned int i;
f4816ac6 244
ba358ffd 245 devc = priv;
babab622
ML		 246 g_free(devc->data);
247 g_free(devc->buffer);
effb9dd1
AJ		 248 for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
249 g_free(devc->coupling[i]);
fa85f376
UH		 250 g_free(devc->trigger_source);
251 g_free(devc->trigger_slope);
562b7ae5
SA		 252 g_free(devc->analog_groups);
253 g_free(devc->digital_group);
254 g_free(devc);
fa85f376 255}
f4816ac6 256
3b412e3a 257static int dev_clear(void)
fa85f376
UH		 258{
259 return std_dev_clear(di, clear_helper);
f4816ac6
ML		 260}
261
6078d2c9 262static int init(struct sr_context *sr_ctx)
f4816ac6 263{
f6beaac5 264 return std_init(sr_ctx, di, LOG_PREFIX);
f4816ac6
ML		 265}
266
9d3ae01b 267static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
f4816ac6 268{
cc9fd2d2
BV		 269 struct dev_context *devc;
270 struct sr_dev_inst *sdi;
ae1bc1cc 271 struct sr_scpi_hw_info *hw_info;
ba7dd8bb 272 struct sr_channel *ch;
8dd0b290 273 long n[3];
f6a0ac9f 274 unsigned int i;
bafd4890 275 const struct rigol_ds_model *model = NULL;
569d4dbd 276 gchar *channel_name, **version;
fb6e5ba8 277
ae1bc1cc 278 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
05238d28
ML		 279 sr_info("Couldn't get IDN response, retrying.");
280 sr_scpi_close(scpi);
281 sr_scpi_open(scpi);
282 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
283 sr_info("Couldn't get IDN response.");
284 return NULL;
285 }
ca55277c 286 }
e0b7d23c 287
ca55277c 288 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
569d4dbd
ML		 289 if (!strcasecmp(hw_info->manufacturer,
290 supported_models[i].series->vendor->full_name) &&
10afee13 291 !strcmp(hw_info->model, supported_models[i].name)) {
bafd4890 292 model = &supported_models[i];
ca55277c 293 break;
fb6e5ba8 294 }
ca55277c 295 }
fb6e5ba8 296
0af636be 297 if (!model) {
ae1bc1cc 298 sr_scpi_hw_info_free(hw_info);
9d3ae01b 299 return NULL;
ca55277c 300 }
fb6e5ba8 301
aac29cc1 302 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH		 303 sdi->status = SR_ST_ACTIVE;
304 sdi->vendor = g_strdup(model->series->vendor->name);
305 sdi->model = g_strdup(model->name);
306 sdi->version = g_strdup(hw_info->firmware_version);
ae1bc1cc 307 sdi->conn = scpi;
cc9fd2d2 308 sdi->driver = di;
ae1bc1cc 309 sdi->inst_type = SR_INST_SCPI;
b3fccc85 310 sdi->serial_num = g_strdup(hw_info->serial_number);
f57d8ffe 311 devc = g_malloc0(sizeof(struct dev_context));
cc9fd2d2 312 devc->limit_frames = 0;
bafd4890 313 devc->model = model;
569d4dbd 314 devc->format = model->series->format;
8dd0b290 315
569d4dbd
ML		 316 /* DS1000 models with firmware before 0.2.4 used the old data format. */
317 if (model->series == SERIES(DS1000)) {
8dd0b290
BV		 318 version = g_strsplit(hw_info->firmware_version, ".", 0);
319 do {
320 if (!version[0] || !version[1] || !version[2])
321 break;
322 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
323 break;
324 for (i = 0; i < 3; i++) {
325 if (sr_atol(version[i], &n[i]) != SR_OK)
326 break;
327 }
328 if (i != 3)
329 break;
330 if (n[0] != 0 || n[1] > 2)
331 break;
332 if (n[1] == 2 && n[2] > 3)
333 break;
569d4dbd
ML		 334 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
335 devc->format = FORMAT_RAW;
8dd0b290
BV		 336 } while(0);
337 g_strfreev(version);
338 }
339
340 sr_scpi_hw_info_free(hw_info);
512bb890 341
562b7ae5
SA		 342 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
343 model->analog_channels);
344
821fbcad
ML		 345 for (i = 0; i < model->analog_channels; i++) {
346 if (!(channel_name = g_strdup_printf("CH%d", i + 1)))
9d3ae01b 347 return NULL;
5e23fcab 348 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
562b7ae5
SA		 349
350 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
351
352 devc->analog_groups[i]->name = channel_name;
353 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
660e398f 354 sdi->channel_groups = g_slist_append(sdi->channel_groups,
562b7ae5 355 devc->analog_groups[i]);
ca55277c 356 }
512bb890 357
bafd4890 358 if (devc->model->has_digital) {
562b7ae5
SA		 359 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group*));
360
effb9dd1 361 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
ca55277c 362 if (!(channel_name = g_strdup_printf("D%d", i)))
9d3ae01b 363 return NULL;
5e23fcab 364 ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
ca55277c 365 g_free(channel_name);
562b7ae5
SA		 366 devc->digital_group->channels = g_slist_append(
367 devc->digital_group->channels, ch);
512bb890 368 }
562b7ae5 369 devc->digital_group->name = g_strdup("LA");
660e398f 370 sdi->channel_groups = g_slist_append(sdi->channel_groups,
562b7ae5 371 devc->digital_group);
ca55277c 372 }
bafd4890
ML		 373
374 for (i = 0; i < NUM_TIMEBASE; i++) {
375 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
376 devc->timebases = &timebases[i];
569d4dbd 377 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
bafd4890
ML		 378 devc->num_timebases = &timebases[i] - devc->timebases + 1;
379 }
380
0709197d 381 for (i = 0; i < NUM_VDIV; i++)
81b85663 382 if (!memcmp(&devc->model->series->min_vdiv, &vdivs[i], sizeof(uint64_t[2]))) {
6ff1394e 383 devc->vdivs = &vdivs[i];
81b85663
AJ		 384 devc->num_vdivs = NUM_VDIV - i;
385 }
bafd4890 386
babab622 387 if (!(devc->buffer = g_try_malloc(ACQ_BUFFER_SIZE)))
9d3ae01b 388 return NULL;
babab622 389 if (!(devc->data = g_try_malloc(ACQ_BUFFER_SIZE * sizeof(float))))
9d3ae01b 390 return NULL;
babab622
ML		 391
392 devc->data_source = DATA_SOURCE_LIVE;
393
cc9fd2d2
BV		 394 sdi->priv = devc;
395
9d3ae01b 396 return sdi;
ca55277c 397}
512bb890 398
6078d2c9 399static GSList *scan(GSList *options)
ca55277c 400{
9d3ae01b 401 return sr_scpi_scan(di->priv, options, probe_device);
f4816ac6
ML		 402}
403
6078d2c9 404static GSList *dev_list(void)
f4816ac6 405{
0e94d524 406 return ((struct drv_context *)(di->priv))->instances;
f4816ac6
ML		 407}
408
6078d2c9 409static int dev_open(struct sr_dev_inst *sdi)
f4816ac6 410{
e1b5b7e7 411 int ret;
ae1bc1cc 412 struct sr_scpi_dev_inst *scpi = sdi->conn;
9bd4c956 413
e1b5b7e7
UH		 414 if ((ret = sr_scpi_open(scpi)) < 0) {
415 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
e0b7d23c 416 return SR_ERR;
e1b5b7e7 417 }
e0b7d23c 418
e1b5b7e7
UH		 419 if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
420 sr_err("Failed to get device config: %s.", sr_strerror(ret));
254dd102 421 return SR_ERR;
e1b5b7e7 422 }
f4816ac6 423
46a743c1 424 sdi->status = SR_ST_ACTIVE;
cc9fd2d2 425
f4816ac6
ML		 426 return SR_OK;
427}
428
6078d2c9 429static int dev_close(struct sr_dev_inst *sdi)
f4816ac6 430{
ae1bc1cc 431 struct sr_scpi_dev_inst *scpi;
22c19688 432 struct dev_context *devc;
ae1bc1cc 433
83dbd9f0
AJ		 434 if (sdi->status != SR_ST_ACTIVE)
435 return SR_ERR_DEV_CLOSED;
464d4936 436
ae1bc1cc 437 scpi = sdi->conn;
22c19688
ML		 438 devc = sdi->priv;
439
6e94eb41 440 if (devc->model->series->protocol == PROTOCOL_V2)
38354d9d 441 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
e0b7d23c 442
ae1bc1cc
ML		 443 if (scpi) {
444 if (sr_scpi_close(scpi) < 0)
445 return SR_ERR;
cc9fd2d2
BV		 446 sdi->status = SR_ST_INACTIVE;
447 }
f4816ac6
ML		 448
449 return SR_OK;
450}
451
6078d2c9 452static int cleanup(void)
f4816ac6 453{
3b412e3a 454 return dev_clear();
f4816ac6
ML		 455}
456
5415e602
ML		 457static int analog_frame_size(const struct sr_dev_inst *sdi)
458{
459 struct dev_context *devc = sdi->priv;
ba7dd8bb
UH		 460 struct sr_channel *ch;
461 int analog_channels = 0;
5415e602
ML		 462 GSList *l;
463
ba7dd8bb
UH		 464 for (l = sdi->channels; l; l = l->next) {
465 ch = l->data;
3f239f08 466 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
ba7dd8bb 467 analog_channels++;
569d4dbd
ML		 468 }
469
ba7dd8bb 470 if (analog_channels == 0)
824eb2ac
ML		 471 return 0;
472
569d4dbd
ML		 473 switch (devc->data_source) {
474 case DATA_SOURCE_LIVE:
475 return devc->model->series->live_samples;
476 case DATA_SOURCE_MEMORY:
ba7dd8bb 477 return devc->model->series->buffer_samples / analog_channels;
470140fc 478 default:
569d4dbd 479 return 0;
5415e602
ML		 480 }
481}
482
d22250a9
ML		 483static int digital_frame_size(const struct sr_dev_inst *sdi)
484{
485 struct dev_context *devc = sdi->priv;
486
569d4dbd
ML		 487 switch (devc->data_source) {
488 case DATA_SOURCE_LIVE:
489 return devc->model->series->live_samples * 2;
490 case DATA_SOURCE_MEMORY:
491 return devc->model->series->buffer_samples * 2;
d22250a9
ML		 492 default:
493 return 0;
494 }
495}
496
584560f1 497static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 498 const struct sr_channel_group *cg)
d62d7ad1 499{
e43fdd8d 500 struct dev_context *devc;
ba7dd8bb 501 struct sr_channel *ch;
2b0e4a46 502 const char *tmp_str;
c2b394d5 503 uint64_t samplerate;
2b0e4a46 504 int analog_channel = -1;
c33ff377 505 float smallest_diff = INFINITY;
2b0e4a46
AJ		 506 int idx = -1;
507 unsigned i;
d62d7ad1 508
e43fdd8d
BV		 509 if (!sdi || !(devc = sdi->priv))
510 return SR_ERR_ARG;
511
660e398f 512 /* If a channel group is specified, it must be a valid one. */
53b4680f 513 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
660e398f 514 sr_err("Invalid channel group specified.");
969edf63 515 return SR_ERR;
be60a9e4
BV		 516 }
517
53b4680f 518 if (cg) {
ba7dd8bb
UH		 519 ch = g_slist_nth_data(cg->channels, 0);
520 if (!ch)
2b0e4a46 521 return SR_ERR;
3f239f08 522 if (ch->type == SR_CHANNEL_ANALOG) {
ba7dd8bb 523 if (ch->name[2] < '1' || ch->name[2] > '4')
2b0e4a46 524 return SR_ERR;
ba7dd8bb 525 analog_channel = ch->name[2] - '1';
2b0e4a46
AJ		 526 }
527 }
528
584560f1 529 switch (key) {
bf622e6d 530 case SR_CONF_NUM_HDIV:
569d4dbd 531 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
d62d7ad1
BV		 532 break;
533 case SR_CONF_NUM_VDIV:
81b85663 534 *data = g_variant_new_int32(devc->num_vdivs);
f44f7e61 535 break;
babab622
ML		 536 case SR_CONF_DATA_SOURCE:
537 if (devc->data_source == DATA_SOURCE_LIVE)
538 *data = g_variant_new_string("Live");
539 else if (devc->data_source == DATA_SOURCE_MEMORY)
540 *data = g_variant_new_string("Memory");
541 else
542 *data = g_variant_new_string("Segmented");
543 break;
4914dd4b
ML		 544 case SR_CONF_SAMPLERATE:
545 if (devc->data_source == DATA_SOURCE_LIVE) {
c2b394d5 546 samplerate = analog_frame_size(sdi) /
569d4dbd 547 (devc->timebase * devc->model->series->num_horizontal_divs);
4914dd4b 548 *data = g_variant_new_uint64(samplerate);
c2b394d5 549 } else {
e1b5b7e7 550 sr_dbg("Unknown data source: %d.", devc->data_source);
4914dd4b 551 return SR_ERR_NA;
c2b394d5 552 }
4914dd4b 553 break;
2b0e4a46
AJ		 554 case SR_CONF_TRIGGER_SOURCE:
555 if (!strcmp(devc->trigger_source, "ACL"))
556 tmp_str = "AC Line";
557 else if (!strcmp(devc->trigger_source, "CHAN1"))
558 tmp_str = "CH1";
559 else if (!strcmp(devc->trigger_source, "CHAN2"))
560 tmp_str = "CH2";
561 else if (!strcmp(devc->trigger_source, "CHAN3"))
562 tmp_str = "CH3";
563 else if (!strcmp(devc->trigger_source, "CHAN4"))
564 tmp_str = "CH4";
565 else
566 tmp_str = devc->trigger_source;
567 *data = g_variant_new_string(tmp_str);
568 break;
5d336f11 569 case SR_CONF_TRIGGER_SLOPE:
e1b5b7e7 570 if (!strncmp(devc->trigger_slope, "POS", 3)) {
5d336f11 571 tmp_str = "r";
e1b5b7e7 572 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
5d336f11 573 tmp_str = "f";
e1b5b7e7
UH		 574 } else {
575 sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
5d336f11 576 return SR_ERR_NA;
e1b5b7e7 577 }
5d336f11
AJ		 578 *data = g_variant_new_string(tmp_str);
579 break;
2b0e4a46
AJ		 580 case SR_CONF_TIMEBASE:
581 for (i = 0; i < devc->num_timebases; i++) {
582 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
583 float diff = fabs(devc->timebase - tb);
584 if (diff < smallest_diff) {
585 smallest_diff = diff;
586 idx = i;
587 }
588 }
e1b5b7e7
UH		 589 if (idx < 0) {
590 sr_dbg("Negative timebase index: %d.", idx);
2b0e4a46 591 return SR_ERR_NA;
e1b5b7e7 592 }
2b0e4a46
AJ		 593 *data = g_variant_new("(tt)", devc->timebases[idx][0],
594 devc->timebases[idx][1]);
595 break;
596 case SR_CONF_VDIV:
e1b5b7e7
UH		 597 if (analog_channel < 0) {
598 sr_dbg("Negative analog channel: %d.", analog_channel);
2b0e4a46 599 return SR_ERR_NA;
e1b5b7e7 600 }
2b0e4a46
AJ		 601 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
602 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
603 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
604 if (diff < smallest_diff) {
605 smallest_diff = diff;
606 idx = i;
607 }
608 }
e1b5b7e7
UH		 609 if (idx < 0) {
610 sr_dbg("Negative vdiv index: %d.", idx);
2b0e4a46 611 return SR_ERR_NA;
e1b5b7e7 612 }
2b0e4a46
AJ		 613 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
614 break;
615 case SR_CONF_COUPLING:
e1b5b7e7
UH		 616 if (analog_channel < 0) {
617 sr_dbg("Negative analog channel: %d.", analog_channel);
2b0e4a46 618 return SR_ERR_NA;
e1b5b7e7 619 }
2b0e4a46
AJ		 620 *data = g_variant_new_string(devc->coupling[analog_channel]);
621 break;
d62d7ad1 622 default:
e1b5b7e7 623 sr_dbg("Tried to get unknown config key: %d.", key);
bd6fbf62 624 return SR_ERR_NA;
d62d7ad1
BV		 625 }
626
627 return SR_OK;
628}
629
584560f1 630static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
53b4680f 631 const struct sr_channel_group *cg)
f4816ac6 632{
29d957ce 633 struct dev_context *devc;
ca9b9f48 634 uint64_t p, q;
254dd102 635 double t_dbl;
f48e0249 636 unsigned int i, j;
254dd102
BV		 637 int ret;
638 const char *tmp_str;
889ef4a0 639 char buffer[16];
f4816ac6 640
e43fdd8d
BV		 641 if (!(devc = sdi->priv))
642 return SR_ERR_ARG;
29d957ce 643
e73ffd42
BV		 644 if (sdi->status != SR_ST_ACTIVE)
645 return SR_ERR_DEV_CLOSED;
f4816ac6 646
660e398f 647 /* If a channel group is specified, it must be a valid one. */
53b4680f 648 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
660e398f 649 sr_err("Invalid channel group specified.");
969edf63 650 return SR_ERR;
be60a9e4
BV		 651 }
652
f4816ac6 653 ret = SR_OK;
584560f1 654 switch (key) {
1953564a 655 case SR_CONF_LIMIT_FRAMES:
f6a0ac9f 656 devc->limit_frames = g_variant_get_uint64(data);
e0b7d23c 657 break;
1953564a 658 case SR_CONF_TRIGGER_SLOPE:
ca9b9f48
DE		 659 tmp_str = g_variant_get_string(data, NULL);
660
e1b5b7e7
UH		 661 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r')) {
662 sr_err("Unknown trigger slope: '%s'.",
663 (tmp_str) ? tmp_str : "NULL");
ca9b9f48 664 return SR_ERR_ARG;
e1b5b7e7 665 }
ca9b9f48 666
254dd102 667 g_free(devc->trigger_slope);
ca9b9f48 668 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
38354d9d 669 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
e0b7d23c 670 break;
1953564a 671 case SR_CONF_HORIZ_TRIGGERPOS:
254dd102 672 t_dbl = g_variant_get_double(data);
e1b5b7e7
UH		 673 if (t_dbl < 0.0 || t_dbl > 1.0) {
674 sr_err("Invalid horiz. trigger position: %g.", t_dbl);
254dd102 675 return SR_ERR;
e1b5b7e7 676 }
254dd102
BV		 677 devc->horiz_triggerpos = t_dbl;
678 /* We have the trigger offset as a percentage of the frame, but
679 * need to express this in seconds. */
bafd4890 680 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
889ef4a0 681 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
38354d9d 682 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
e0b7d23c 683 break;
1953564a 684 case SR_CONF_TIMEBASE:
f6a0ac9f 685 g_variant_get(data, "(tt)", &p, &q);
bafd4890
ML		 686 for (i = 0; i < devc->num_timebases; i++) {
687 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
254dd102 688 devc->timebase = (float)p / q;
889ef4a0
AJ		 689 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
690 devc->timebase);
38354d9d 691 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
f6a0ac9f
BV		 692 break;
693 }
694 }
e1b5b7e7
UH		 695 if (i == devc->num_timebases) {
696 sr_err("Invalid timebase index: %d.", i);
254dd102 697 ret = SR_ERR_ARG;
e1b5b7e7 698 }
e0b7d23c 699 break;
1953564a 700 case SR_CONF_TRIGGER_SOURCE:
f6a0ac9f 701 tmp_str = g_variant_get_string(data, NULL);
254dd102
BV		 702 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
703 if (!strcmp(trigger_sources[i], tmp_str)) {
704 g_free(devc->trigger_source);
705 devc->trigger_source = g_strdup(trigger_sources[i]);
706 if (!strcmp(devc->trigger_source, "AC Line"))
707 tmp_str = "ACL";
708 else if (!strcmp(devc->trigger_source, "CH1"))
709 tmp_str = "CHAN1";
710 else if (!strcmp(devc->trigger_source, "CH2"))
711 tmp_str = "CHAN2";
821fbcad
ML		 712 else if (!strcmp(devc->trigger_source, "CH3"))
713 tmp_str = "CHAN3";
714 else if (!strcmp(devc->trigger_source, "CH4"))
715 tmp_str = "CHAN4";
254dd102
BV		 716 else
717 tmp_str = (char *)devc->trigger_source;
38354d9d 718 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
254dd102
BV		 719 break;
720 }
4e108ace 721 }
e1b5b7e7
UH		 722 if (i == ARRAY_SIZE(trigger_sources)) {
723 sr_err("Invalid trigger source index: %d.", i);
254dd102 724 ret = SR_ERR_ARG;
e1b5b7e7 725 }
e0b7d23c 726 break;
1953564a 727 case SR_CONF_VDIV:
53b4680f 728 if (!cg) {
660e398f
UH		 729 sr_err("No channel group specified.");
730 return SR_ERR_CHANNEL_GROUP;
be60a9e4 731 }
f6a0ac9f 732 g_variant_get(data, "(tt)", &p, &q);
effb9dd1 733 for (i = 0; i < devc->model->analog_channels; i++) {
562b7ae5 734 if (cg == devc->analog_groups[i]) {
78bcc55a 735 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
f48e0249
ML		 736 if (vdivs[j][0] != p || vdivs[j][1] != q)
737 continue;
738 devc->vdiv[i] = (float)p / q;
889ef4a0
AJ		 739 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
740 devc->vdiv[i]);
38354d9d 741 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
889ef4a0 742 buffer);
f48e0249 743 }
e1b5b7e7 744 sr_err("Invalid vdiv index: %d.", j);
f48e0249
ML		 745 return SR_ERR_ARG;
746 }
e0b7d23c 747 }
e1b5b7e7 748 sr_dbg("Didn't set vdiv, unknown channel(group).");
f48e0249 749 return SR_ERR_NA;
1953564a 750 case SR_CONF_COUPLING:
53b4680f 751 if (!cg) {
660e398f
UH		 752 sr_err("No channel group specified.");
753 return SR_ERR_CHANNEL_GROUP;
78bcc55a 754 }
f6a0ac9f 755 tmp_str = g_variant_get_string(data, NULL);
effb9dd1 756 for (i = 0; i < devc->model->analog_channels; i++) {
562b7ae5 757 if (cg == devc->analog_groups[i]) {
78bcc55a
BV		 758 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
759 if (!strcmp(tmp_str, coupling[j])) {
f48e0249
ML		 760 g_free(devc->coupling[i]);
761 devc->coupling[i] = g_strdup(coupling[j]);
38354d9d 762 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
f48e0249
ML		 763 devc->coupling[i]);
764 }
765 }
e1b5b7e7 766 sr_err("Invalid coupling index: %d.", j);
f48e0249 767 return SR_ERR_ARG;
e0b7d23c
ML		 768 }
769 }
e1b5b7e7 770 sr_dbg("Didn't set coupling, unknown channel(group).");
f48e0249 771 return SR_ERR_NA;
babab622
ML		 772 case SR_CONF_DATA_SOURCE:
773 tmp_str = g_variant_get_string(data, NULL);
774 if (!strcmp(tmp_str, "Live"))
775 devc->data_source = DATA_SOURCE_LIVE;
569d4dbd
ML		 776 else if (devc->model->series->protocol >= PROTOCOL_V2
777 && !strcmp(tmp_str, "Memory"))
babab622 778 devc->data_source = DATA_SOURCE_MEMORY;
569d4dbd 779 else if (devc->model->series->protocol >= PROTOCOL_V3
babab622
ML		 780 && !strcmp(tmp_str, "Segmented"))
781 devc->data_source = DATA_SOURCE_SEGMENTED;
e1b5b7e7
UH		 782 else {
783 sr_err("Unknown data source: '%s'.", tmp_str);
babab622 784 return SR_ERR;
e1b5b7e7 785 }
babab622 786 break;
f4816ac6 787 default:
e1b5b7e7 788 sr_dbg("Tried to set unknown config key: %d.", key);
bd6fbf62 789 ret = SR_ERR_NA;
29d957ce 790 break;
f4816ac6
ML		 791 }
792
793 return ret;
794}
795
584560f1 796static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 797 const struct sr_channel_group *cg)
a1c743fc 798{
861c447b
BV		 799 GVariant *tuple, *rational[2];
800 GVariantBuilder gvb;
801 unsigned int i;
7cc1a550
ML		 802 struct dev_context *devc = NULL;
803
804 if (sdi)
805 devc = sdi->priv;
8f996b89 806
e43fdd8d 807 if (key == SR_CONF_SCAN_OPTIONS) {
584560f1 808 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
a0e0bb41 809 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
e43fdd8d 810 return SR_OK;
53b4680f 811 } else if (key == SR_CONF_DEVICE_OPTIONS && cg == NULL) {
584560f1 812 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
f254bc4b 813 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
e43fdd8d
BV		 814 return SR_OK;
815 }
816
817 /* Every other option requires a valid device instance. */
818 if (!sdi || !(devc = sdi->priv))
819 return SR_ERR_ARG;
820
660e398f 821 /* If a channel group is specified, it must be a valid one. */
53b4680f 822 if (cg) {
effb9dd1
AJ		 823 for (i = 0; i < devc->model->analog_channels; i++)
824 if (cg == devc->analog_groups[i])
825 break;
826 if (i >= devc->model->analog_channels) {
660e398f 827 sr_err("Invalid channel group specified.");
be60a9e4
BV		 828 return SR_ERR;
829 }
830 }
831
e43fdd8d 832 switch (key) {
9a6517d1 833 case SR_CONF_DEVICE_OPTIONS:
53b4680f 834 if (!cg) {
660e398f
UH		 835 sr_err("No channel group specified.");
836 return SR_ERR_CHANNEL_GROUP;
be60a9e4 837 }
562b7ae5 838 if (cg == devc->digital_group) {
584560f1
BV		 839 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
840 NULL, 0, sizeof(uint32_t));
f48e0249
ML		 841 return SR_OK;
842 } else {
effb9dd1 843 for (i = 0; i < devc->model->analog_channels; i++) {
562b7ae5 844 if (cg == devc->analog_groups[i]) {
584560f1 845 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
f254bc4b 846 analog_devopts, ARRAY_SIZE(analog_devopts), sizeof(uint32_t));
f48e0249
ML		 847 return SR_OK;
848 }
849 }
850 return SR_ERR_NA;
851 }
5f77dffc 852 break;
2a7b113d 853 case SR_CONF_COUPLING:
53b4680f 854 if (!cg) {
660e398f
UH		 855 sr_err("No channel group specified.");
856 return SR_ERR_CHANNEL_GROUP;
f48e0249 857 }
58f43369
BV		 858 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
859 break;
e4f2b2ad 860 case SR_CONF_VDIV:
7cc1a550
ML		 861 if (!devc)
862 /* Can't know this until we have the exact model. */
863 return SR_ERR_ARG;
53b4680f 864 if (!cg) {
660e398f
UH		 865 sr_err("No channel group specified.");
866 return SR_ERR_CHANNEL_GROUP;
861c447b 867 }
58f43369 868 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
81b85663 869 for (i = 0; i < devc->num_vdivs; i++) {
bafd4890
ML		 870 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
871 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
58f43369
BV		 872 tuple = g_variant_new_tuple(rational, 2);
873 g_variant_builder_add_value(&gvb, tuple);
874 }
875 *data = g_variant_builder_end(&gvb);
876 break;
41f5bd09 877 case SR_CONF_TIMEBASE:
7cc1a550
ML		 878 if (!devc)
879 /* Can't know this until we have the exact model. */
880 return SR_ERR_ARG;
a31b2ccb
AJ		 881 if (devc->num_timebases <= 0)
882 return SR_ERR_NA;
861c447b 883 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
bafd4890
ML		 884 for (i = 0; i < devc->num_timebases; i++) {
885 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
886 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
861c447b
BV		 887 tuple = g_variant_new_tuple(rational, 2);
888 g_variant_builder_add_value(&gvb, tuple);
889 }
890 *data = g_variant_builder_end(&gvb);
41f5bd09 891 break;
328bafab 892 case SR_CONF_TRIGGER_SOURCE:
7cc1a550
ML		 893 if (!devc)
894 /* Can't know this until we have the exact model. */
895 return SR_ERR_ARG;
f6a0ac9f 896 *data = g_variant_new_strv(trigger_sources,
bafd4890 897 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
328bafab 898 break;
5d336f11
AJ		 899 case SR_CONF_TRIGGER_SLOPE:
900 *data = g_variant_new_strv(trigger_slopes, ARRAY_SIZE(trigger_slopes));
901 break;
babab622
ML		 902 case SR_CONF_DATA_SOURCE:
903 if (!devc)
904 /* Can't know this until we have the exact model. */
905 return SR_ERR_ARG;
569d4dbd
ML		 906 switch (devc->model->series->protocol) {
907 case PROTOCOL_V1:
908 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
909 break;
910 case PROTOCOL_V2:
babab622 911 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
569d4dbd
ML		 912 break;
913 default:
914 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
915 break;
916 }
babab622 917 break;
a1c743fc 918 default:
e1b5b7e7 919 sr_dbg("Tried to list unknown config key: %d.", key);
bd6fbf62 920 return SR_ERR_NA;
a1c743fc
BV		 921 }
922
923 return SR_OK;
924}
925
254dd102 926static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
f4816ac6 927{
ae1bc1cc 928 struct sr_scpi_dev_inst *scpi;
29d957ce 929 struct dev_context *devc;
ba7dd8bb 930 struct sr_channel *ch;
f76c24f6 931 struct sr_datafeed_packet packet;
254dd102 932 GSList *l;
29d957ce 933
e73ffd42
BV		 934 if (sdi->status != SR_ST_ACTIVE)
935 return SR_ERR_DEV_CLOSED;
e0b7d23c 936
ae1bc1cc 937 scpi = sdi->conn;
29d957ce
UH		 938 devc = sdi->priv;
939
51b294cd
ML		 940 devc->num_frames = 0;
941
ba7dd8bb
UH		 942 for (l = sdi->channels; l; l = l->next) {
943 ch = l->data;
944 sr_dbg("handling channel %s", ch->name);
3f239f08 945 if (ch->type == SR_CHANNEL_ANALOG) {
ba7dd8bb
UH		 946 if (ch->enabled)
947 devc->enabled_analog_channels = g_slist_append(
948 devc->enabled_analog_channels, ch);
949 if (ch->enabled != devc->analog_channels[ch->index]) {
6bb192bc 950 /* Enabled channel is currently disabled, or vice versa. */
ba7dd8bb
UH		 951 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
952 ch->enabled ? "ON" : "OFF") != SR_OK)
6bb192bc 953 return SR_ERR;
ba7dd8bb 954 devc->analog_channels[ch->index] = ch->enabled;
6bb192bc 955 }
3f239f08 956 } else if (ch->type == SR_CHANNEL_LOGIC) {
ba7dd8bb
UH		 957 if (ch->enabled) {
958 devc->enabled_digital_channels = g_slist_append(
959 devc->enabled_digital_channels, ch);
04e8e01e
ML		 960 /* Turn on LA module if currently off. */
961 if (!devc->la_enabled) {
38354d9d 962 if (rigol_ds_config_set(sdi, ":LA:DISP ON") != SR_OK)
04e8e01e
ML		 963 return SR_ERR;
964 devc->la_enabled = TRUE;
965 }
966 }
ba7dd8bb 967 if (ch->enabled != devc->digital_channels[ch->index]) {
6bb192bc 968 /* Enabled channel is currently disabled, or vice versa. */
ba7dd8bb
UH		 969 if (rigol_ds_config_set(sdi, ":DIG%d:TURN %s", ch->index,
970 ch->enabled ? "ON" : "OFF") != SR_OK)
6bb192bc 971 return SR_ERR;
ba7dd8bb 972 devc->digital_channels[ch->index] = ch->enabled;
6bb192bc 973 }
254dd102
BV		 974 }
975 }
1fed20cb 976
ba7dd8bb 977 if (!devc->enabled_analog_channels && !devc->enabled_digital_channels)
254dd102 978 return SR_ERR;
e0b7d23c 979
ba7dd8bb
UH		 980 /* Turn off LA module if on and no digital channels selected. */
981 if (devc->la_enabled && !devc->enabled_digital_channels)
38354d9d 982 if (rigol_ds_config_set(sdi, ":LA:DISP OFF") != SR_OK)
04e8e01e
ML		 983 return SR_ERR;
984
e086b750
ML		 985 /* Set memory mode. */
986 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
987 sr_err("Data source 'Segmented' not yet supported");
988 return SR_ERR;
989 }
990
991 devc->analog_frame_size = analog_frame_size(sdi);
992 devc->digital_frame_size = digital_frame_size(sdi);
993
569d4dbd
ML		 994 switch (devc->model->series->protocol) {
995 case PROTOCOL_V2:
99af83b7 996 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
e086b750 997 return SR_ERR;
569d4dbd
ML		 998 break;
999 case PROTOCOL_V3:
e086b750
ML		 1000 /* Apparently for the DS2000 the memory
1001 * depth can only be set in Running state -
1002 * this matches the behaviour of the UI. */
38354d9d 1003 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1fed20cb 1004 return SR_ERR;
e086b750
ML		 1005 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
1006 devc->analog_frame_size) != SR_OK)
1007 return SR_ERR;
1008 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
1fed20cb 1009 return SR_ERR;
569d4dbd
ML		 1010 break;
1011 default:
1012 break;
1fed20cb
ML		 1013 }
1014
e086b750
ML		 1015 if (devc->data_source == DATA_SOURCE_LIVE)
1016 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1017 return SR_ERR;
1018
102f1239
BV		 1019 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
1020 rigol_ds_receive, (void *)sdi);
e0b7d23c
ML		 1021
1022 /* Send header packet to the session bus. */
29a27196 1023 std_session_send_df_header(cb_data, LOG_PREFIX);
e0b7d23c 1024
ba7dd8bb
UH		 1025 if (devc->enabled_analog_channels)
1026 devc->channel_entry = devc->enabled_analog_channels;
821fbcad 1027 else
ba7dd8bb 1028 devc->channel_entry = devc->enabled_digital_channels;
821fbcad 1029
e086b750
ML		 1030 if (rigol_ds_capture_start(sdi) != SR_OK)
1031 return SR_ERR;
f4816ac6 1032
f76c24f6
ML		 1033 /* Start of first frame. */
1034 packet.type = SR_DF_FRAME_BEGIN;
1035 sr_session_send(cb_data, &packet);
1036
f4816ac6
ML		 1037 return SR_OK;
1038}
1039
254dd102 1040static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
f4816ac6 1041{
29d957ce 1042 struct dev_context *devc;
ae1bc1cc 1043 struct sr_scpi_dev_inst *scpi;
b751cf7a 1044 struct sr_datafeed_packet packet;
29d957ce 1045
f4816ac6
ML		 1046 (void)cb_data;
1047
29d957ce
UH		 1048 devc = sdi->priv;
1049
f4816ac6
ML		 1050 if (sdi->status != SR_ST_ACTIVE) {
1051 sr_err("Device inactive, can't stop acquisition.");
1052 return SR_ERR;
1053 }
1054
b751cf7a
ML		 1055 /* End of last frame. */
1056 packet.type = SR_DF_END;
1057 sr_session_send(sdi, &packet);
1058
ba7dd8bb
UH		 1059 g_slist_free(devc->enabled_analog_channels);
1060 g_slist_free(devc->enabled_digital_channels);
1061 devc->enabled_analog_channels = NULL;
1062 devc->enabled_digital_channels = NULL;
ae1bc1cc 1063 scpi = sdi->conn;
102f1239 1064 sr_scpi_source_remove(sdi->session, scpi);
f4816ac6
ML		 1065
1066 return SR_OK;
1067}
1068
3086efdd
ML		 1069SR_PRIV struct sr_dev_driver rigol_ds_driver_info = {
1070 .name = "rigol-ds",
1071 .longname = "Rigol DS",
f4816ac6 1072 .api_version = 1,
6078d2c9
UH		 1073 .init = init,
1074 .cleanup = cleanup,
1075 .scan = scan,
1076 .dev_list = dev_list,
3b412e3a 1077 .dev_clear = dev_clear,
d62d7ad1 1078 .config_get = config_get,
035a1078 1079 .config_set = config_set,
a1c743fc 1080 .config_list = config_list,
6078d2c9
UH		 1081 .dev_open = dev_open,
1082 .dev_close = dev_close,
254dd102
BV		 1083 .dev_acquisition_start = dev_acquisition_start,
1084 .dev_acquisition_stop = dev_acquisition_stop,
f4816ac6
ML		 1085 .priv = NULL,
1086};
Hardware access and backend lib