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rigol-ds: return the actual hardware num_vdiv and vdiv list.
[libsigrok.git] / src / hardware / rigol-ds / api.c
CommitLineData
f4816ac6
ML		 1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
88e429c9 5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
bafd4890 6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
f4816ac6
ML		 7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
e0b7d23c
ML		 22#include <fcntl.h>
23#include <unistd.h>
24#include <stdlib.h>
25#include <string.h>
2b0e4a46 26#include <math.h>
f4816ac6
ML		 27#include <glib.h>
28#include "libsigrok.h"
29#include "libsigrok-internal.h"
30#include "protocol.h"
31
a0e0bb41 32static const uint32_t scanopts[] = {
ca55277c 33 SR_CONF_CONN,
0dc7b43e 34 SR_CONF_SERIALCOMM
ca55277c
ML		 35};
36
f254bc4b 37static const uint32_t devopts[] = {
1953564a 38 SR_CONF_OSCILLOSCOPE,
5827f61b
BV		 39 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
40 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
41 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
b0c9d1d1 42 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
5827f61b
BV		 43 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
44 SR_CONF_NUM_TIMEBASE | SR_CONF_GET,
45 SR_CONF_SAMPLERATE | SR_CONF_GET,
f48e0249
ML		 46};
47
f254bc4b 48static const uint32_t analog_devopts[] = {
5827f61b
BV		 49 SR_CONF_NUM_VDIV | SR_CONF_GET,
50 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
51 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
e0b7d23c
ML		 53};
54
f6a0ac9f 55static const uint64_t timebases[][2] = {
e0b7d23c 56 /* nanoseconds */
8e06edf5 57 { 1, 1000000000 },
e0b7d23c
ML		 58 { 2, 1000000000 },
59 { 5, 1000000000 },
60 { 10, 1000000000 },
61 { 20, 1000000000 },
62 { 50, 1000000000 },
63 { 100, 1000000000 },
64 { 500, 1000000000 },
65 /* microseconds */
66 { 1, 1000000 },
67 { 2, 1000000 },
68 { 5, 1000000 },
69 { 10, 1000000 },
70 { 20, 1000000 },
71 { 50, 1000000 },
72 { 100, 1000000 },
73 { 200, 1000000 },
74 { 500, 1000000 },
75 /* milliseconds */
76 { 1, 1000 },
77 { 2, 1000 },
78 { 5, 1000 },
79 { 10, 1000 },
80 { 20, 1000 },
81 { 50, 1000 },
82 { 100, 1000 },
83 { 200, 1000 },
84 { 500, 1000 },
85 /* seconds */
86 { 1, 1 },
87 { 2, 1 },
88 { 5, 1 },
89 { 10, 1 },
90 { 20, 1 },
91 { 50, 1 },
bafd4890
ML		 92 { 100, 1 },
93 { 200, 1 },
94 { 500, 1 },
8e06edf5 95 { 1000, 1 },
e0b7d23c
ML		 96};
97
f6a0ac9f 98static const uint64_t vdivs[][2] = {
bafd4890
ML		 99 /* microvolts */
100 { 500, 1000000 },
e0b7d23c 101 /* millivolts */
bafd4890 102 { 1, 1000 },
e0b7d23c
ML		 103 { 2, 1000 },
104 { 5, 1000 },
105 { 10, 1000 },
106 { 20, 1000 },
107 { 50, 1000 },
108 { 100, 1000 },
109 { 200, 1000 },
110 { 500, 1000 },
111 /* volts */
112 { 1, 1 },
113 { 2, 1 },
114 { 5, 1 },
115 { 10, 1 },
d50725e0
UH		 116 { 20, 1 },
117 { 50, 1 },
118 { 100, 1 },
e0b7d23c
ML		 119};
120
bafd4890
ML		 121#define NUM_TIMEBASE ARRAY_SIZE(timebases)
122#define NUM_VDIV ARRAY_SIZE(vdivs)
123
e0b7d23c
ML		 124static const char *trigger_sources[] = {
125 "CH1",
126 "CH2",
821fbcad
ML		 127 "CH3",
128 "CH4",
e0b7d23c
ML		 129 "EXT",
130 "AC Line",
6bb192bc
ML		 131 "D0",
132 "D1",
133 "D2",
134 "D3",
135 "D4",
136 "D5",
137 "D6",
138 "D7",
139 "D8",
140 "D9",
141 "D10",
142 "D11",
143 "D12",
144 "D13",
145 "D14",
146 "D15",
e0b7d23c
ML		 147};
148
5d336f11
AJ		 149static const char *trigger_slopes[] = {
150 "r",
151 "f",
152};
153
e0b7d23c
ML		 154static const char *coupling[] = {
155 "AC",
156 "DC",
157 "GND",
e0b7d23c
ML		 158};
159
babab622
ML		 160/* Do not change the order of entries */
161static const char *data_sources[] = {
162 "Live",
163 "Memory",
164 "Segmented",
165};
166
569d4dbd
ML		 167enum vendor {
168 RIGOL,
169 AGILENT,
170};
171
172enum series {
173 VS5000,
174 DS1000,
175 DS2000,
176 DS2000A,
177 DSO1000,
178};
10afee13 179
569d4dbd
ML		 180/* short name, full name */
181static const struct rigol_ds_vendor supported_vendors[] = {
182 [RIGOL] = {"Rigol", "Rigol Technologies"},
14e1aa6d 183 [AGILENT] = {"Agilent", "Agilent Technologies"},
569d4dbd
ML		 184};
185
186#define VENDOR(x) &supported_vendors[x]
187/* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
188 * live waveform samples, memory buffer samples */
189static const struct rigol_ds_series supported_series[] = {
190 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
191 {50, 1}, {2, 1000}, 14, 2048, 0},
192 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
193 {50, 1}, {2, 1000}, 12, 600, 1048576},
194 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
195 {500, 1}, {2, 1000}, 14, 1400, 14000},
196 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
197 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
198 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
199 {50, 1}, {2, 1000}, 12, 600, 20480},
200};
10afee13 201
569d4dbd
ML		 202#define SERIES(x) &supported_series[x]
203/* series, model, min timebase, analog channels, digital */
bafd4890 204static const struct rigol_ds_model supported_models[] = {
569d4dbd
ML		 205 {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
206 {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
207 {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
208 {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
209 {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
210 {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
211 {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
212 {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
213 {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
214 {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
215 {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
216 {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
217 {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
218 {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
219 {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
220 {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
221 {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
222 {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
223 {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
224 {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
225 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
226 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
227 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
228 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
229 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
230 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
231 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
232 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
233 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
234 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
512bb890
BV		 235};
236
3086efdd
ML		 237SR_PRIV struct sr_dev_driver rigol_ds_driver_info;
238static struct sr_dev_driver *di = &rigol_ds_driver_info;
f4816ac6 239
fa85f376 240static void clear_helper(void *priv)
f4816ac6 241{
f4816ac6 242 struct dev_context *devc;
effb9dd1 243 unsigned int i;
f4816ac6 244
ba358ffd 245 devc = priv;
babab622
ML		 246 g_free(devc->data);
247 g_free(devc->buffer);
effb9dd1
AJ		 248 for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
249 g_free(devc->coupling[i]);
fa85f376
UH		 250 g_free(devc->trigger_source);
251 g_free(devc->trigger_slope);
562b7ae5
SA		 252 g_free(devc->analog_groups);
253 g_free(devc->digital_group);
254 g_free(devc);
fa85f376 255}
f4816ac6 256
3b412e3a 257static int dev_clear(void)
fa85f376
UH		 258{
259 return std_dev_clear(di, clear_helper);
f4816ac6
ML		 260}
261
6078d2c9 262static int init(struct sr_context *sr_ctx)
f4816ac6 263{
f6beaac5 264 return std_init(sr_ctx, di, LOG_PREFIX);
f4816ac6
ML		 265}
266
9d3ae01b 267static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
f4816ac6 268{
cc9fd2d2
BV		 269 struct dev_context *devc;
270 struct sr_dev_inst *sdi;
ae1bc1cc 271 struct sr_scpi_hw_info *hw_info;
ba7dd8bb 272 struct sr_channel *ch;
8dd0b290 273 long n[3];
f6a0ac9f 274 unsigned int i;
bafd4890 275 const struct rigol_ds_model *model = NULL;
569d4dbd 276 gchar *channel_name, **version;
fb6e5ba8 277
ae1bc1cc 278 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
05238d28
ML		 279 sr_info("Couldn't get IDN response, retrying.");
280 sr_scpi_close(scpi);
281 sr_scpi_open(scpi);
282 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
283 sr_info("Couldn't get IDN response.");
284 return NULL;
285 }
ca55277c 286 }
e0b7d23c 287
ca55277c 288 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
569d4dbd
ML		 289 if (!strcasecmp(hw_info->manufacturer,
290 supported_models[i].series->vendor->full_name) &&
10afee13 291 !strcmp(hw_info->model, supported_models[i].name)) {
bafd4890 292 model = &supported_models[i];
ca55277c 293 break;
fb6e5ba8 294 }
ca55277c 295 }
fb6e5ba8 296
0af636be 297 if (!model) {
ae1bc1cc 298 sr_scpi_hw_info_free(hw_info);
9d3ae01b 299 return NULL;
ca55277c 300 }
fb6e5ba8 301
aac29cc1 302 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH		 303 sdi->status = SR_ST_ACTIVE;
304 sdi->vendor = g_strdup(model->series->vendor->name);
305 sdi->model = g_strdup(model->name);
306 sdi->version = g_strdup(hw_info->firmware_version);
ae1bc1cc 307 sdi->conn = scpi;
cc9fd2d2 308 sdi->driver = di;
ae1bc1cc 309 sdi->inst_type = SR_INST_SCPI;
b3fccc85 310 sdi->serial_num = g_strdup(hw_info->serial_number);
f57d8ffe 311 devc = g_malloc0(sizeof(struct dev_context));
cc9fd2d2 312 devc->limit_frames = 0;
bafd4890 313 devc->model = model;
569d4dbd 314 devc->format = model->series->format;
8dd0b290 315
569d4dbd
ML		 316 /* DS1000 models with firmware before 0.2.4 used the old data format. */
317 if (model->series == SERIES(DS1000)) {
8dd0b290
BV		 318 version = g_strsplit(hw_info->firmware_version, ".", 0);
319 do {
320 if (!version[0] || !version[1] || !version[2])
321 break;
322 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
323 break;
324 for (i = 0; i < 3; i++) {
325 if (sr_atol(version[i], &n[i]) != SR_OK)
326 break;
327 }
328 if (i != 3)
329 break;
330 if (n[0] != 0 || n[1] > 2)
331 break;
332 if (n[1] == 2 && n[2] > 3)
333 break;
569d4dbd
ML		 334 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
335 devc->format = FORMAT_RAW;
8dd0b290
BV		 336 } while(0);
337 g_strfreev(version);
338 }
339
340 sr_scpi_hw_info_free(hw_info);
512bb890 341
562b7ae5
SA		 342 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
343 model->analog_channels);
344
821fbcad
ML		 345 for (i = 0; i < model->analog_channels; i++) {
346 if (!(channel_name = g_strdup_printf("CH%d", i + 1)))
9d3ae01b 347 return NULL;
3f239f08 348 ch = sr_channel_new(i, SR_CHANNEL_ANALOG, TRUE, channel_name);
ba7dd8bb 349 sdi->channels = g_slist_append(sdi->channels, ch);
562b7ae5
SA		 350
351 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
352
353 devc->analog_groups[i]->name = channel_name;
354 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
660e398f 355 sdi->channel_groups = g_slist_append(sdi->channel_groups,
562b7ae5 356 devc->analog_groups[i]);
ca55277c 357 }
512bb890 358
bafd4890 359 if (devc->model->has_digital) {
562b7ae5
SA		 360 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group*));
361
effb9dd1 362 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
ca55277c 363 if (!(channel_name = g_strdup_printf("D%d", i)))
9d3ae01b 364 return NULL;
3f239f08 365 ch = sr_channel_new(i, SR_CHANNEL_LOGIC, TRUE, channel_name);
ca55277c 366 g_free(channel_name);
ba7dd8bb 367 sdi->channels = g_slist_append(sdi->channels, ch);
562b7ae5
SA		 368 devc->digital_group->channels = g_slist_append(
369 devc->digital_group->channels, ch);
512bb890 370 }
562b7ae5 371 devc->digital_group->name = g_strdup("LA");
660e398f 372 sdi->channel_groups = g_slist_append(sdi->channel_groups,
562b7ae5 373 devc->digital_group);
ca55277c 374 }
bafd4890
ML		 375
376 for (i = 0; i < NUM_TIMEBASE; i++) {
377 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
378 devc->timebases = &timebases[i];
569d4dbd 379 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
bafd4890
ML		 380 devc->num_timebases = &timebases[i] - devc->timebases + 1;
381 }
382
0709197d 383 for (i = 0; i < NUM_VDIV; i++)
81b85663 384 if (!memcmp(&devc->model->series->min_vdiv, &vdivs[i], sizeof(uint64_t[2]))) {
6ff1394e 385 devc->vdivs = &vdivs[i];
81b85663
AJ		 386 devc->num_vdivs = NUM_VDIV - i;
387 }
bafd4890 388
babab622 389 if (!(devc->buffer = g_try_malloc(ACQ_BUFFER_SIZE)))
9d3ae01b 390 return NULL;
babab622 391 if (!(devc->data = g_try_malloc(ACQ_BUFFER_SIZE * sizeof(float))))
9d3ae01b 392 return NULL;
babab622
ML		 393
394 devc->data_source = DATA_SOURCE_LIVE;
395
cc9fd2d2
BV		 396 sdi->priv = devc;
397
9d3ae01b 398 return sdi;
ca55277c 399}
512bb890 400
6078d2c9 401static GSList *scan(GSList *options)
ca55277c 402{
9d3ae01b 403 return sr_scpi_scan(di->priv, options, probe_device);
f4816ac6
ML		 404}
405
6078d2c9 406static GSList *dev_list(void)
f4816ac6 407{
0e94d524 408 return ((struct drv_context *)(di->priv))->instances;
f4816ac6
ML		 409}
410
6078d2c9 411static int dev_open(struct sr_dev_inst *sdi)
f4816ac6 412{
e1b5b7e7 413 int ret;
ae1bc1cc 414 struct sr_scpi_dev_inst *scpi = sdi->conn;
9bd4c956 415
e1b5b7e7
UH		 416 if ((ret = sr_scpi_open(scpi)) < 0) {
417 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
e0b7d23c 418 return SR_ERR;
e1b5b7e7 419 }
e0b7d23c 420
e1b5b7e7
UH		 421 if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
422 sr_err("Failed to get device config: %s.", sr_strerror(ret));
254dd102 423 return SR_ERR;
e1b5b7e7 424 }
f4816ac6 425
46a743c1 426 sdi->status = SR_ST_ACTIVE;
cc9fd2d2 427
f4816ac6
ML		 428 return SR_OK;
429}
430
6078d2c9 431static int dev_close(struct sr_dev_inst *sdi)
f4816ac6 432{
ae1bc1cc 433 struct sr_scpi_dev_inst *scpi;
22c19688 434 struct dev_context *devc;
ae1bc1cc 435
83dbd9f0
AJ		 436 if (sdi->status != SR_ST_ACTIVE)
437 return SR_ERR_DEV_CLOSED;
464d4936 438
ae1bc1cc 439 scpi = sdi->conn;
22c19688
ML		 440 devc = sdi->priv;
441
6e94eb41 442 if (devc->model->series->protocol == PROTOCOL_V2)
38354d9d 443 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
e0b7d23c 444
ae1bc1cc
ML		 445 if (scpi) {
446 if (sr_scpi_close(scpi) < 0)
447 return SR_ERR;
cc9fd2d2
BV		 448 sdi->status = SR_ST_INACTIVE;
449 }
f4816ac6
ML		 450
451 return SR_OK;
452}
453
6078d2c9 454static int cleanup(void)
f4816ac6 455{
3b412e3a 456 return dev_clear();
f4816ac6
ML		 457}
458
5415e602
ML		 459static int analog_frame_size(const struct sr_dev_inst *sdi)
460{
461 struct dev_context *devc = sdi->priv;
ba7dd8bb
UH		 462 struct sr_channel *ch;
463 int analog_channels = 0;
5415e602
ML		 464 GSList *l;
465
ba7dd8bb
UH		 466 for (l = sdi->channels; l; l = l->next) {
467 ch = l->data;
3f239f08 468 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
ba7dd8bb 469 analog_channels++;
569d4dbd
ML		 470 }
471
ba7dd8bb 472 if (analog_channels == 0)
824eb2ac
ML		 473 return 0;
474
569d4dbd
ML		 475 switch (devc->data_source) {
476 case DATA_SOURCE_LIVE:
477 return devc->model->series->live_samples;
478 case DATA_SOURCE_MEMORY:
ba7dd8bb 479 return devc->model->series->buffer_samples / analog_channels;
470140fc 480 default:
569d4dbd 481 return 0;
5415e602
ML		 482 }
483}
484
d22250a9
ML		 485static int digital_frame_size(const struct sr_dev_inst *sdi)
486{
487 struct dev_context *devc = sdi->priv;
488
569d4dbd
ML		 489 switch (devc->data_source) {
490 case DATA_SOURCE_LIVE:
491 return devc->model->series->live_samples * 2;
492 case DATA_SOURCE_MEMORY:
493 return devc->model->series->buffer_samples * 2;
d22250a9
ML		 494 default:
495 return 0;
496 }
497}
498
584560f1 499static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 500 const struct sr_channel_group *cg)
d62d7ad1 501{
e43fdd8d 502 struct dev_context *devc;
ba7dd8bb 503 struct sr_channel *ch;
2b0e4a46 504 const char *tmp_str;
c2b394d5 505 uint64_t samplerate;
2b0e4a46 506 int analog_channel = -1;
c33ff377 507 float smallest_diff = INFINITY;
2b0e4a46
AJ		 508 int idx = -1;
509 unsigned i;
d62d7ad1 510
e43fdd8d
BV		 511 if (!sdi || !(devc = sdi->priv))
512 return SR_ERR_ARG;
513
660e398f 514 /* If a channel group is specified, it must be a valid one. */
53b4680f 515 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
660e398f 516 sr_err("Invalid channel group specified.");
969edf63 517 return SR_ERR;
be60a9e4
BV		 518 }
519
53b4680f 520 if (cg) {
ba7dd8bb
UH		 521 ch = g_slist_nth_data(cg->channels, 0);
522 if (!ch)
2b0e4a46 523 return SR_ERR;
3f239f08 524 if (ch->type == SR_CHANNEL_ANALOG) {
ba7dd8bb 525 if (ch->name[2] < '1' || ch->name[2] > '4')
2b0e4a46 526 return SR_ERR;
ba7dd8bb 527 analog_channel = ch->name[2] - '1';
2b0e4a46
AJ		 528 }
529 }
530
584560f1 531 switch (key) {
d62d7ad1 532 case SR_CONF_NUM_TIMEBASE:
569d4dbd 533 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
d62d7ad1
BV		 534 break;
535 case SR_CONF_NUM_VDIV:
81b85663 536 *data = g_variant_new_int32(devc->num_vdivs);
f44f7e61 537 break;
babab622
ML		 538 case SR_CONF_DATA_SOURCE:
539 if (devc->data_source == DATA_SOURCE_LIVE)
540 *data = g_variant_new_string("Live");
541 else if (devc->data_source == DATA_SOURCE_MEMORY)
542 *data = g_variant_new_string("Memory");
543 else
544 *data = g_variant_new_string("Segmented");
545 break;
4914dd4b
ML		 546 case SR_CONF_SAMPLERATE:
547 if (devc->data_source == DATA_SOURCE_LIVE) {
c2b394d5 548 samplerate = analog_frame_size(sdi) /
569d4dbd 549 (devc->timebase * devc->model->series->num_horizontal_divs);
4914dd4b 550 *data = g_variant_new_uint64(samplerate);
c2b394d5 551 } else {
e1b5b7e7 552 sr_dbg("Unknown data source: %d.", devc->data_source);
4914dd4b 553 return SR_ERR_NA;
c2b394d5 554 }
4914dd4b 555 break;
2b0e4a46
AJ		 556 case SR_CONF_TRIGGER_SOURCE:
557 if (!strcmp(devc->trigger_source, "ACL"))
558 tmp_str = "AC Line";
559 else if (!strcmp(devc->trigger_source, "CHAN1"))
560 tmp_str = "CH1";
561 else if (!strcmp(devc->trigger_source, "CHAN2"))
562 tmp_str = "CH2";
563 else if (!strcmp(devc->trigger_source, "CHAN3"))
564 tmp_str = "CH3";
565 else if (!strcmp(devc->trigger_source, "CHAN4"))
566 tmp_str = "CH4";
567 else
568 tmp_str = devc->trigger_source;
569 *data = g_variant_new_string(tmp_str);
570 break;
5d336f11 571 case SR_CONF_TRIGGER_SLOPE:
e1b5b7e7 572 if (!strncmp(devc->trigger_slope, "POS", 3)) {
5d336f11 573 tmp_str = "r";
e1b5b7e7 574 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
5d336f11 575 tmp_str = "f";
e1b5b7e7
UH		 576 } else {
577 sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
5d336f11 578 return SR_ERR_NA;
e1b5b7e7 579 }
5d336f11
AJ		 580 *data = g_variant_new_string(tmp_str);
581 break;
2b0e4a46
AJ		 582 case SR_CONF_TIMEBASE:
583 for (i = 0; i < devc->num_timebases; i++) {
584 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
585 float diff = fabs(devc->timebase - tb);
586 if (diff < smallest_diff) {
587 smallest_diff = diff;
588 idx = i;
589 }
590 }
e1b5b7e7
UH		 591 if (idx < 0) {
592 sr_dbg("Negative timebase index: %d.", idx);
2b0e4a46 593 return SR_ERR_NA;
e1b5b7e7 594 }
2b0e4a46
AJ		 595 *data = g_variant_new("(tt)", devc->timebases[idx][0],
596 devc->timebases[idx][1]);
597 break;
598 case SR_CONF_VDIV:
e1b5b7e7
UH		 599 if (analog_channel < 0) {
600 sr_dbg("Negative analog channel: %d.", analog_channel);
2b0e4a46 601 return SR_ERR_NA;
e1b5b7e7 602 }
2b0e4a46
AJ		 603 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
604 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
605 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
606 if (diff < smallest_diff) {
607 smallest_diff = diff;
608 idx = i;
609 }
610 }
e1b5b7e7
UH		 611 if (idx < 0) {
612 sr_dbg("Negative vdiv index: %d.", idx);
2b0e4a46 613 return SR_ERR_NA;
e1b5b7e7 614 }
2b0e4a46
AJ		 615 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
616 break;
617 case SR_CONF_COUPLING:
e1b5b7e7
UH		 618 if (analog_channel < 0) {
619 sr_dbg("Negative analog channel: %d.", analog_channel);
2b0e4a46 620 return SR_ERR_NA;
e1b5b7e7 621 }
2b0e4a46
AJ		 622 *data = g_variant_new_string(devc->coupling[analog_channel]);
623 break;
d62d7ad1 624 default:
e1b5b7e7 625 sr_dbg("Tried to get unknown config key: %d.", key);
bd6fbf62 626 return SR_ERR_NA;
d62d7ad1
BV		 627 }
628
629 return SR_OK;
630}
631
584560f1 632static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
53b4680f 633 const struct sr_channel_group *cg)
f4816ac6 634{
29d957ce 635 struct dev_context *devc;
ca9b9f48 636 uint64_t p, q;
254dd102 637 double t_dbl;
f48e0249 638 unsigned int i, j;
254dd102
BV		 639 int ret;
640 const char *tmp_str;
889ef4a0 641 char buffer[16];
f4816ac6 642
e43fdd8d
BV		 643 if (!(devc = sdi->priv))
644 return SR_ERR_ARG;
29d957ce 645
e73ffd42
BV		 646 if (sdi->status != SR_ST_ACTIVE)
647 return SR_ERR_DEV_CLOSED;
f4816ac6 648
660e398f 649 /* If a channel group is specified, it must be a valid one. */
53b4680f 650 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
660e398f 651 sr_err("Invalid channel group specified.");
969edf63 652 return SR_ERR;
be60a9e4
BV		 653 }
654
f4816ac6 655 ret = SR_OK;
584560f1 656 switch (key) {
1953564a 657 case SR_CONF_LIMIT_FRAMES:
f6a0ac9f 658 devc->limit_frames = g_variant_get_uint64(data);
e0b7d23c 659 break;
1953564a 660 case SR_CONF_TRIGGER_SLOPE:
ca9b9f48
DE		 661 tmp_str = g_variant_get_string(data, NULL);
662
e1b5b7e7
UH		 663 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r')) {
664 sr_err("Unknown trigger slope: '%s'.",
665 (tmp_str) ? tmp_str : "NULL");
ca9b9f48 666 return SR_ERR_ARG;
e1b5b7e7 667 }
ca9b9f48 668
254dd102 669 g_free(devc->trigger_slope);
ca9b9f48 670 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
38354d9d 671 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
e0b7d23c 672 break;
1953564a 673 case SR_CONF_HORIZ_TRIGGERPOS:
254dd102 674 t_dbl = g_variant_get_double(data);
e1b5b7e7
UH		 675 if (t_dbl < 0.0 || t_dbl > 1.0) {
676 sr_err("Invalid horiz. trigger position: %g.", t_dbl);
254dd102 677 return SR_ERR;
e1b5b7e7 678 }
254dd102
BV		 679 devc->horiz_triggerpos = t_dbl;
680 /* We have the trigger offset as a percentage of the frame, but
681 * need to express this in seconds. */
bafd4890 682 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
889ef4a0 683 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
38354d9d 684 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
e0b7d23c 685 break;
1953564a 686 case SR_CONF_TIMEBASE:
f6a0ac9f 687 g_variant_get(data, "(tt)", &p, &q);
bafd4890
ML		 688 for (i = 0; i < devc->num_timebases; i++) {
689 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
254dd102 690 devc->timebase = (float)p / q;
889ef4a0
AJ		 691 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
692 devc->timebase);
38354d9d 693 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
f6a0ac9f
BV		 694 break;
695 }
696 }
e1b5b7e7
UH		 697 if (i == devc->num_timebases) {
698 sr_err("Invalid timebase index: %d.", i);
254dd102 699 ret = SR_ERR_ARG;
e1b5b7e7 700 }
e0b7d23c 701 break;
1953564a 702 case SR_CONF_TRIGGER_SOURCE:
f6a0ac9f 703 tmp_str = g_variant_get_string(data, NULL);
254dd102
BV		 704 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
705 if (!strcmp(trigger_sources[i], tmp_str)) {
706 g_free(devc->trigger_source);
707 devc->trigger_source = g_strdup(trigger_sources[i]);
708 if (!strcmp(devc->trigger_source, "AC Line"))
709 tmp_str = "ACL";
710 else if (!strcmp(devc->trigger_source, "CH1"))
711 tmp_str = "CHAN1";
712 else if (!strcmp(devc->trigger_source, "CH2"))
713 tmp_str = "CHAN2";
821fbcad
ML		 714 else if (!strcmp(devc->trigger_source, "CH3"))
715 tmp_str = "CHAN3";
716 else if (!strcmp(devc->trigger_source, "CH4"))
717 tmp_str = "CHAN4";
254dd102
BV		 718 else
719 tmp_str = (char *)devc->trigger_source;
38354d9d 720 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
254dd102
BV		 721 break;
722 }
4e108ace 723 }
e1b5b7e7
UH		 724 if (i == ARRAY_SIZE(trigger_sources)) {
725 sr_err("Invalid trigger source index: %d.", i);
254dd102 726 ret = SR_ERR_ARG;
e1b5b7e7 727 }
e0b7d23c 728 break;
1953564a 729 case SR_CONF_VDIV:
53b4680f 730 if (!cg) {
660e398f
UH		 731 sr_err("No channel group specified.");
732 return SR_ERR_CHANNEL_GROUP;
be60a9e4 733 }
f6a0ac9f 734 g_variant_get(data, "(tt)", &p, &q);
effb9dd1 735 for (i = 0; i < devc->model->analog_channels; i++) {
562b7ae5 736 if (cg == devc->analog_groups[i]) {
78bcc55a 737 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
f48e0249
ML		 738 if (vdivs[j][0] != p || vdivs[j][1] != q)
739 continue;
740 devc->vdiv[i] = (float)p / q;
889ef4a0
AJ		 741 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
742 devc->vdiv[i]);
38354d9d 743 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
889ef4a0 744 buffer);
f48e0249 745 }
e1b5b7e7 746 sr_err("Invalid vdiv index: %d.", j);
f48e0249
ML		 747 return SR_ERR_ARG;
748 }
e0b7d23c 749 }
e1b5b7e7 750 sr_dbg("Didn't set vdiv, unknown channel(group).");
f48e0249 751 return SR_ERR_NA;
1953564a 752 case SR_CONF_COUPLING:
53b4680f 753 if (!cg) {
660e398f
UH		 754 sr_err("No channel group specified.");
755 return SR_ERR_CHANNEL_GROUP;
78bcc55a 756 }
f6a0ac9f 757 tmp_str = g_variant_get_string(data, NULL);
effb9dd1 758 for (i = 0; i < devc->model->analog_channels; i++) {
562b7ae5 759 if (cg == devc->analog_groups[i]) {
78bcc55a
BV		 760 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
761 if (!strcmp(tmp_str, coupling[j])) {
f48e0249
ML		 762 g_free(devc->coupling[i]);
763 devc->coupling[i] = g_strdup(coupling[j]);
38354d9d 764 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
f48e0249
ML		 765 devc->coupling[i]);
766 }
767 }
e1b5b7e7 768 sr_err("Invalid coupling index: %d.", j);
f48e0249 769 return SR_ERR_ARG;
e0b7d23c
ML		 770 }
771 }
e1b5b7e7 772 sr_dbg("Didn't set coupling, unknown channel(group).");
f48e0249 773 return SR_ERR_NA;
babab622
ML		 774 case SR_CONF_DATA_SOURCE:
775 tmp_str = g_variant_get_string(data, NULL);
776 if (!strcmp(tmp_str, "Live"))
777 devc->data_source = DATA_SOURCE_LIVE;
569d4dbd
ML		 778 else if (devc->model->series->protocol >= PROTOCOL_V2
779 && !strcmp(tmp_str, "Memory"))
babab622 780 devc->data_source = DATA_SOURCE_MEMORY;
569d4dbd 781 else if (devc->model->series->protocol >= PROTOCOL_V3
babab622
ML		 782 && !strcmp(tmp_str, "Segmented"))
783 devc->data_source = DATA_SOURCE_SEGMENTED;
e1b5b7e7
UH		 784 else {
785 sr_err("Unknown data source: '%s'.", tmp_str);
babab622 786 return SR_ERR;
e1b5b7e7 787 }
babab622 788 break;
f4816ac6 789 default:
e1b5b7e7 790 sr_dbg("Tried to set unknown config key: %d.", key);
bd6fbf62 791 ret = SR_ERR_NA;
29d957ce 792 break;
f4816ac6
ML		 793 }
794
795 return ret;
796}
797
584560f1 798static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 799 const struct sr_channel_group *cg)
a1c743fc 800{
861c447b
BV		 801 GVariant *tuple, *rational[2];
802 GVariantBuilder gvb;
803 unsigned int i;
7cc1a550
ML		 804 struct dev_context *devc = NULL;
805
806 if (sdi)
807 devc = sdi->priv;
8f996b89 808
e43fdd8d 809 if (key == SR_CONF_SCAN_OPTIONS) {
584560f1 810 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
a0e0bb41 811 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
e43fdd8d 812 return SR_OK;
53b4680f 813 } else if (key == SR_CONF_DEVICE_OPTIONS && cg == NULL) {
584560f1 814 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
f254bc4b 815 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
e43fdd8d
BV		 816 return SR_OK;
817 }
818
819 /* Every other option requires a valid device instance. */
820 if (!sdi || !(devc = sdi->priv))
821 return SR_ERR_ARG;
822
660e398f 823 /* If a channel group is specified, it must be a valid one. */
53b4680f 824 if (cg) {
effb9dd1
AJ		 825 for (i = 0; i < devc->model->analog_channels; i++)
826 if (cg == devc->analog_groups[i])
827 break;
828 if (i >= devc->model->analog_channels) {
660e398f 829 sr_err("Invalid channel group specified.");
be60a9e4
BV		 830 return SR_ERR;
831 }
832 }
833
e43fdd8d 834 switch (key) {
9a6517d1 835 case SR_CONF_DEVICE_OPTIONS:
53b4680f 836 if (!cg) {
660e398f
UH		 837 sr_err("No channel group specified.");
838 return SR_ERR_CHANNEL_GROUP;
be60a9e4 839 }
562b7ae5 840 if (cg == devc->digital_group) {
584560f1
BV		 841 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
842 NULL, 0, sizeof(uint32_t));
f48e0249
ML		 843 return SR_OK;
844 } else {
effb9dd1 845 for (i = 0; i < devc->model->analog_channels; i++) {
562b7ae5 846 if (cg == devc->analog_groups[i]) {
584560f1 847 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
f254bc4b 848 analog_devopts, ARRAY_SIZE(analog_devopts), sizeof(uint32_t));
f48e0249
ML		 849 return SR_OK;
850 }
851 }
852 return SR_ERR_NA;
853 }
5f77dffc 854 break;
2a7b113d 855 case SR_CONF_COUPLING:
53b4680f 856 if (!cg) {
660e398f
UH		 857 sr_err("No channel group specified.");
858 return SR_ERR_CHANNEL_GROUP;
f48e0249 859 }
58f43369
BV		 860 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
861 break;
e4f2b2ad 862 case SR_CONF_VDIV:
7cc1a550
ML		 863 if (!devc)
864 /* Can't know this until we have the exact model. */
865 return SR_ERR_ARG;
53b4680f 866 if (!cg) {
660e398f
UH		 867 sr_err("No channel group specified.");
868 return SR_ERR_CHANNEL_GROUP;
861c447b 869 }
58f43369 870 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
81b85663 871 for (i = 0; i < devc->num_vdivs; i++) {
bafd4890
ML		 872 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
873 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
58f43369
BV		 874 tuple = g_variant_new_tuple(rational, 2);
875 g_variant_builder_add_value(&gvb, tuple);
876 }
877 *data = g_variant_builder_end(&gvb);
878 break;
41f5bd09 879 case SR_CONF_TIMEBASE:
7cc1a550
ML		 880 if (!devc)
881 /* Can't know this until we have the exact model. */
882 return SR_ERR_ARG;
a31b2ccb
AJ		 883 if (devc->num_timebases <= 0)
884 return SR_ERR_NA;
861c447b 885 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
bafd4890
ML		 886 for (i = 0; i < devc->num_timebases; i++) {
887 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
888 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
861c447b
BV		 889 tuple = g_variant_new_tuple(rational, 2);
890 g_variant_builder_add_value(&gvb, tuple);
891 }
892 *data = g_variant_builder_end(&gvb);
41f5bd09 893 break;
328bafab 894 case SR_CONF_TRIGGER_SOURCE:
7cc1a550
ML		 895 if (!devc)
896 /* Can't know this until we have the exact model. */
897 return SR_ERR_ARG;
f6a0ac9f 898 *data = g_variant_new_strv(trigger_sources,
bafd4890 899 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
328bafab 900 break;
5d336f11
AJ		 901 case SR_CONF_TRIGGER_SLOPE:
902 *data = g_variant_new_strv(trigger_slopes, ARRAY_SIZE(trigger_slopes));
903 break;
babab622
ML		 904 case SR_CONF_DATA_SOURCE:
905 if (!devc)
906 /* Can't know this until we have the exact model. */
907 return SR_ERR_ARG;
569d4dbd
ML		 908 switch (devc->model->series->protocol) {
909 case PROTOCOL_V1:
910 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
911 break;
912 case PROTOCOL_V2:
babab622 913 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
569d4dbd
ML		 914 break;
915 default:
916 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
917 break;
918 }
babab622 919 break;
a1c743fc 920 default:
e1b5b7e7 921 sr_dbg("Tried to list unknown config key: %d.", key);
bd6fbf62 922 return SR_ERR_NA;
a1c743fc
BV		 923 }
924
925 return SR_OK;
926}
927
254dd102 928static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
f4816ac6 929{
ae1bc1cc 930 struct sr_scpi_dev_inst *scpi;
29d957ce 931 struct dev_context *devc;
ba7dd8bb 932 struct sr_channel *ch;
f76c24f6 933 struct sr_datafeed_packet packet;
254dd102 934 GSList *l;
29d957ce 935
e73ffd42
BV		 936 if (sdi->status != SR_ST_ACTIVE)
937 return SR_ERR_DEV_CLOSED;
e0b7d23c 938
ae1bc1cc 939 scpi = sdi->conn;
29d957ce
UH		 940 devc = sdi->priv;
941
51b294cd
ML		 942 devc->num_frames = 0;
943
ba7dd8bb
UH		 944 for (l = sdi->channels; l; l = l->next) {
945 ch = l->data;
946 sr_dbg("handling channel %s", ch->name);
3f239f08 947 if (ch->type == SR_CHANNEL_ANALOG) {
ba7dd8bb
UH		 948 if (ch->enabled)
949 devc->enabled_analog_channels = g_slist_append(
950 devc->enabled_analog_channels, ch);
951 if (ch->enabled != devc->analog_channels[ch->index]) {
6bb192bc 952 /* Enabled channel is currently disabled, or vice versa. */
ba7dd8bb
UH		 953 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
954 ch->enabled ? "ON" : "OFF") != SR_OK)
6bb192bc 955 return SR_ERR;
ba7dd8bb 956 devc->analog_channels[ch->index] = ch->enabled;
6bb192bc 957 }
3f239f08 958 } else if (ch->type == SR_CHANNEL_LOGIC) {
ba7dd8bb
UH		 959 if (ch->enabled) {
960 devc->enabled_digital_channels = g_slist_append(
961 devc->enabled_digital_channels, ch);
04e8e01e
ML		 962 /* Turn on LA module if currently off. */
963 if (!devc->la_enabled) {
38354d9d 964 if (rigol_ds_config_set(sdi, ":LA:DISP ON") != SR_OK)
04e8e01e
ML		 965 return SR_ERR;
966 devc->la_enabled = TRUE;
967 }
968 }
ba7dd8bb 969 if (ch->enabled != devc->digital_channels[ch->index]) {
6bb192bc 970 /* Enabled channel is currently disabled, or vice versa. */
ba7dd8bb
UH		 971 if (rigol_ds_config_set(sdi, ":DIG%d:TURN %s", ch->index,
972 ch->enabled ? "ON" : "OFF") != SR_OK)
6bb192bc 973 return SR_ERR;
ba7dd8bb 974 devc->digital_channels[ch->index] = ch->enabled;
6bb192bc 975 }
254dd102
BV		 976 }
977 }
1fed20cb 978
ba7dd8bb 979 if (!devc->enabled_analog_channels && !devc->enabled_digital_channels)
254dd102 980 return SR_ERR;
e0b7d23c 981
ba7dd8bb
UH		 982 /* Turn off LA module if on and no digital channels selected. */
983 if (devc->la_enabled && !devc->enabled_digital_channels)
38354d9d 984 if (rigol_ds_config_set(sdi, ":LA:DISP OFF") != SR_OK)
04e8e01e
ML		 985 return SR_ERR;
986
e086b750
ML		 987 /* Set memory mode. */
988 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
989 sr_err("Data source 'Segmented' not yet supported");
990 return SR_ERR;
991 }
992
993 devc->analog_frame_size = analog_frame_size(sdi);
994 devc->digital_frame_size = digital_frame_size(sdi);
995
569d4dbd
ML		 996 switch (devc->model->series->protocol) {
997 case PROTOCOL_V2:
99af83b7 998 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
e086b750 999 return SR_ERR;
569d4dbd
ML		 1000 break;
1001 case PROTOCOL_V3:
e086b750
ML		 1002 /* Apparently for the DS2000 the memory
1003 * depth can only be set in Running state -
1004 * this matches the behaviour of the UI. */
38354d9d 1005 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1fed20cb 1006 return SR_ERR;
e086b750
ML		 1007 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
1008 devc->analog_frame_size) != SR_OK)
1009 return SR_ERR;
1010 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
1fed20cb 1011 return SR_ERR;
569d4dbd
ML		 1012 break;
1013 default:
1014 break;
1fed20cb
ML		 1015 }
1016
e086b750
ML		 1017 if (devc->data_source == DATA_SOURCE_LIVE)
1018 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1019 return SR_ERR;
1020
102f1239
BV		 1021 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
1022 rigol_ds_receive, (void *)sdi);
e0b7d23c
ML		 1023
1024 /* Send header packet to the session bus. */
29a27196 1025 std_session_send_df_header(cb_data, LOG_PREFIX);
e0b7d23c 1026
ba7dd8bb
UH		 1027 if (devc->enabled_analog_channels)
1028 devc->channel_entry = devc->enabled_analog_channels;
821fbcad 1029 else
ba7dd8bb 1030 devc->channel_entry = devc->enabled_digital_channels;
821fbcad 1031
e086b750
ML		 1032 if (rigol_ds_capture_start(sdi) != SR_OK)
1033 return SR_ERR;
f4816ac6 1034
f76c24f6
ML		 1035 /* Start of first frame. */
1036 packet.type = SR_DF_FRAME_BEGIN;
1037 sr_session_send(cb_data, &packet);
1038
f4816ac6
ML		 1039 return SR_OK;
1040}
1041
254dd102 1042static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
f4816ac6 1043{
29d957ce 1044 struct dev_context *devc;
ae1bc1cc 1045 struct sr_scpi_dev_inst *scpi;
b751cf7a 1046 struct sr_datafeed_packet packet;
29d957ce 1047
f4816ac6
ML		 1048 (void)cb_data;
1049
29d957ce
UH		 1050 devc = sdi->priv;
1051
f4816ac6
ML		 1052 if (sdi->status != SR_ST_ACTIVE) {
1053 sr_err("Device inactive, can't stop acquisition.");
1054 return SR_ERR;
1055 }
1056
b751cf7a
ML		 1057 /* End of last frame. */
1058 packet.type = SR_DF_END;
1059 sr_session_send(sdi, &packet);
1060
ba7dd8bb
UH		 1061 g_slist_free(devc->enabled_analog_channels);
1062 g_slist_free(devc->enabled_digital_channels);
1063 devc->enabled_analog_channels = NULL;
1064 devc->enabled_digital_channels = NULL;
ae1bc1cc 1065 scpi = sdi->conn;
102f1239 1066 sr_scpi_source_remove(sdi->session, scpi);
f4816ac6
ML		 1067
1068 return SR_OK;
1069}
1070
3086efdd
ML		 1071SR_PRIV struct sr_dev_driver rigol_ds_driver_info = {
1072 .name = "rigol-ds",
1073 .longname = "Rigol DS",
f4816ac6 1074 .api_version = 1,
6078d2c9
UH		 1075 .init = init,
1076 .cleanup = cleanup,
1077 .scan = scan,
1078 .dev_list = dev_list,
3b412e3a 1079 .dev_clear = dev_clear,
d62d7ad1 1080 .config_get = config_get,
035a1078 1081 .config_set = config_set,
a1c743fc 1082 .config_list = config_list,
6078d2c9
UH		 1083 .dev_open = dev_open,
1084 .dev_close = dev_close,
254dd102
BV		 1085 .dev_acquisition_start = dev_acquisition_start,
1086 .dev_acquisition_stop = dev_acquisition_stop,
f4816ac6
ML		 1087 .priv = NULL,
1088};
Hardware access and backend lib