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0aba65da | 1 | /* |
50985c20 | 2 | * This file is part of the libsigrok project. |
0aba65da | 3 | * |
13d8e03c | 4 | * Copyright (C) 2013 Bert Vermeulen <bert@biot.com> |
0aba65da UH |
5 | * |
6 | * This program is free software: you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation, either version 3 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
6ec6c43b | 20 | #include <config.h> |
515ab088 | 21 | #include "protocol.h" |
0aba65da UH |
22 | |
23 | #define SERIALCOMM "115200/8n1" | |
24 | ||
a0e0bb41 | 25 | static const uint32_t scanopts[] = { |
1953564a BV |
26 | SR_CONF_CONN, |
27 | SR_CONF_SERIALCOMM, | |
aeabd308 UH |
28 | }; |
29 | ||
55fb76b3 UH |
30 | static const uint32_t drvopts[] = { |
31 | SR_CONF_LOGIC_ANALYZER, | |
32 | }; | |
33 | ||
f254bc4b | 34 | static const uint32_t devopts[] = { |
5827f61b BV |
35 | SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
36 | SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
37 | SR_CONF_TRIGGER_MATCH | SR_CONF_LIST, | |
38 | SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET, | |
39 | SR_CONF_EXTERNAL_CLOCK | SR_CONF_SET, | |
f20c39d9 | 40 | SR_CONF_CLOCK_EDGE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
5827f61b BV |
41 | SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
42 | SR_CONF_SWAP | SR_CONF_SET, | |
43 | SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET, | |
0aba65da UH |
44 | }; |
45 | ||
91fd0f72 BV |
46 | static const int32_t trigger_matches[] = { |
47 | SR_TRIGGER_ZERO, | |
48 | SR_TRIGGER_ONE, | |
49 | }; | |
50 | ||
f20c39d9 | 51 | static const char* external_clock_edges[] = { |
52 | "rising", // positive edge | |
53 | "falling" // negative edge | |
54 | }; | |
55 | ||
6d16fdfb BV |
56 | #define STR_PATTERN_NONE "None" |
57 | #define STR_PATTERN_EXTERNAL "External" | |
58 | #define STR_PATTERN_INTERNAL "Internal" | |
967760a8 MR |
59 | |
60 | /* Supported methods of test pattern outputs */ | |
61 | enum { | |
62 | /** | |
63 | * Capture pins 31:16 (unbuffered wing) output a test pattern | |
64 | * that can captured on pins 0:15. | |
65 | */ | |
66 | PATTERN_EXTERNAL, | |
67 | ||
68 | /** Route test pattern internally to capture buffer. */ | |
69 | PATTERN_INTERNAL, | |
70 | }; | |
71 | ||
7c07a178 | 72 | static const char *patterns[] = { |
6d16fdfb | 73 | STR_PATTERN_NONE, |
7c07a178 UH |
74 | STR_PATTERN_EXTERNAL, |
75 | STR_PATTERN_INTERNAL, | |
76 | }; | |
77 | ||
ba7dd8bb | 78 | /* Channels are numbered 0-31 (on the PCB silkscreen). */ |
53cda65a | 79 | SR_PRIV const char *ols_channel_names[] = { |
78693401 UH |
80 | "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12", |
81 | "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23", | |
82 | "24", "25", "26", "27", "28", "29", "30", "31", | |
0aba65da UH |
83 | }; |
84 | ||
d3b38ad3 | 85 | /* Default supported samplerates, can be overridden by device metadata. */ |
e46aa4f6 BV |
86 | static const uint64_t samplerates[] = { |
87 | SR_HZ(10), | |
88 | SR_MHZ(200), | |
89 | SR_HZ(1), | |
0aba65da UH |
90 | }; |
91 | ||
ae4e6999 | 92 | #define RESPONSE_DELAY_US (20 * 1000) |
1a46cc62 | 93 | |
4f840ce9 | 94 | static GSList *scan(struct sr_dev_driver *di, GSList *options) |
0aba65da | 95 | { |
1987b8d6 | 96 | struct sr_config *src; |
0aba65da | 97 | struct sr_dev_inst *sdi; |
0aba65da | 98 | struct sr_serial_dev_inst *serial; |
43376f33 | 99 | GSList *l; |
35be304b | 100 | int num_read; |
07ffa5b3 | 101 | unsigned int i; |
0aba65da | 102 | const char *conn, *serialcomm; |
35be304b | 103 | char buf[4] = { 0, 0, 0, 0 }; |
0aba65da | 104 | |
0aba65da UH |
105 | conn = serialcomm = NULL; |
106 | for (l = options; l; l = l->next) { | |
1987b8d6 BV |
107 | src = l->data; |
108 | switch (src->key) { | |
1953564a | 109 | case SR_CONF_CONN: |
e46aa4f6 | 110 | conn = g_variant_get_string(src->data, NULL); |
0aba65da | 111 | break; |
1953564a | 112 | case SR_CONF_SERIALCOMM: |
e46aa4f6 | 113 | serialcomm = g_variant_get_string(src->data, NULL); |
0aba65da UH |
114 | break; |
115 | } | |
116 | } | |
117 | if (!conn) | |
118 | return NULL; | |
119 | ||
98fec29e | 120 | if (!serialcomm) |
0aba65da UH |
121 | serialcomm = SERIALCOMM; |
122 | ||
91219afc | 123 | serial = sr_serial_dev_inst_new(conn, serialcomm); |
0aba65da UH |
124 | |
125 | /* The discovery procedure is like this: first send the Reset | |
126 | * command (0x00) 5 times, since the device could be anywhere | |
127 | * in a 5-byte command. Then send the ID command (0x02). | |
128 | * If the device responds with 4 bytes ("OLS1" or "SLA1"), we | |
129 | * have a match. | |
130 | */ | |
131 | sr_info("Probing %s.", conn); | |
4ded59ee | 132 | if (serial_open(serial, SERIAL_RDWR) != SR_OK) |
0aba65da UH |
133 | return NULL; |
134 | ||
244995a2 | 135 | if (ols_send_reset(serial) != SR_OK) { |
0aba65da UH |
136 | serial_close(serial); |
137 | sr_err("Could not use port %s. Quitting.", conn); | |
138 | return NULL; | |
139 | } | |
140 | send_shortcommand(serial, CMD_ID); | |
141 | ||
1a46cc62 | 142 | g_usleep(RESPONSE_DELAY_US); |
0aba65da | 143 | |
f9921513 | 144 | if (serial_has_receive_data(serial) == 0) { |
35be304b | 145 | sr_dbg("Didn't get any ID reply."); |
0aba65da | 146 | return NULL; |
ed936ccc UH |
147 | } |
148 | ||
35be304b WS |
149 | num_read = serial_read_blocking(serial, buf, 4, serial_timeout(serial, 4)); |
150 | if (num_read < 0) { | |
151 | sr_err("Getting ID reply failed (%d).", num_read); | |
0aba65da | 152 | return NULL; |
ed936ccc UH |
153 | } |
154 | ||
155 | if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4)) { | |
35be304b WS |
156 | GString *id = sr_hexdump_new((uint8_t *)buf, num_read); |
157 | ||
158 | sr_err("Invalid ID reply (got %s).", id->str); | |
159 | ||
160 | sr_hexdump_free(id); | |
0aba65da | 161 | return NULL; |
ed936ccc | 162 | } |
0aba65da UH |
163 | |
164 | /* Definitely using the OLS protocol, check if it supports | |
165 | * the metadata command. | |
166 | */ | |
167 | send_shortcommand(serial, CMD_METADATA); | |
ed936ccc | 168 | |
1a46cc62 | 169 | g_usleep(RESPONSE_DELAY_US); |
ed936ccc | 170 | |
f9921513 | 171 | if (serial_has_receive_data(serial) != 0) { |
0aba65da UH |
172 | /* Got metadata. */ |
173 | sdi = get_metadata(serial); | |
0aba65da UH |
174 | } else { |
175 | /* Not an OLS -- some other board that uses the sump protocol. */ | |
72cd99b8 | 176 | sr_info("Device does not support metadata."); |
aac29cc1 | 177 | sdi = g_malloc0(sizeof(struct sr_dev_inst)); |
0af636be UH |
178 | sdi->status = SR_ST_INACTIVE; |
179 | sdi->vendor = g_strdup("Sump"); | |
180 | sdi->model = g_strdup("Logic Analyzer"); | |
181 | sdi->version = g_strdup("v1.0"); | |
07ffa5b3 | 182 | for (i = 0; i < ARRAY_SIZE(ols_channel_names); i++) |
5e23fcab | 183 | sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, |
c368e6f3 | 184 | ols_channel_names[i]); |
e57057ae | 185 | sdi->priv = ols_dev_new(); |
0aba65da | 186 | } |
bf256783 BV |
187 | /* Configure samplerate and divider. */ |
188 | if (ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK) | |
189 | sr_dbg("Failed to set default samplerate (%"PRIu64").", | |
190 | DEFAULT_SAMPLERATE); | |
459a0f26 BV |
191 | sdi->inst_type = SR_INST_SERIAL; |
192 | sdi->conn = serial; | |
bf256783 | 193 | |
0aba65da UH |
194 | serial_close(serial); |
195 | ||
43376f33 | 196 | return std_scan_complete(di, g_slist_append(NULL, sdi)); |
0aba65da UH |
197 | } |
198 | ||
dd7a72ea UH |
199 | static int config_get(uint32_t key, GVariant **data, |
200 | const struct sr_dev_inst *sdi, const struct sr_channel_group *cg) | |
0aba65da UH |
201 | { |
202 | struct dev_context *devc; | |
203 | ||
53b4680f | 204 | (void)cg; |
8f996b89 | 205 | |
0c05591a BV |
206 | if (!sdi) |
207 | return SR_ERR_ARG; | |
208 | ||
209 | devc = sdi->priv; | |
758906aa | 210 | |
584560f1 | 211 | switch (key) { |
123e1313 | 212 | case SR_CONF_SAMPLERATE: |
0c05591a BV |
213 | *data = g_variant_new_uint64(devc->cur_samplerate); |
214 | break; | |
215 | case SR_CONF_CAPTURE_RATIO: | |
216 | *data = g_variant_new_uint64(devc->capture_ratio); | |
217 | break; | |
218 | case SR_CONF_LIMIT_SAMPLES: | |
219 | *data = g_variant_new_uint64(devc->limit_samples); | |
220 | break; | |
967760a8 | 221 | case SR_CONF_PATTERN_MODE: |
a80bed76 | 222 | if (devc->capture_flags & CAPTURE_FLAG_EXTERNAL_TEST_MODE) |
967760a8 | 223 | *data = g_variant_new_string(STR_PATTERN_EXTERNAL); |
a80bed76 | 224 | else if (devc->capture_flags & CAPTURE_FLAG_INTERNAL_TEST_MODE) |
967760a8 | 225 | *data = g_variant_new_string(STR_PATTERN_INTERNAL); |
6d16fdfb BV |
226 | else |
227 | *data = g_variant_new_string(STR_PATTERN_NONE); | |
967760a8 | 228 | break; |
0c05591a | 229 | case SR_CONF_RLE: |
a80bed76 | 230 | *data = g_variant_new_boolean(devc->capture_flags & CAPTURE_FLAG_RLE ? TRUE : FALSE); |
7730e4f0 | 231 | break; |
f20c39d9 | 232 | case SR_CONF_CLOCK_EDGE: |
233 | *data = g_variant_new_string(external_clock_edges[ | |
234 | devc->capture_flags & CAPTURE_FLAG_INVERT_EXT_CLOCK ? 1 : 0]); | |
235 | break; | |
0aba65da | 236 | default: |
bd6fbf62 | 237 | return SR_ERR_NA; |
0aba65da UH |
238 | } |
239 | ||
240 | return SR_OK; | |
241 | } | |
242 | ||
dd7a72ea UH |
243 | static int config_set(uint32_t key, GVariant *data, |
244 | const struct sr_dev_inst *sdi, const struct sr_channel_group *cg) | |
0aba65da UH |
245 | { |
246 | struct dev_context *devc; | |
6d16fdfb | 247 | uint16_t flag; |
e46aa4f6 | 248 | uint64_t tmp_u64; |
967760a8 | 249 | const char *stropt; |
0aba65da | 250 | |
53b4680f | 251 | (void)cg; |
8f996b89 | 252 | |
0aba65da UH |
253 | devc = sdi->priv; |
254 | ||
584560f1 | 255 | switch (key) { |
1953564a | 256 | case SR_CONF_SAMPLERATE: |
e46aa4f6 BV |
257 | tmp_u64 = g_variant_get_uint64(data); |
258 | if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1]) | |
259 | return SR_ERR_SAMPLERATE; | |
758906aa | 260 | return ols_set_samplerate(sdi, g_variant_get_uint64(data)); |
1953564a | 261 | case SR_CONF_LIMIT_SAMPLES: |
e46aa4f6 BV |
262 | tmp_u64 = g_variant_get_uint64(data); |
263 | if (tmp_u64 < MIN_NUM_SAMPLES) | |
0aba65da | 264 | return SR_ERR; |
e46aa4f6 | 265 | devc->limit_samples = tmp_u64; |
0aba65da | 266 | break; |
1953564a | 267 | case SR_CONF_CAPTURE_RATIO: |
e46aa4f6 | 268 | devc->capture_ratio = g_variant_get_uint64(data); |
0aba65da | 269 | break; |
eb1b610b MR |
270 | case SR_CONF_EXTERNAL_CLOCK: |
271 | if (g_variant_get_boolean(data)) { | |
272 | sr_info("Enabling external clock."); | |
a80bed76 | 273 | devc->capture_flags |= CAPTURE_FLAG_CLOCK_EXTERNAL; |
eb1b610b MR |
274 | } else { |
275 | sr_info("Disabled external clock."); | |
a80bed76 | 276 | devc->capture_flags &= ~CAPTURE_FLAG_CLOCK_EXTERNAL; |
eb1b610b | 277 | } |
eb1b610b | 278 | break; |
f20c39d9 | 279 | case SR_CONF_CLOCK_EDGE: |
280 | stropt = g_variant_get_string(data, NULL); | |
281 | if (!strcmp(stropt, external_clock_edges[1])) { | |
282 | sr_info("Triggering on falling edge of external clock."); | |
283 | devc->capture_flags |= CAPTURE_FLAG_INVERT_EXT_CLOCK; | |
284 | } else { | |
285 | sr_info("Triggering on rising edge of external clock."); | |
286 | devc->capture_flags &= ~CAPTURE_FLAG_INVERT_EXT_CLOCK; | |
287 | } | |
288 | break; | |
967760a8 MR |
289 | case SR_CONF_PATTERN_MODE: |
290 | stropt = g_variant_get_string(data, NULL); | |
6d16fdfb BV |
291 | if (!strcmp(stropt, STR_PATTERN_NONE)) { |
292 | sr_info("Disabling test modes."); | |
293 | flag = 0x0000; | |
758906aa | 294 | } else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) { |
967760a8 | 295 | sr_info("Enabling internal test mode."); |
a80bed76 | 296 | flag = CAPTURE_FLAG_INTERNAL_TEST_MODE; |
967760a8 MR |
297 | } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) { |
298 | sr_info("Enabling external test mode."); | |
a80bed76 | 299 | flag = CAPTURE_FLAG_EXTERNAL_TEST_MODE; |
967760a8 | 300 | } else { |
758906aa | 301 | return SR_ERR; |
967760a8 | 302 | } |
a80bed76 | 303 | devc->capture_flags &= ~CAPTURE_FLAG_INTERNAL_TEST_MODE; |
304 | devc->capture_flags &= ~CAPTURE_FLAG_EXTERNAL_TEST_MODE; | |
305 | devc->capture_flags |= flag; | |
967760a8 | 306 | break; |
7b0a57fd MR |
307 | case SR_CONF_SWAP: |
308 | if (g_variant_get_boolean(data)) { | |
309 | sr_info("Enabling channel swapping."); | |
a80bed76 | 310 | devc->capture_flags |= CAPTURE_FLAG_SWAP_CHANNELS; |
7b0a57fd MR |
311 | } else { |
312 | sr_info("Disabling channel swapping."); | |
a80bed76 | 313 | devc->capture_flags &= ~CAPTURE_FLAG_SWAP_CHANNELS; |
7b0a57fd | 314 | } |
7b0a57fd | 315 | break; |
1953564a | 316 | case SR_CONF_RLE: |
e46aa4f6 | 317 | if (g_variant_get_boolean(data)) { |
0aba65da | 318 | sr_info("Enabling RLE."); |
a80bed76 | 319 | devc->capture_flags |= CAPTURE_FLAG_RLE; |
aeea0572 BV |
320 | } else { |
321 | sr_info("Disabling RLE."); | |
a80bed76 | 322 | devc->capture_flags &= ~CAPTURE_FLAG_RLE; |
0aba65da | 323 | } |
0aba65da UH |
324 | break; |
325 | default: | |
758906aa | 326 | return SR_ERR_NA; |
0aba65da UH |
327 | } |
328 | ||
758906aa | 329 | return SR_OK; |
0aba65da UH |
330 | } |
331 | ||
dd7a72ea UH |
332 | static int config_list(uint32_t key, GVariant **data, |
333 | const struct sr_dev_inst *sdi, const struct sr_channel_group *cg) | |
a1c743fc | 334 | { |
f0de2dd0 | 335 | struct dev_context *devc; |
91fd0f72 | 336 | int num_ols_changrp, i; |
a1c743fc | 337 | |
a1c743fc | 338 | switch (key) { |
0d485e30 | 339 | case SR_CONF_SCAN_OPTIONS: |
9a6517d1 | 340 | case SR_CONF_DEVICE_OPTIONS: |
e66d1892 | 341 | return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts); |
a1c743fc | 342 | case SR_CONF_SAMPLERATE: |
53012da6 | 343 | *data = std_gvar_samplerates_steps(ARRAY_AND_SIZE(samplerates)); |
a1c743fc | 344 | break; |
91fd0f72 | 345 | case SR_CONF_TRIGGER_MATCH: |
53012da6 | 346 | *data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches)); |
c50277a6 | 347 | break; |
f20c39d9 | 348 | case SR_CONF_CLOCK_EDGE: |
349 | *data = std_gvar_array_str(ARRAY_AND_SIZE(external_clock_edges)); | |
350 | break; | |
7c07a178 | 351 | case SR_CONF_PATTERN_MODE: |
53012da6 | 352 | *data = g_variant_new_strv(ARRAY_AND_SIZE(patterns)); |
7c07a178 | 353 | break; |
f0de2dd0 BV |
354 | case SR_CONF_LIMIT_SAMPLES: |
355 | if (!sdi) | |
356 | return SR_ERR_ARG; | |
357 | devc = sdi->priv; | |
a80bed76 | 358 | if (devc->capture_flags & CAPTURE_FLAG_RLE) |
f0de2dd0 BV |
359 | return SR_ERR_NA; |
360 | if (devc->max_samples == 0) | |
361 | /* Device didn't specify sample memory size in metadata. */ | |
362 | return SR_ERR_NA; | |
363 | /* | |
ba7dd8bb | 364 | * Channel groups are turned off if no channels in that group are |
f0de2dd0 BV |
365 | * enabled, making more room for samples for the enabled group. |
366 | */ | |
91fd0f72 BV |
367 | ols_channel_mask(sdi); |
368 | num_ols_changrp = 0; | |
f0de2dd0 | 369 | for (i = 0; i < 4; i++) { |
ba7dd8bb | 370 | if (devc->channel_mask & (0xff << (i * 8))) |
91fd0f72 | 371 | num_ols_changrp++; |
1e1dac0c | 372 | } |
a162eeb2 UH |
373 | |
374 | *data = std_gvar_tuple_u64(MIN_NUM_SAMPLES, | |
375 | (num_ols_changrp) ? devc->max_samples / num_ols_changrp : MIN_NUM_SAMPLES); | |
f0de2dd0 | 376 | break; |
a1c743fc | 377 | default: |
bd6fbf62 | 378 | return SR_ERR_NA; |
a1c743fc BV |
379 | } |
380 | ||
381 | return SR_OK; | |
382 | } | |
383 | ||
6f9234e6 | 384 | static int set_basic_trigger(const struct sr_dev_inst *sdi, int stage) |
016e72f3 BV |
385 | { |
386 | struct dev_context *devc; | |
387 | struct sr_serial_dev_inst *serial; | |
388 | uint8_t cmd, arg[4]; | |
389 | ||
390 | devc = sdi->priv; | |
391 | serial = sdi->conn; | |
392 | ||
6f9234e6 | 393 | cmd = CMD_SET_BASIC_TRIGGER_MASK0 + stage * 4; |
016e72f3 BV |
394 | arg[0] = devc->trigger_mask[stage] & 0xff; |
395 | arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff; | |
396 | arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff; | |
397 | arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff; | |
398 | if (send_longcommand(serial, cmd, arg) != SR_OK) | |
399 | return SR_ERR; | |
400 | ||
6f9234e6 | 401 | cmd = CMD_SET_BASIC_TRIGGER_VALUE0 + stage * 4; |
016e72f3 BV |
402 | arg[0] = devc->trigger_value[stage] & 0xff; |
403 | arg[1] = (devc->trigger_value[stage] >> 8) & 0xff; | |
404 | arg[2] = (devc->trigger_value[stage] >> 16) & 0xff; | |
405 | arg[3] = (devc->trigger_value[stage] >> 24) & 0xff; | |
406 | if (send_longcommand(serial, cmd, arg) != SR_OK) | |
407 | return SR_ERR; | |
408 | ||
6f9234e6 | 409 | cmd = CMD_SET_BASIC_TRIGGER_CONFIG0 + stage * 4; |
016e72f3 BV |
410 | arg[0] = arg[1] = arg[3] = 0x00; |
411 | arg[2] = stage; | |
412 | if (stage == devc->num_stages) | |
413 | /* Last stage, fire when this one matches. */ | |
414 | arg[3] |= TRIGGER_START; | |
415 | if (send_longcommand(serial, cmd, arg) != SR_OK) | |
416 | return SR_ERR; | |
417 | ||
418 | return SR_OK; | |
419 | } | |
420 | ||
695dc859 | 421 | static int dev_acquisition_start(const struct sr_dev_inst *sdi) |
0aba65da | 422 | { |
0aba65da | 423 | struct dev_context *devc; |
459a0f26 | 424 | struct sr_serial_dev_inst *serial; |
6e5a1a01 | 425 | uint32_t samplecount, readcount, delaycount; |
91fd0f72 BV |
426 | uint8_t ols_changrp_mask, arg[4]; |
427 | int num_ols_changrp; | |
016e72f3 | 428 | int ret, i; |
0aba65da UH |
429 | |
430 | devc = sdi->priv; | |
459a0f26 | 431 | serial = sdi->conn; |
0aba65da | 432 | |
91fd0f72 | 433 | ols_channel_mask(sdi); |
0aba65da | 434 | |
91fd0f72 BV |
435 | num_ols_changrp = 0; |
436 | ols_changrp_mask = 0; | |
0aba65da | 437 | for (i = 0; i < 4; i++) { |
ba7dd8bb | 438 | if (devc->channel_mask & (0xff << (i * 8))) { |
91fd0f72 BV |
439 | ols_changrp_mask |= (1 << i); |
440 | num_ols_changrp++; | |
0aba65da UH |
441 | } |
442 | } | |
443 | ||
444 | /* | |
445 | * Limit readcount to prevent reading past the end of the hardware | |
aad0c777 | 446 | * buffer. Rather read too many samples than too few. |
0aba65da | 447 | */ |
91fd0f72 | 448 | samplecount = MIN(devc->max_samples / num_ols_changrp, devc->limit_samples); |
aad0c777 | 449 | readcount = (samplecount + 3) / 4; |
0aba65da | 450 | |
016e72f3 | 451 | /* Basic triggers. */ |
91fd0f72 BV |
452 | if (ols_convert_trigger(sdi) != SR_OK) { |
453 | sr_err("Failed to configure channels."); | |
454 | return SR_ERR; | |
455 | } | |
456 | if (devc->num_stages > 0) { | |
b853eb76 GGM |
457 | /* |
458 | * According to http://mygizmos.org/ols/Logic-Sniffer-FPGA-Spec.pdf | |
459 | * reset command must be send prior each arm command | |
460 | */ | |
461 | sr_dbg("Send reset command before trigger configure"); | |
462 | if (ols_send_reset(serial) != SR_OK) | |
463 | return SR_ERR; | |
464 | ||
0aba65da | 465 | delaycount = readcount * (1 - devc->capture_ratio / 100.0); |
a2b1a53b | 466 | devc->trigger_at_smpl = (readcount - delaycount) * 4 - devc->num_stages; |
016e72f3 | 467 | for (i = 0; i <= devc->num_stages; i++) { |
91fd0f72 | 468 | sr_dbg("Setting OLS stage %d trigger.", i); |
6f9234e6 | 469 | if ((ret = set_basic_trigger(sdi, i)) != SR_OK) |
016e72f3 BV |
470 | return ret; |
471 | } | |
0aba65da | 472 | } else { |
016e72f3 BV |
473 | /* No triggers configured, force trigger on first stage. */ |
474 | sr_dbg("Forcing trigger at stage 0."); | |
6f9234e6 | 475 | if ((ret = set_basic_trigger(sdi, 0)) != SR_OK) |
016e72f3 | 476 | return ret; |
0aba65da UH |
477 | delaycount = readcount; |
478 | } | |
479 | ||
6d16fdfb | 480 | /* Samplerate. */ |
016e72f3 | 481 | sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)", |
6d16fdfb | 482 | devc->cur_samplerate, devc->cur_samplerate_divider); |
016e72f3 BV |
483 | arg[0] = devc->cur_samplerate_divider & 0xff; |
484 | arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8; | |
485 | arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16; | |
486 | arg[3] = 0x00; | |
487 | if (send_longcommand(serial, CMD_SET_DIVIDER, arg) != SR_OK) | |
0aba65da UH |
488 | return SR_ERR; |
489 | ||
490 | /* Send sample limit and pre/post-trigger capture ratio. */ | |
016e72f3 | 491 | sr_dbg("Setting sample limit %d, trigger point at %d", |
6d16fdfb | 492 | (readcount - 1) * 4, (delaycount - 1) * 4); |
f6ce25ec WS |
493 | |
494 | if (devc->max_samples > 256 * 1024) { | |
495 | arg[0] = ((readcount - 1) & 0xff); | |
496 | arg[1] = ((readcount - 1) & 0xff00) >> 8; | |
497 | arg[2] = ((readcount - 1) & 0xff0000) >> 16; | |
498 | arg[3] = ((readcount - 1) & 0xff000000) >> 24; | |
499 | if (send_longcommand(serial, CMD_CAPTURE_READCOUNT, arg) != SR_OK) | |
500 | return SR_ERR; | |
501 | arg[0] = ((delaycount - 1) & 0xff); | |
502 | arg[1] = ((delaycount - 1) & 0xff00) >> 8; | |
503 | arg[2] = ((delaycount - 1) & 0xff0000) >> 16; | |
504 | arg[3] = ((delaycount - 1) & 0xff000000) >> 24; | |
505 | if (send_longcommand(serial, CMD_CAPTURE_DELAYCOUNT, arg) != SR_OK) | |
506 | return SR_ERR; | |
507 | } else { | |
508 | arg[0] = ((readcount - 1) & 0xff); | |
509 | arg[1] = ((readcount - 1) & 0xff00) >> 8; | |
510 | arg[2] = ((delaycount - 1) & 0xff); | |
511 | arg[3] = ((delaycount - 1) & 0xff00) >> 8; | |
512 | if (send_longcommand(serial, CMD_CAPTURE_SIZE, arg) != SR_OK) | |
513 | return SR_ERR; | |
514 | } | |
0aba65da | 515 | |
6d16fdfb | 516 | /* Flag register. */ |
f20c39d9 | 517 | sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s, %s clock%s", |
a80bed76 | 518 | devc->capture_flags & CAPTURE_FLAG_INTERNAL_TEST_MODE ? "on": "off", |
519 | devc->capture_flags & CAPTURE_FLAG_EXTERNAL_TEST_MODE ? "on": "off", | |
520 | devc->capture_flags & CAPTURE_FLAG_RLE ? "on" : "off", | |
521 | devc->capture_flags & CAPTURE_FLAG_NOISE_FILTER ? "on": "off", | |
f20c39d9 | 522 | devc->capture_flags & CAPTURE_FLAG_DEMUX ? "on" : "off", |
523 | devc->capture_flags & CAPTURE_FLAG_CLOCK_EXTERNAL ? "external" : "internal", | |
524 | devc->capture_flags & CAPTURE_FLAG_CLOCK_EXTERNAL ? (devc->capture_flags & CAPTURE_FLAG_INVERT_EXT_CLOCK | |
525 | ? " on falling edge" : "on rising edge") : ""); | |
c36a7d84 | 526 | |
91fd0f72 BV |
527 | /* |
528 | * Enable/disable OLS channel groups in the flag register according | |
529 | * to the channel mask. 1 means "disable channel". | |
530 | */ | |
c36a7d84 | 531 | devc->capture_flags &= ~0x3c; |
a80bed76 | 532 | devc->capture_flags |= ~(ols_changrp_mask << 2) & 0x3c; |
58a75642 | 533 | |
534 | /* RLE mode is always zero, for now. */ | |
535 | ||
a80bed76 | 536 | arg[0] = devc->capture_flags & 0xff; |
537 | arg[1] = devc->capture_flags >> 8; | |
016e72f3 BV |
538 | arg[2] = arg[3] = 0x00; |
539 | if (send_longcommand(serial, CMD_SET_FLAGS, arg) != SR_OK) | |
0aba65da UH |
540 | return SR_ERR; |
541 | ||
542 | /* Start acquisition on the device. */ | |
6f9234e6 | 543 | if (send_shortcommand(serial, CMD_ARM_BASIC_TRIGGER) != SR_OK) |
0aba65da UH |
544 | return SR_ERR; |
545 | ||
bf256783 | 546 | /* Reset all operational states. */ |
6d16fdfb BV |
547 | devc->rle_count = devc->num_transfers = 0; |
548 | devc->num_samples = devc->num_bytes = 0; | |
625763e2 | 549 | devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0; |
abb39e6b | 550 | memset(devc->sample, 0, 4); |
bf256783 | 551 | |
bee2b016 | 552 | std_session_send_df_header(sdi); |
4afdfd46 | 553 | |
8105e829 DE |
554 | /* If the device stops sending for longer than it takes to send a byte, |
555 | * that means it's finished. But wait at least 100 ms to be safe. | |
556 | */ | |
557 | serial_source_add(sdi->session, serial, G_IO_IN, 100, | |
695dc859 | 558 | ols_receive_data, (struct sr_dev_inst *)sdi); |
0aba65da | 559 | |
0aba65da UH |
560 | return SR_OK; |
561 | } | |
562 | ||
695dc859 | 563 | static int dev_acquisition_stop(struct sr_dev_inst *sdi) |
0aba65da | 564 | { |
0aba65da UH |
565 | abort_acquisition(sdi); |
566 | ||
567 | return SR_OK; | |
568 | } | |
569 | ||
15a5bfe4 | 570 | static struct sr_dev_driver ols_driver_info = { |
0aba65da | 571 | .name = "ols", |
60143473 | 572 | .longname = "Openbench Logic Sniffer & SUMP compatibles", |
0aba65da | 573 | .api_version = 1, |
c2fdcc25 | 574 | .init = std_init, |
700d6b64 | 575 | .cleanup = std_cleanup, |
03f4de8c | 576 | .scan = scan, |
c01bf34c | 577 | .dev_list = std_dev_list, |
f778bf02 | 578 | .dev_clear = std_dev_clear, |
035a1078 BV |
579 | .config_get = config_get, |
580 | .config_set = config_set, | |
a1c743fc | 581 | .config_list = config_list, |
854434de | 582 | .dev_open = std_serial_dev_open, |
bf2c987f | 583 | .dev_close = std_serial_dev_close, |
03f4de8c BV |
584 | .dev_acquisition_start = dev_acquisition_start, |
585 | .dev_acquisition_stop = dev_acquisition_stop, | |
41812aca | 586 | .context = NULL, |
0aba65da | 587 | }; |
dd5c48a6 | 588 | SR_REGISTER_DEV_DRIVER(ols_driver_info); |