]> sigrok.org Git - libsigrok.git/blame - src/hardware/openbench-logic-sniffer/api.c
ols: Rename "flags" to "capture flags".
[libsigrok.git] / src / hardware / openbench-logic-sniffer / api.c
CommitLineData
0aba65da 1/*
50985c20 2 * This file is part of the libsigrok project.
0aba65da 3 *
13d8e03c 4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
0aba65da
UH
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
6ec6c43b 20#include <config.h>
515ab088 21#include "protocol.h"
0aba65da
UH
22
23#define SERIALCOMM "115200/8n1"
24
a0e0bb41 25static const uint32_t scanopts[] = {
1953564a
BV
26 SR_CONF_CONN,
27 SR_CONF_SERIALCOMM,
aeabd308
UH
28};
29
55fb76b3
UH
30static const uint32_t drvopts[] = {
31 SR_CONF_LOGIC_ANALYZER,
32};
33
f254bc4b 34static const uint32_t devopts[] = {
5827f61b
BV
35 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
36 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
37 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
38 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
39 SR_CONF_EXTERNAL_CLOCK | SR_CONF_SET,
40 SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
41 SR_CONF_SWAP | SR_CONF_SET,
42 SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET,
0aba65da
UH
43};
44
91fd0f72
BV
45static const int32_t trigger_matches[] = {
46 SR_TRIGGER_ZERO,
47 SR_TRIGGER_ONE,
48};
49
6d16fdfb
BV
50#define STR_PATTERN_NONE "None"
51#define STR_PATTERN_EXTERNAL "External"
52#define STR_PATTERN_INTERNAL "Internal"
967760a8
MR
53
54/* Supported methods of test pattern outputs */
55enum {
56 /**
57 * Capture pins 31:16 (unbuffered wing) output a test pattern
58 * that can captured on pins 0:15.
59 */
60 PATTERN_EXTERNAL,
61
62 /** Route test pattern internally to capture buffer. */
63 PATTERN_INTERNAL,
64};
65
7c07a178 66static const char *patterns[] = {
6d16fdfb 67 STR_PATTERN_NONE,
7c07a178
UH
68 STR_PATTERN_EXTERNAL,
69 STR_PATTERN_INTERNAL,
70};
71
ba7dd8bb 72/* Channels are numbered 0-31 (on the PCB silkscreen). */
53cda65a 73SR_PRIV const char *ols_channel_names[] = {
78693401
UH
74 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
75 "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
76 "24", "25", "26", "27", "28", "29", "30", "31",
0aba65da
UH
77};
78
d3b38ad3 79/* Default supported samplerates, can be overridden by device metadata. */
e46aa4f6
BV
80static const uint64_t samplerates[] = {
81 SR_HZ(10),
82 SR_MHZ(200),
83 SR_HZ(1),
0aba65da
UH
84};
85
ae4e6999 86#define RESPONSE_DELAY_US (20 * 1000)
1a46cc62 87
4f840ce9 88static GSList *scan(struct sr_dev_driver *di, GSList *options)
0aba65da 89{
1987b8d6 90 struct sr_config *src;
0aba65da 91 struct sr_dev_inst *sdi;
0aba65da 92 struct sr_serial_dev_inst *serial;
43376f33 93 GSList *l;
35be304b 94 int num_read;
07ffa5b3 95 unsigned int i;
0aba65da 96 const char *conn, *serialcomm;
35be304b 97 char buf[4] = { 0, 0, 0, 0 };
0aba65da 98
0aba65da
UH
99 conn = serialcomm = NULL;
100 for (l = options; l; l = l->next) {
1987b8d6
BV
101 src = l->data;
102 switch (src->key) {
1953564a 103 case SR_CONF_CONN:
e46aa4f6 104 conn = g_variant_get_string(src->data, NULL);
0aba65da 105 break;
1953564a 106 case SR_CONF_SERIALCOMM:
e46aa4f6 107 serialcomm = g_variant_get_string(src->data, NULL);
0aba65da
UH
108 break;
109 }
110 }
111 if (!conn)
112 return NULL;
113
98fec29e 114 if (!serialcomm)
0aba65da
UH
115 serialcomm = SERIALCOMM;
116
91219afc 117 serial = sr_serial_dev_inst_new(conn, serialcomm);
0aba65da
UH
118
119 /* The discovery procedure is like this: first send the Reset
120 * command (0x00) 5 times, since the device could be anywhere
121 * in a 5-byte command. Then send the ID command (0x02).
122 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
123 * have a match.
124 */
125 sr_info("Probing %s.", conn);
4ded59ee 126 if (serial_open(serial, SERIAL_RDWR) != SR_OK)
0aba65da
UH
127 return NULL;
128
244995a2 129 if (ols_send_reset(serial) != SR_OK) {
0aba65da
UH
130 serial_close(serial);
131 sr_err("Could not use port %s. Quitting.", conn);
132 return NULL;
133 }
134 send_shortcommand(serial, CMD_ID);
135
1a46cc62 136 g_usleep(RESPONSE_DELAY_US);
0aba65da 137
f9921513 138 if (serial_has_receive_data(serial) == 0) {
35be304b 139 sr_dbg("Didn't get any ID reply.");
0aba65da 140 return NULL;
ed936ccc
UH
141 }
142
35be304b
WS
143 num_read = serial_read_blocking(serial, buf, 4, serial_timeout(serial, 4));
144 if (num_read < 0) {
145 sr_err("Getting ID reply failed (%d).", num_read);
0aba65da 146 return NULL;
ed936ccc
UH
147 }
148
149 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4)) {
35be304b
WS
150 GString *id = sr_hexdump_new((uint8_t *)buf, num_read);
151
152 sr_err("Invalid ID reply (got %s).", id->str);
153
154 sr_hexdump_free(id);
0aba65da 155 return NULL;
ed936ccc 156 }
0aba65da
UH
157
158 /* Definitely using the OLS protocol, check if it supports
159 * the metadata command.
160 */
161 send_shortcommand(serial, CMD_METADATA);
ed936ccc 162
1a46cc62 163 g_usleep(RESPONSE_DELAY_US);
ed936ccc 164
f9921513 165 if (serial_has_receive_data(serial) != 0) {
0aba65da
UH
166 /* Got metadata. */
167 sdi = get_metadata(serial);
0aba65da
UH
168 } else {
169 /* Not an OLS -- some other board that uses the sump protocol. */
72cd99b8 170 sr_info("Device does not support metadata.");
aac29cc1 171 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
172 sdi->status = SR_ST_INACTIVE;
173 sdi->vendor = g_strdup("Sump");
174 sdi->model = g_strdup("Logic Analyzer");
175 sdi->version = g_strdup("v1.0");
07ffa5b3 176 for (i = 0; i < ARRAY_SIZE(ols_channel_names); i++)
5e23fcab 177 sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE,
c368e6f3 178 ols_channel_names[i]);
e57057ae 179 sdi->priv = ols_dev_new();
0aba65da 180 }
bf256783
BV
181 /* Configure samplerate and divider. */
182 if (ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
183 sr_dbg("Failed to set default samplerate (%"PRIu64").",
184 DEFAULT_SAMPLERATE);
459a0f26
BV
185 sdi->inst_type = SR_INST_SERIAL;
186 sdi->conn = serial;
bf256783 187
0aba65da
UH
188 serial_close(serial);
189
43376f33 190 return std_scan_complete(di, g_slist_append(NULL, sdi));
0aba65da
UH
191}
192
dd7a72ea
UH
193static int config_get(uint32_t key, GVariant **data,
194 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
0aba65da
UH
195{
196 struct dev_context *devc;
197
53b4680f 198 (void)cg;
8f996b89 199
0c05591a
BV
200 if (!sdi)
201 return SR_ERR_ARG;
202
203 devc = sdi->priv;
758906aa 204
584560f1 205 switch (key) {
123e1313 206 case SR_CONF_SAMPLERATE:
0c05591a
BV
207 *data = g_variant_new_uint64(devc->cur_samplerate);
208 break;
209 case SR_CONF_CAPTURE_RATIO:
210 *data = g_variant_new_uint64(devc->capture_ratio);
211 break;
212 case SR_CONF_LIMIT_SAMPLES:
213 *data = g_variant_new_uint64(devc->limit_samples);
214 break;
967760a8 215 case SR_CONF_PATTERN_MODE:
a80bed76 216 if (devc->capture_flags & CAPTURE_FLAG_EXTERNAL_TEST_MODE)
967760a8 217 *data = g_variant_new_string(STR_PATTERN_EXTERNAL);
a80bed76 218 else if (devc->capture_flags & CAPTURE_FLAG_INTERNAL_TEST_MODE)
967760a8 219 *data = g_variant_new_string(STR_PATTERN_INTERNAL);
6d16fdfb
BV
220 else
221 *data = g_variant_new_string(STR_PATTERN_NONE);
967760a8 222 break;
0c05591a 223 case SR_CONF_RLE:
a80bed76 224 *data = g_variant_new_boolean(devc->capture_flags & CAPTURE_FLAG_RLE ? TRUE : FALSE);
7730e4f0 225 break;
0aba65da 226 default:
bd6fbf62 227 return SR_ERR_NA;
0aba65da
UH
228 }
229
230 return SR_OK;
231}
232
dd7a72ea
UH
233static int config_set(uint32_t key, GVariant *data,
234 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
0aba65da
UH
235{
236 struct dev_context *devc;
6d16fdfb 237 uint16_t flag;
e46aa4f6 238 uint64_t tmp_u64;
967760a8 239 const char *stropt;
0aba65da 240
53b4680f 241 (void)cg;
8f996b89 242
0aba65da
UH
243 devc = sdi->priv;
244
584560f1 245 switch (key) {
1953564a 246 case SR_CONF_SAMPLERATE:
e46aa4f6
BV
247 tmp_u64 = g_variant_get_uint64(data);
248 if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
249 return SR_ERR_SAMPLERATE;
758906aa 250 return ols_set_samplerate(sdi, g_variant_get_uint64(data));
1953564a 251 case SR_CONF_LIMIT_SAMPLES:
e46aa4f6
BV
252 tmp_u64 = g_variant_get_uint64(data);
253 if (tmp_u64 < MIN_NUM_SAMPLES)
0aba65da 254 return SR_ERR;
e46aa4f6 255 devc->limit_samples = tmp_u64;
0aba65da 256 break;
1953564a 257 case SR_CONF_CAPTURE_RATIO:
e46aa4f6 258 devc->capture_ratio = g_variant_get_uint64(data);
0aba65da 259 break;
eb1b610b
MR
260 case SR_CONF_EXTERNAL_CLOCK:
261 if (g_variant_get_boolean(data)) {
262 sr_info("Enabling external clock.");
a80bed76 263 devc->capture_flags |= CAPTURE_FLAG_CLOCK_EXTERNAL;
eb1b610b
MR
264 } else {
265 sr_info("Disabled external clock.");
a80bed76 266 devc->capture_flags &= ~CAPTURE_FLAG_CLOCK_EXTERNAL;
eb1b610b 267 }
eb1b610b 268 break;
967760a8
MR
269 case SR_CONF_PATTERN_MODE:
270 stropt = g_variant_get_string(data, NULL);
6d16fdfb
BV
271 if (!strcmp(stropt, STR_PATTERN_NONE)) {
272 sr_info("Disabling test modes.");
273 flag = 0x0000;
758906aa 274 } else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
967760a8 275 sr_info("Enabling internal test mode.");
a80bed76 276 flag = CAPTURE_FLAG_INTERNAL_TEST_MODE;
967760a8
MR
277 } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
278 sr_info("Enabling external test mode.");
a80bed76 279 flag = CAPTURE_FLAG_EXTERNAL_TEST_MODE;
967760a8 280 } else {
758906aa 281 return SR_ERR;
967760a8 282 }
a80bed76 283 devc->capture_flags &= ~CAPTURE_FLAG_INTERNAL_TEST_MODE;
284 devc->capture_flags &= ~CAPTURE_FLAG_EXTERNAL_TEST_MODE;
285 devc->capture_flags |= flag;
967760a8 286 break;
7b0a57fd
MR
287 case SR_CONF_SWAP:
288 if (g_variant_get_boolean(data)) {
289 sr_info("Enabling channel swapping.");
a80bed76 290 devc->capture_flags |= CAPTURE_FLAG_SWAP_CHANNELS;
7b0a57fd
MR
291 } else {
292 sr_info("Disabling channel swapping.");
a80bed76 293 devc->capture_flags &= ~CAPTURE_FLAG_SWAP_CHANNELS;
7b0a57fd 294 }
7b0a57fd 295 break;
1953564a 296 case SR_CONF_RLE:
e46aa4f6 297 if (g_variant_get_boolean(data)) {
0aba65da 298 sr_info("Enabling RLE.");
a80bed76 299 devc->capture_flags |= CAPTURE_FLAG_RLE;
aeea0572
BV
300 } else {
301 sr_info("Disabling RLE.");
a80bed76 302 devc->capture_flags &= ~CAPTURE_FLAG_RLE;
0aba65da 303 }
0aba65da
UH
304 break;
305 default:
758906aa 306 return SR_ERR_NA;
0aba65da
UH
307 }
308
758906aa 309 return SR_OK;
0aba65da
UH
310}
311
dd7a72ea
UH
312static int config_list(uint32_t key, GVariant **data,
313 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
a1c743fc 314{
f0de2dd0 315 struct dev_context *devc;
91fd0f72 316 int num_ols_changrp, i;
a1c743fc 317
a1c743fc 318 switch (key) {
0d485e30 319 case SR_CONF_SCAN_OPTIONS:
9a6517d1 320 case SR_CONF_DEVICE_OPTIONS:
e66d1892 321 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
a1c743fc 322 case SR_CONF_SAMPLERATE:
53012da6 323 *data = std_gvar_samplerates_steps(ARRAY_AND_SIZE(samplerates));
a1c743fc 324 break;
91fd0f72 325 case SR_CONF_TRIGGER_MATCH:
53012da6 326 *data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
c50277a6 327 break;
7c07a178 328 case SR_CONF_PATTERN_MODE:
53012da6 329 *data = g_variant_new_strv(ARRAY_AND_SIZE(patterns));
7c07a178 330 break;
f0de2dd0
BV
331 case SR_CONF_LIMIT_SAMPLES:
332 if (!sdi)
333 return SR_ERR_ARG;
334 devc = sdi->priv;
a80bed76 335 if (devc->capture_flags & CAPTURE_FLAG_RLE)
f0de2dd0
BV
336 return SR_ERR_NA;
337 if (devc->max_samples == 0)
338 /* Device didn't specify sample memory size in metadata. */
339 return SR_ERR_NA;
340 /*
ba7dd8bb 341 * Channel groups are turned off if no channels in that group are
f0de2dd0
BV
342 * enabled, making more room for samples for the enabled group.
343 */
91fd0f72
BV
344 ols_channel_mask(sdi);
345 num_ols_changrp = 0;
f0de2dd0 346 for (i = 0; i < 4; i++) {
ba7dd8bb 347 if (devc->channel_mask & (0xff << (i * 8)))
91fd0f72 348 num_ols_changrp++;
1e1dac0c 349 }
a162eeb2
UH
350
351 *data = std_gvar_tuple_u64(MIN_NUM_SAMPLES,
352 (num_ols_changrp) ? devc->max_samples / num_ols_changrp : MIN_NUM_SAMPLES);
f0de2dd0 353 break;
a1c743fc 354 default:
bd6fbf62 355 return SR_ERR_NA;
a1c743fc
BV
356 }
357
358 return SR_OK;
359}
360
016e72f3
BV
361static int set_trigger(const struct sr_dev_inst *sdi, int stage)
362{
363 struct dev_context *devc;
364 struct sr_serial_dev_inst *serial;
365 uint8_t cmd, arg[4];
366
367 devc = sdi->priv;
368 serial = sdi->conn;
369
370 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
371 arg[0] = devc->trigger_mask[stage] & 0xff;
372 arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
373 arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
374 arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
375 if (send_longcommand(serial, cmd, arg) != SR_OK)
376 return SR_ERR;
377
378 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
379 arg[0] = devc->trigger_value[stage] & 0xff;
380 arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
381 arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
382 arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
383 if (send_longcommand(serial, cmd, arg) != SR_OK)
384 return SR_ERR;
385
386 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
387 arg[0] = arg[1] = arg[3] = 0x00;
388 arg[2] = stage;
389 if (stage == devc->num_stages)
390 /* Last stage, fire when this one matches. */
391 arg[3] |= TRIGGER_START;
392 if (send_longcommand(serial, cmd, arg) != SR_OK)
393 return SR_ERR;
394
395 return SR_OK;
396}
397
695dc859 398static int dev_acquisition_start(const struct sr_dev_inst *sdi)
0aba65da 399{
0aba65da 400 struct dev_context *devc;
459a0f26 401 struct sr_serial_dev_inst *serial;
6e5a1a01 402 uint32_t samplecount, readcount, delaycount;
91fd0f72
BV
403 uint8_t ols_changrp_mask, arg[4];
404 int num_ols_changrp;
016e72f3 405 int ret, i;
0aba65da
UH
406
407 devc = sdi->priv;
459a0f26 408 serial = sdi->conn;
0aba65da 409
91fd0f72 410 ols_channel_mask(sdi);
0aba65da 411
91fd0f72
BV
412 num_ols_changrp = 0;
413 ols_changrp_mask = 0;
0aba65da 414 for (i = 0; i < 4; i++) {
ba7dd8bb 415 if (devc->channel_mask & (0xff << (i * 8))) {
91fd0f72
BV
416 ols_changrp_mask |= (1 << i);
417 num_ols_changrp++;
0aba65da
UH
418 }
419 }
420
421 /*
422 * Limit readcount to prevent reading past the end of the hardware
aad0c777 423 * buffer. Rather read too many samples than too few.
0aba65da 424 */
91fd0f72 425 samplecount = MIN(devc->max_samples / num_ols_changrp, devc->limit_samples);
aad0c777 426 readcount = (samplecount + 3) / 4;
0aba65da 427
016e72f3 428 /* Basic triggers. */
91fd0f72
BV
429 if (ols_convert_trigger(sdi) != SR_OK) {
430 sr_err("Failed to configure channels.");
431 return SR_ERR;
432 }
433 if (devc->num_stages > 0) {
b853eb76
GGM
434 /*
435 * According to http://mygizmos.org/ols/Logic-Sniffer-FPGA-Spec.pdf
436 * reset command must be send prior each arm command
437 */
438 sr_dbg("Send reset command before trigger configure");
439 if (ols_send_reset(serial) != SR_OK)
440 return SR_ERR;
441
0aba65da 442 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
a2b1a53b 443 devc->trigger_at_smpl = (readcount - delaycount) * 4 - devc->num_stages;
016e72f3 444 for (i = 0; i <= devc->num_stages; i++) {
91fd0f72 445 sr_dbg("Setting OLS stage %d trigger.", i);
016e72f3
BV
446 if ((ret = set_trigger(sdi, i)) != SR_OK)
447 return ret;
448 }
0aba65da 449 } else {
016e72f3
BV
450 /* No triggers configured, force trigger on first stage. */
451 sr_dbg("Forcing trigger at stage 0.");
452 if ((ret = set_trigger(sdi, 0)) != SR_OK)
453 return ret;
0aba65da
UH
454 delaycount = readcount;
455 }
456
6d16fdfb 457 /* Samplerate. */
016e72f3 458 sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
6d16fdfb 459 devc->cur_samplerate, devc->cur_samplerate_divider);
016e72f3
BV
460 arg[0] = devc->cur_samplerate_divider & 0xff;
461 arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
462 arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
463 arg[3] = 0x00;
464 if (send_longcommand(serial, CMD_SET_DIVIDER, arg) != SR_OK)
0aba65da
UH
465 return SR_ERR;
466
467 /* Send sample limit and pre/post-trigger capture ratio. */
016e72f3 468 sr_dbg("Setting sample limit %d, trigger point at %d",
6d16fdfb 469 (readcount - 1) * 4, (delaycount - 1) * 4);
f6ce25ec
WS
470
471 if (devc->max_samples > 256 * 1024) {
472 arg[0] = ((readcount - 1) & 0xff);
473 arg[1] = ((readcount - 1) & 0xff00) >> 8;
474 arg[2] = ((readcount - 1) & 0xff0000) >> 16;
475 arg[3] = ((readcount - 1) & 0xff000000) >> 24;
476 if (send_longcommand(serial, CMD_CAPTURE_READCOUNT, arg) != SR_OK)
477 return SR_ERR;
478 arg[0] = ((delaycount - 1) & 0xff);
479 arg[1] = ((delaycount - 1) & 0xff00) >> 8;
480 arg[2] = ((delaycount - 1) & 0xff0000) >> 16;
481 arg[3] = ((delaycount - 1) & 0xff000000) >> 24;
482 if (send_longcommand(serial, CMD_CAPTURE_DELAYCOUNT, arg) != SR_OK)
483 return SR_ERR;
484 } else {
485 arg[0] = ((readcount - 1) & 0xff);
486 arg[1] = ((readcount - 1) & 0xff00) >> 8;
487 arg[2] = ((delaycount - 1) & 0xff);
488 arg[3] = ((delaycount - 1) & 0xff00) >> 8;
489 if (send_longcommand(serial, CMD_CAPTURE_SIZE, arg) != SR_OK)
490 return SR_ERR;
491 }
0aba65da 492
6d16fdfb 493 /* Flag register. */
625763e2 494 sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
a80bed76 495 devc->capture_flags & CAPTURE_FLAG_INTERNAL_TEST_MODE ? "on": "off",
496 devc->capture_flags & CAPTURE_FLAG_EXTERNAL_TEST_MODE ? "on": "off",
497 devc->capture_flags & CAPTURE_FLAG_RLE ? "on" : "off",
498 devc->capture_flags & CAPTURE_FLAG_NOISE_FILTER ? "on": "off",
499 devc->capture_flags & CAPTURE_FLAG_DEMUX ? "on" : "off");
91fd0f72
BV
500 /*
501 * Enable/disable OLS channel groups in the flag register according
502 * to the channel mask. 1 means "disable channel".
503 */
a80bed76 504 devc->capture_flags |= ~(ols_changrp_mask << 2) & 0x3c;
505 arg[0] = devc->capture_flags & 0xff;
506 arg[1] = devc->capture_flags >> 8;
016e72f3
BV
507 arg[2] = arg[3] = 0x00;
508 if (send_longcommand(serial, CMD_SET_FLAGS, arg) != SR_OK)
0aba65da
UH
509 return SR_ERR;
510
511 /* Start acquisition on the device. */
459a0f26 512 if (send_shortcommand(serial, CMD_RUN) != SR_OK)
0aba65da
UH
513 return SR_ERR;
514
bf256783 515 /* Reset all operational states. */
6d16fdfb
BV
516 devc->rle_count = devc->num_transfers = 0;
517 devc->num_samples = devc->num_bytes = 0;
625763e2 518 devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
abb39e6b 519 memset(devc->sample, 0, 4);
bf256783 520
bee2b016 521 std_session_send_df_header(sdi);
4afdfd46 522
8105e829
DE
523 /* If the device stops sending for longer than it takes to send a byte,
524 * that means it's finished. But wait at least 100 ms to be safe.
525 */
526 serial_source_add(sdi->session, serial, G_IO_IN, 100,
695dc859 527 ols_receive_data, (struct sr_dev_inst *)sdi);
0aba65da 528
0aba65da
UH
529 return SR_OK;
530}
531
695dc859 532static int dev_acquisition_stop(struct sr_dev_inst *sdi)
0aba65da 533{
0aba65da
UH
534 abort_acquisition(sdi);
535
536 return SR_OK;
537}
538
15a5bfe4 539static struct sr_dev_driver ols_driver_info = {
0aba65da 540 .name = "ols",
60143473 541 .longname = "Openbench Logic Sniffer & SUMP compatibles",
0aba65da 542 .api_version = 1,
c2fdcc25 543 .init = std_init,
700d6b64 544 .cleanup = std_cleanup,
03f4de8c 545 .scan = scan,
c01bf34c 546 .dev_list = std_dev_list,
f778bf02 547 .dev_clear = std_dev_clear,
035a1078
BV
548 .config_get = config_get,
549 .config_set = config_set,
a1c743fc 550 .config_list = config_list,
854434de 551 .dev_open = std_serial_dev_open,
bf2c987f 552 .dev_close = std_serial_dev_close,
03f4de8c
BV
553 .dev_acquisition_start = dev_acquisition_start,
554 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 555 .context = NULL,
0aba65da 556};
dd5c48a6 557SR_REGISTER_DEV_DRIVER(ols_driver_info);