[libsigrok.git] / src / hardware / openbench-logic-sniffer / api.c

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include "protocol.h"
#include <libserialport.h>

#define SERIALCOMM "115200/8n1"

static const uint32_t hwopts[] = {
	SR_CONF_CONN,
	SR_CONF_SERIALCOMM,
};

static const uint32_t hwcaps[] = {
	SR_CONF_LOGIC_ANALYZER,
	SR_CONF_SAMPLERATE,
	SR_CONF_TRIGGER_MATCH,
	SR_CONF_CAPTURE_RATIO,
	SR_CONF_LIMIT_SAMPLES,
	SR_CONF_EXTERNAL_CLOCK,
	SR_CONF_PATTERN_MODE,
	SR_CONF_SWAP,
	SR_CONF_RLE,
};

static const int32_t trigger_matches[] = {
	SR_TRIGGER_ZERO,
	SR_TRIGGER_ONE,
};

#define STR_PATTERN_NONE     "None"
#define STR_PATTERN_EXTERNAL "External"
#define STR_PATTERN_INTERNAL "Internal"

/* Supported methods of test pattern outputs */
enum {
	/**
	 * Capture pins 31:16 (unbuffered wing) output a test pattern
	 * that can captured on pins 0:15.
	 */
	PATTERN_EXTERNAL,

	/** Route test pattern internally to capture buffer. */
	PATTERN_INTERNAL,
};

static const char *patterns[] = {
	STR_PATTERN_NONE,
	STR_PATTERN_EXTERNAL,
	STR_PATTERN_INTERNAL,
};

/* Channels are numbered 0-31 (on the PCB silkscreen). */
SR_PRIV const char *ols_channel_names[NUM_CHANNELS + 1] = {
	"0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
	"13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
	"24", "25", "26", "27", "28", "29", "30", "31",
	NULL,
};

/* Default supported samplerates, can be overridden by device metadata. */
static const uint64_t samplerates[] = {
	SR_HZ(10),
	SR_MHZ(200),
	SR_HZ(1),
};

SR_PRIV struct sr_dev_driver ols_driver_info;
static struct sr_dev_driver *di = &ols_driver_info;

static int init(struct sr_context *sr_ctx)
{
	return std_init(sr_ctx, di, LOG_PREFIX);
}

static GSList *scan(GSList *options)
{
	struct sr_config *src;
	struct sr_dev_inst *sdi;
	struct drv_context *drvc;
	struct dev_context *devc;
	struct sr_channel *ch;
	struct sr_serial_dev_inst *serial;
	GPollFD probefd;
	GSList *l, *devices;
	int ret, i;
	const char *conn, *serialcomm;
	char buf[8];

	drvc = di->priv;

	devices = NULL;

	conn = serialcomm = NULL;
	for (l = options; l; l = l->next) {
		src = l->data;
		switch (src->key) {
		case SR_CONF_CONN:
			conn = g_variant_get_string(src->data, NULL);
			break;
		case SR_CONF_SERIALCOMM:
			serialcomm = g_variant_get_string(src->data, NULL);
			break;
		}
	}
	if (!conn)
		return NULL;

	if (serialcomm == NULL)
		serialcomm = SERIALCOMM;

	if (!(serial = sr_serial_dev_inst_new(conn, serialcomm)))
		return NULL;

	/* The discovery procedure is like this: first send the Reset
	 * command (0x00) 5 times, since the device could be anywhere
	 * in a 5-byte command. Then send the ID command (0x02).
	 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
	 * have a match.
	 */
	sr_info("Probing %s.", conn);
	if (serial_open(serial, SERIAL_RDWR | SERIAL_NONBLOCK) != SR_OK)
		return NULL;

	ret = SR_OK;
	for (i = 0; i < 5; i++) {
		if ((ret = send_shortcommand(serial, CMD_RESET)) != SR_OK) {
			sr_err("Port %s is not writable.", conn);
			break;
		}
	}
	if (ret != SR_OK) {
		serial_close(serial);
		sr_err("Could not use port %s. Quitting.", conn);
		return NULL;
	}
	send_shortcommand(serial, CMD_ID);

	/* Wait 10ms for a response. */
	g_usleep(10000);

	sp_get_port_handle(serial->data, &probefd.fd);
	probefd.events = G_IO_IN;
	g_poll(&probefd, 1, 1);

	if (probefd.revents != G_IO_IN)
		return NULL;
	if (serial_read_blocking(serial, buf, 4) != 4)
		return NULL;
	if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
		return NULL;

	/* Definitely using the OLS protocol, check if it supports
	 * the metadata command.
	 */
	send_shortcommand(serial, CMD_METADATA);
	if (g_poll(&probefd, 1, 10) > 0) {
		/* Got metadata. */
		sdi = get_metadata(serial);
		sdi->index = 0;
		devc = sdi->priv;
	} else {
		/* Not an OLS -- some other board that uses the sump protocol. */
		sr_info("Device does not support metadata.");
		sdi = sr_dev_inst_new(0, SR_ST_INACTIVE,
				"Sump", "Logic Analyzer", "v1.0");
		sdi->driver = di;
		for (i = 0; i < 32; i++) {
			if (!(ch = sr_channel_new(i, SR_CHANNEL_LOGIC, TRUE,
					ols_channel_names[i])))
				return 0;
			sdi->channels = g_slist_append(sdi->channels, ch);
		}
		devc = ols_dev_new();
		sdi->priv = devc;
	}
	/* Configure samplerate and divider. */
	if (ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
		sr_dbg("Failed to set default samplerate (%"PRIu64").",
				DEFAULT_SAMPLERATE);
	sdi->inst_type = SR_INST_SERIAL;
	sdi->conn = serial;

	drvc->instances = g_slist_append(drvc->instances, sdi);
	devices = g_slist_append(devices, sdi);

	serial_close(serial);

	return devices;
}

static GSList *dev_list(void)
{
	return ((struct drv_context *)(di->priv))->instances;
}

static int cleanup(void)
{
	return std_dev_clear(di, NULL);
}

static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
		const struct sr_channel_group *cg)
{
	struct dev_context *devc;

	(void)cg;

	if (!sdi)
		return SR_ERR_ARG;

	devc = sdi->priv;
	switch (key) {
	case SR_CONF_SAMPLERATE:
		*data = g_variant_new_uint64(devc->cur_samplerate);
		break;
	case SR_CONF_CAPTURE_RATIO:
		*data = g_variant_new_uint64(devc->capture_ratio);
		break;
	case SR_CONF_LIMIT_SAMPLES:
		*data = g_variant_new_uint64(devc->limit_samples);
		break;
	case SR_CONF_PATTERN_MODE:
		if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
			*data = g_variant_new_string(STR_PATTERN_EXTERNAL);
		else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
			*data = g_variant_new_string(STR_PATTERN_INTERNAL);
		else
			*data = g_variant_new_string(STR_PATTERN_NONE);
		break;
	case SR_CONF_RLE:
		*data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
		break;
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
		const struct sr_channel_group *cg)
{
	struct dev_context *devc;
	uint16_t flag;
	uint64_t tmp_u64;
	int ret;
	const char *stropt;

	(void)cg;

	if (sdi->status != SR_ST_ACTIVE)
		return SR_ERR_DEV_CLOSED;

	devc = sdi->priv;

	switch (key) {
	case SR_CONF_SAMPLERATE:
		tmp_u64 = g_variant_get_uint64(data);
		if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
			return SR_ERR_SAMPLERATE;
		ret = ols_set_samplerate(sdi, g_variant_get_uint64(data));
		break;
	case SR_CONF_LIMIT_SAMPLES:
		tmp_u64 = g_variant_get_uint64(data);
		if (tmp_u64 < MIN_NUM_SAMPLES)
			return SR_ERR;
		devc->limit_samples = tmp_u64;
		ret = SR_OK;
		break;
	case SR_CONF_CAPTURE_RATIO:
		devc->capture_ratio = g_variant_get_uint64(data);
		if (devc->capture_ratio < 0 || devc->capture_ratio > 100) {
			devc->capture_ratio = 0;
			ret = SR_ERR;
		} else
			ret = SR_OK;
		break;
	case SR_CONF_EXTERNAL_CLOCK:
		if (g_variant_get_boolean(data)) {
			sr_info("Enabling external clock.");
			devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
		} else {
			sr_info("Disabled external clock.");
			devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
		}
		ret = SR_OK;
		break;
	case SR_CONF_PATTERN_MODE:
		stropt = g_variant_get_string(data, NULL);
		ret = SR_OK;
		flag = 0xffff;
		if (!strcmp(stropt, STR_PATTERN_NONE)) {
			sr_info("Disabling test modes.");
			flag = 0x0000;
		}else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
			sr_info("Enabling internal test mode.");
			flag = FLAG_INTERNAL_TEST_MODE;
		} else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
			sr_info("Enabling external test mode.");
			flag = FLAG_EXTERNAL_TEST_MODE;
		} else {
			ret = SR_ERR;
		}
		if (flag != 0xffff) {
			devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
			devc->flag_reg |= flag;
		}
		break;
	case SR_CONF_SWAP:
		if (g_variant_get_boolean(data)) {
			sr_info("Enabling channel swapping.");
			devc->flag_reg |= FLAG_SWAP_CHANNELS;
		} else {
			sr_info("Disabling channel swapping.");
			devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
		}
		ret = SR_OK;
		break;

	case SR_CONF_RLE:
		if (g_variant_get_boolean(data)) {
			sr_info("Enabling RLE.");
			devc->flag_reg |= FLAG_RLE;
		} else {
			sr_info("Disabling RLE.");
			devc->flag_reg &= ~FLAG_RLE;
		}
		ret = SR_OK;
		break;
	default:
		ret = SR_ERR_NA;
	}

	return ret;
}

static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
		const struct sr_channel_group *cg)
{
	struct dev_context *devc;
	GVariant *gvar, *grange[2];
	GVariantBuilder gvb;
	int num_ols_changrp, i;

	(void)cg;

	switch (key) {
	case SR_CONF_SCAN_OPTIONS:
		*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
				hwopts, ARRAY_SIZE(hwopts), sizeof(uint32_t));
		break;
	case SR_CONF_DEVICE_OPTIONS:
		*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
				hwcaps, ARRAY_SIZE(hwcaps), sizeof(uint32_t));
		break;
	case SR_CONF_SAMPLERATE:
		g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
		gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
				ARRAY_SIZE(samplerates), sizeof(uint64_t));
		g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
		*data = g_variant_builder_end(&gvb);
		break;
	case SR_CONF_TRIGGER_MATCH:
		*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
				trigger_matches, ARRAY_SIZE(trigger_matches),
				sizeof(int32_t));
		break;
	case SR_CONF_PATTERN_MODE:
		*data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
		break;
	case SR_CONF_LIMIT_SAMPLES:
		if (!sdi)
			return SR_ERR_ARG;
		devc = sdi->priv;
		if (devc->flag_reg & FLAG_RLE)
			return SR_ERR_NA;
		if (devc->max_samples == 0)
			/* Device didn't specify sample memory size in metadata. */
			return SR_ERR_NA;
		/*
		 * Channel groups are turned off if no channels in that group are
		 * enabled, making more room for samples for the enabled group.
		*/
		ols_channel_mask(sdi);
		num_ols_changrp = 0;
		for (i = 0; i < 4; i++) {
			if (devc->channel_mask & (0xff << (i * 8)))
				num_ols_changrp++;
		}
		grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
		if (num_ols_changrp)
			grange[1] = g_variant_new_uint64(devc->max_samples / num_ols_changrp);
		else
			grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES);
		*data = g_variant_new_tuple(grange, 2);
		break;
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int set_trigger(const struct sr_dev_inst *sdi, int stage)
{
	struct dev_context *devc;
	struct sr_serial_dev_inst *serial;
	uint8_t cmd, arg[4];

	devc = sdi->priv;
	serial = sdi->conn;

	cmd = CMD_SET_TRIGGER_MASK + stage * 4;
	arg[0] = devc->trigger_mask[stage] & 0xff;
	arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
	arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
	arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
	if (send_longcommand(serial, cmd, arg) != SR_OK)
		return SR_ERR;

	cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
	arg[0] = devc->trigger_value[stage] & 0xff;
	arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
	arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
	arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
	if (send_longcommand(serial, cmd, arg) != SR_OK)
		return SR_ERR;

	cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
	arg[0] = arg[1] = arg[3] = 0x00;
	arg[2] = stage;
	if (stage == devc->num_stages)
		/* Last stage, fire when this one matches. */
		arg[3] |= TRIGGER_START;
	if (send_longcommand(serial, cmd, arg) != SR_OK)
		return SR_ERR;

	return SR_OK;
}

static int dev_acquisition_start(const struct sr_dev_inst *sdi,
		void *cb_data)
{
	struct dev_context *devc;
	struct sr_serial_dev_inst *serial;
	uint16_t samplecount, readcount, delaycount;
	uint8_t ols_changrp_mask, arg[4];
	int num_ols_changrp;
	int ret, i;

	if (sdi->status != SR_ST_ACTIVE)
		return SR_ERR_DEV_CLOSED;

	devc = sdi->priv;
	serial = sdi->conn;

	ols_channel_mask(sdi);

	num_ols_changrp = 0;
	ols_changrp_mask = 0;
	for (i = 0; i < 4; i++) {
		if (devc->channel_mask & (0xff << (i * 8))) {
			ols_changrp_mask |= (1 << i);
			num_ols_changrp++;
		}
	}

	/*
	 * Limit readcount to prevent reading past the end of the hardware
	 * buffer.
	 */
	samplecount = MIN(devc->max_samples / num_ols_changrp, devc->limit_samples);
	readcount = samplecount / 4;

	/* Rather read too many samples than too few. */
	if (samplecount % 4 != 0)
		readcount++;

	/* Basic triggers. */
	if (ols_convert_trigger(sdi) != SR_OK) {
		sr_err("Failed to configure channels.");
		return SR_ERR;
	}
	if (devc->num_stages > 0) {
		delaycount = readcount * (1 - devc->capture_ratio / 100.0);
		devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
		for (i = 0; i <= devc->num_stages; i++) {
			sr_dbg("Setting OLS stage %d trigger.", i);
			if ((ret = set_trigger(sdi, i)) != SR_OK)
				return ret;
		}
	} else {
		/* No triggers configured, force trigger on first stage. */
		sr_dbg("Forcing trigger at stage 0.");
		if ((ret = set_trigger(sdi, 0)) != SR_OK)
			return ret;
		delaycount = readcount;
	}

	/* Samplerate. */
	sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
			devc->cur_samplerate, devc->cur_samplerate_divider);
	arg[0] = devc->cur_samplerate_divider & 0xff;
	arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
	arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
	arg[3] = 0x00;
	if (send_longcommand(serial, CMD_SET_DIVIDER, arg) != SR_OK)
		return SR_ERR;

	/* Send sample limit and pre/post-trigger capture ratio. */
	sr_dbg("Setting sample limit %d, trigger point at %d",
			(readcount - 1) * 4, (delaycount - 1) * 4);
	arg[0] = ((readcount - 1) & 0xff);
	arg[1] = ((readcount - 1) & 0xff00) >> 8;
	arg[2] = ((delaycount - 1) & 0xff);
	arg[3] = ((delaycount - 1) & 0xff00) >> 8;
	if (send_longcommand(serial, CMD_CAPTURE_SIZE, arg) != SR_OK)
		return SR_ERR;

	/* Flag register. */
	sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
			devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
			devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
			devc->flag_reg & FLAG_RLE ? "on" : "off",
			devc->flag_reg & FLAG_FILTER ? "on": "off",
			devc->flag_reg & FLAG_DEMUX ? "on" : "off");
	/*
	 * Enable/disable OLS channel groups in the flag register according
	 * to the channel mask. 1 means "disable channel".
	 */
	devc->flag_reg |= ~(ols_changrp_mask << 2) & 0x3c;
	arg[0] = devc->flag_reg & 0xff;
	arg[1] = devc->flag_reg >> 8;
	arg[2] = arg[3] = 0x00;
	if (send_longcommand(serial, CMD_SET_FLAGS, arg) != SR_OK)
		return SR_ERR;

	/* Start acquisition on the device. */
	if (send_shortcommand(serial, CMD_RUN) != SR_OK)
		return SR_ERR;

	/* Reset all operational states. */
	devc->rle_count = devc->num_transfers = 0;
	devc->num_samples = devc->num_bytes = 0;
	devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
	memset(devc->sample, 0, 4);

	/* Send header packet to the session bus. */
	std_session_send_df_header(cb_data, LOG_PREFIX);

	serial_source_add(sdi->session, serial, G_IO_IN, -1,
			ols_receive_data, cb_data);

	return SR_OK;
}

static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
{
	(void)cb_data;

	abort_acquisition(sdi);

	return SR_OK;
}

SR_PRIV struct sr_dev_driver ols_driver_info = {
	.name = "ols",
	.longname = "Openbench Logic Sniffer",
	.api_version = 1,
	.init = init,
	.cleanup = cleanup,
	.scan = scan,
	.dev_list = dev_list,
	.dev_clear = NULL,
	.config_get = config_get,
	.config_set = config_set,
	.config_list = config_list,
	.dev_open = std_serial_dev_open,
	.dev_close = std_serial_dev_close,
	.dev_acquisition_start = dev_acquisition_start,
	.dev_acquisition_stop = dev_acquisition_stop,
	.priv = NULL,
};
Commit	Line	Data
0aba65da	1	/*
50985c20	2	* This file is part of the libsigrok project.
0aba65da	3	*
13d8e03c	4	* Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
0aba65da UH	5	*
	6	* This program is free software: you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation, either version 3 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
	20	#include "protocol.h"
bf72f649	21	#include <libserialport.h>
0aba65da UH	22
	23	#define SERIALCOMM "115200/8n1"
	24
584560f1	25	static const uint32_t hwopts[] = {
1953564a BV	26	SR_CONF_CONN,
1953564a BV	27	SR_CONF_SERIALCOMM,
aeabd308 UH	28	};
aeabd308 UH	29
584560f1	30	static const uint32_t hwcaps[] = {
1953564a BV	31	SR_CONF_LOGIC_ANALYZER,
1953564a BV	32	SR_CONF_SAMPLERATE,
91fd0f72	33	SR_CONF_TRIGGER_MATCH,
1953564a BV	34	SR_CONF_CAPTURE_RATIO,
1953564a BV	35	SR_CONF_LIMIT_SAMPLES,
eb1b610b	36	SR_CONF_EXTERNAL_CLOCK,
967760a8	37	SR_CONF_PATTERN_MODE,
7b0a57fd	38	SR_CONF_SWAP,
1953564a	39	SR_CONF_RLE,
0aba65da UH	40	};
0aba65da UH	41
91fd0f72 BV	42	static const int32_t trigger_matches[] = {
	43	SR_TRIGGER_ZERO,
	44	SR_TRIGGER_ONE,
	45	};
	46
6d16fdfb BV	47	#define STR_PATTERN_NONE "None"
	48	#define STR_PATTERN_EXTERNAL "External"
	49	#define STR_PATTERN_INTERNAL "Internal"
967760a8 MR	50
	51	/* Supported methods of test pattern outputs */
	52	enum {
	53	/**
	54	* Capture pins 31:16 (unbuffered wing) output a test pattern
	55	* that can captured on pins 0:15.
	56	*/
	57	PATTERN_EXTERNAL,
	58
	59	/** Route test pattern internally to capture buffer. */
	60	PATTERN_INTERNAL,
	61	};
	62
7c07a178	63	static const char *patterns[] = {
6d16fdfb	64	STR_PATTERN_NONE,
7c07a178 UH	65	STR_PATTERN_EXTERNAL,
	66	STR_PATTERN_INTERNAL,
	67	};
	68
ba7dd8bb	69	/* Channels are numbered 0-31 (on the PCB silkscreen). */
3f239f08	70	SR_PRIV const char *ols_channel_names[NUM_CHANNELS + 1] = {
78693401 UH	71	"0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
	72	"13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
	73	"24", "25", "26", "27", "28", "29", "30", "31",
0aba65da UH	74	NULL,
	75	};
	76
d3b38ad3	77	/* Default supported samplerates, can be overridden by device metadata. */
e46aa4f6 BV	78	static const uint64_t samplerates[] = {
	79	SR_HZ(10),
	80	SR_MHZ(200),
	81	SR_HZ(1),
0aba65da UH	82	};
	83
	84	SR_PRIV struct sr_dev_driver ols_driver_info;
	85	static struct sr_dev_driver *di = &ols_driver_info;
	86
03f4de8c	87	static int init(struct sr_context *sr_ctx)
0aba65da	88	{
f6beaac5	89	return std_init(sr_ctx, di, LOG_PREFIX);
0aba65da UH	90	}
0aba65da UH	91
03f4de8c	92	static GSList scan(GSList options)
0aba65da	93	{
1987b8d6	94	struct sr_config *src;
0aba65da UH	95	struct sr_dev_inst *sdi;
	96	struct drv_context *drvc;
	97	struct dev_context *devc;
ba7dd8bb	98	struct sr_channel *ch;
0aba65da UH	99	struct sr_serial_dev_inst *serial;
	100	GPollFD probefd;
	101	GSList l, devices;
	102	int ret, i;
	103	const char conn, serialcomm;
	104	char buf[8];
	105
0aba65da	106	drvc = di->priv;
4b97c74e	107
0aba65da UH	108	devices = NULL;
	109
	110	conn = serialcomm = NULL;
	111	for (l = options; l; l = l->next) {
1987b8d6 BV	112	src = l->data;
1987b8d6 BV	113	switch (src->key) {
1953564a	114	case SR_CONF_CONN:
e46aa4f6	115	conn = g_variant_get_string(src->data, NULL);
0aba65da	116	break;
1953564a	117	case SR_CONF_SERIALCOMM:
e46aa4f6	118	serialcomm = g_variant_get_string(src->data, NULL);
0aba65da UH	119	break;
	120	}
	121	}
	122	if (!conn)
	123	return NULL;
	124
	125	if (serialcomm == NULL)
	126	serialcomm = SERIALCOMM;
	127
	128	if (!(serial = sr_serial_dev_inst_new(conn, serialcomm)))
	129	return NULL;
	130
	131	/* The discovery procedure is like this: first send the Reset
	132	* command (0x00) 5 times, since the device could be anywhere
	133	* in a 5-byte command. Then send the ID command (0x02).
	134	* If the device responds with 4 bytes ("OLS1" or "SLA1"), we
	135	* have a match.
	136	*/
	137	sr_info("Probing %s.", conn);
	138	if (serial_open(serial, SERIAL_RDWR \| SERIAL_NONBLOCK) != SR_OK)
	139	return NULL;
	140
	141	ret = SR_OK;
	142	for (i = 0; i < 5; i++) {
	143	if ((ret = send_shortcommand(serial, CMD_RESET)) != SR_OK) {
	144	sr_err("Port %s is not writable.", conn);
	145	break;
	146	}
	147	}
	148	if (ret != SR_OK) {
	149	serial_close(serial);
	150	sr_err("Could not use port %s. Quitting.", conn);
	151	return NULL;
	152	}
	153	send_shortcommand(serial, CMD_ID);
	154
	155	/* Wait 10ms for a response. */
	156	g_usleep(10000);
	157
bf72f649	158	sp_get_port_handle(serial->data, &probefd.fd);
0aba65da UH	159	probefd.events = G_IO_IN;
	160	g_poll(&probefd, 1, 1);
	161
	162	if (probefd.revents != G_IO_IN)
	163	return NULL;
9f5d4c3c	164	if (serial_read_blocking(serial, buf, 4) != 4)
0aba65da UH	165	return NULL;
	166	if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
	167	return NULL;
	168
	169	/* Definitely using the OLS protocol, check if it supports
	170	* the metadata command.
	171	*/
	172	send_shortcommand(serial, CMD_METADATA);
	173	if (g_poll(&probefd, 1, 10) > 0) {
	174	/* Got metadata. */
	175	sdi = get_metadata(serial);
	176	sdi->index = 0;
	177	devc = sdi->priv;
	178	} else {
	179	/* Not an OLS -- some other board that uses the sump protocol. */
72cd99b8	180	sr_info("Device does not support metadata.");
0aba65da UH	181	sdi = sr_dev_inst_new(0, SR_ST_INACTIVE,
	182	"Sump", "Logic Analyzer", "v1.0");
	183	sdi->driver = di;
0aba65da	184	for (i = 0; i < 32; i++) {
3f239f08	185	if (!(ch = sr_channel_new(i, SR_CHANNEL_LOGIC, TRUE,
ba7dd8bb	186	ols_channel_names[i])))
0aba65da	187	return 0;
ba7dd8bb	188	sdi->channels = g_slist_append(sdi->channels, ch);
0aba65da	189	}
bf256783	190	devc = ols_dev_new();
0aba65da UH	191	sdi->priv = devc;
0aba65da UH	192	}
bf256783 BV	193	/* Configure samplerate and divider. */
	194	if (ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
	195	sr_dbg("Failed to set default samplerate (%"PRIu64").",
	196	DEFAULT_SAMPLERATE);
459a0f26 BV	197	sdi->inst_type = SR_INST_SERIAL;
459a0f26 BV	198	sdi->conn = serial;
bf256783	199
0aba65da UH	200	drvc->instances = g_slist_append(drvc->instances, sdi);
	201	devices = g_slist_append(devices, sdi);
	202
	203	serial_close(serial);
	204
	205	return devices;
	206	}
	207
03f4de8c	208	static GSList *dev_list(void)
0aba65da	209	{
0e94d524	210	return ((struct drv_context *)(di->priv))->instances;
0aba65da UH	211	}
0aba65da UH	212
eea49cf1	213	static int cleanup(void)
0aba65da	214	{
a6630742	215	return std_dev_clear(di, NULL);
0aba65da UH	216	}
0aba65da UH	217
584560f1	218	static int config_get(uint32_t key, GVariant *data, const struct sr_dev_inst sdi,
53b4680f	219	const struct sr_channel_group *cg)
0aba65da UH	220	{
	221	struct dev_context *devc;
	222
53b4680f	223	(void)cg;
8f996b89	224
0c05591a BV	225	if (!sdi)
	226	return SR_ERR_ARG;
	227
	228	devc = sdi->priv;
584560f1	229	switch (key) {
123e1313	230	case SR_CONF_SAMPLERATE:
0c05591a BV	231	*data = g_variant_new_uint64(devc->cur_samplerate);
	232	break;
	233	case SR_CONF_CAPTURE_RATIO:
	234	*data = g_variant_new_uint64(devc->capture_ratio);
	235	break;
	236	case SR_CONF_LIMIT_SAMPLES:
	237	*data = g_variant_new_uint64(devc->limit_samples);
	238	break;
967760a8 MR	239	case SR_CONF_PATTERN_MODE:
	240	if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
	241	*data = g_variant_new_string(STR_PATTERN_EXTERNAL);
	242	else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
	243	*data = g_variant_new_string(STR_PATTERN_INTERNAL);
6d16fdfb BV	244	else
6d16fdfb BV	245	*data = g_variant_new_string(STR_PATTERN_NONE);
967760a8	246	break;
0c05591a BV	247	case SR_CONF_RLE:
0c05591a BV	248	*data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
7730e4f0	249	break;
0aba65da	250	default:
bd6fbf62	251	return SR_ERR_NA;
0aba65da UH	252	}
	253
	254	return SR_OK;
	255	}
	256
584560f1	257	static int config_set(uint32_t key, GVariant data, const struct sr_dev_inst sdi,
53b4680f	258	const struct sr_channel_group *cg)
0aba65da UH	259	{
0aba65da UH	260	struct dev_context *devc;
6d16fdfb	261	uint16_t flag;
e46aa4f6	262	uint64_t tmp_u64;
6d16fdfb	263	int ret;
967760a8	264	const char *stropt;
0aba65da	265
53b4680f	266	(void)cg;
8f996b89	267
e73ffd42 BV	268	if (sdi->status != SR_ST_ACTIVE)
	269	return SR_ERR_DEV_CLOSED;
	270
0aba65da UH	271	devc = sdi->priv;
0aba65da UH	272
584560f1	273	switch (key) {
1953564a	274	case SR_CONF_SAMPLERATE:
e46aa4f6 BV	275	tmp_u64 = g_variant_get_uint64(data);
	276	if (tmp_u64 < samplerates[0] \|\| tmp_u64 > samplerates[1])
	277	return SR_ERR_SAMPLERATE;
	278	ret = ols_set_samplerate(sdi, g_variant_get_uint64(data));
0aba65da	279	break;
1953564a	280	case SR_CONF_LIMIT_SAMPLES:
e46aa4f6 BV	281	tmp_u64 = g_variant_get_uint64(data);
e46aa4f6 BV	282	if (tmp_u64 < MIN_NUM_SAMPLES)
0aba65da	283	return SR_ERR;
e46aa4f6	284	devc->limit_samples = tmp_u64;
0aba65da UH	285	ret = SR_OK;
0aba65da UH	286	break;
1953564a	287	case SR_CONF_CAPTURE_RATIO:
e46aa4f6	288	devc->capture_ratio = g_variant_get_uint64(data);
0aba65da UH	289	if (devc->capture_ratio < 0 \|\| devc->capture_ratio > 100) {
	290	devc->capture_ratio = 0;
	291	ret = SR_ERR;
	292	} else
	293	ret = SR_OK;
	294	break;
eb1b610b MR	295	case SR_CONF_EXTERNAL_CLOCK:
	296	if (g_variant_get_boolean(data)) {
	297	sr_info("Enabling external clock.");
	298	devc->flag_reg \|= FLAG_CLOCK_EXTERNAL;
	299	} else {
	300	sr_info("Disabled external clock.");
	301	devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
	302	}
	303	ret = SR_OK;
	304	break;
967760a8 MR	305	case SR_CONF_PATTERN_MODE:
	306	stropt = g_variant_get_string(data, NULL);
	307	ret = SR_OK;
6d16fdfb BV	308	flag = 0xffff;
	309	if (!strcmp(stropt, STR_PATTERN_NONE)) {
	310	sr_info("Disabling test modes.");
	311	flag = 0x0000;
	312	}else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
967760a8	313	sr_info("Enabling internal test mode.");
6d16fdfb	314	flag = FLAG_INTERNAL_TEST_MODE;
967760a8 MR	315	} else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
967760a8 MR	316	sr_info("Enabling external test mode.");
6d16fdfb	317	flag = FLAG_EXTERNAL_TEST_MODE;
967760a8 MR	318	} else {
	319	ret = SR_ERR;
	320	}
6d16fdfb BV	321	if (flag != 0xffff) {
	322	devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE \| FLAG_EXTERNAL_TEST_MODE);
	323	devc->flag_reg \|= flag;
	324	}
967760a8	325	break;
7b0a57fd MR	326	case SR_CONF_SWAP:
	327	if (g_variant_get_boolean(data)) {
	328	sr_info("Enabling channel swapping.");
3f239f08	329	devc->flag_reg \|= FLAG_SWAP_CHANNELS;
7b0a57fd MR	330	} else {
7b0a57fd MR	331	sr_info("Disabling channel swapping.");
3f239f08	332	devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
7b0a57fd MR	333	}
	334	ret = SR_OK;
	335	break;
	336
1953564a	337	case SR_CONF_RLE:
e46aa4f6	338	if (g_variant_get_boolean(data)) {
0aba65da UH	339	sr_info("Enabling RLE.");
0aba65da UH	340	devc->flag_reg \|= FLAG_RLE;
aeea0572 BV	341	} else {
	342	sr_info("Disabling RLE.");
	343	devc->flag_reg &= ~FLAG_RLE;
0aba65da UH	344	}
	345	ret = SR_OK;
	346	break;
	347	default:
bd6fbf62	348	ret = SR_ERR_NA;
0aba65da UH	349	}
	350
	351	return ret;
	352	}
	353
584560f1	354	static int config_list(uint32_t key, GVariant *data, const struct sr_dev_inst sdi,
53b4680f	355	const struct sr_channel_group *cg)
a1c743fc	356	{
f0de2dd0 BV	357	struct dev_context *devc;
f0de2dd0 BV	358	GVariant gvar, grange[2];
e46aa4f6	359	GVariantBuilder gvb;
91fd0f72	360	int num_ols_changrp, i;
a1c743fc	361
53b4680f	362	(void)cg;
a1c743fc BV	363
a1c743fc BV	364	switch (key) {
0d485e30	365	case SR_CONF_SCAN_OPTIONS:
584560f1 BV	366	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
584560f1 BV	367	hwopts, ARRAY_SIZE(hwopts), sizeof(uint32_t));
0d485e30	368	break;
9a6517d1	369	case SR_CONF_DEVICE_OPTIONS:
584560f1 BV	370	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
584560f1 BV	371	hwcaps, ARRAY_SIZE(hwcaps), sizeof(uint32_t));
9a6517d1	372	break;
a1c743fc	373	case SR_CONF_SAMPLERATE:
e46aa4f6 BV	374	g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
	375	gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
	376	ARRAY_SIZE(samplerates), sizeof(uint64_t));
	377	g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
	378	*data = g_variant_builder_end(&gvb);
a1c743fc	379	break;
91fd0f72 BV	380	case SR_CONF_TRIGGER_MATCH:
	381	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
	382	trigger_matches, ARRAY_SIZE(trigger_matches),
	383	sizeof(int32_t));
c50277a6	384	break;
7c07a178 UH	385	case SR_CONF_PATTERN_MODE:
	386	*data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
	387	break;
f0de2dd0 BV	388	case SR_CONF_LIMIT_SAMPLES:
	389	if (!sdi)
	390	return SR_ERR_ARG;
	391	devc = sdi->priv;
	392	if (devc->flag_reg & FLAG_RLE)
	393	return SR_ERR_NA;
	394	if (devc->max_samples == 0)
	395	/* Device didn't specify sample memory size in metadata. */
	396	return SR_ERR_NA;
	397	/*
ba7dd8bb	398	* Channel groups are turned off if no channels in that group are
f0de2dd0 BV	399	* enabled, making more room for samples for the enabled group.
f0de2dd0 BV	400	*/
91fd0f72 BV	401	ols_channel_mask(sdi);
91fd0f72 BV	402	num_ols_changrp = 0;
f0de2dd0	403	for (i = 0; i < 4; i++) {
ba7dd8bb	404	if (devc->channel_mask & (0xff << (i * 8)))
91fd0f72	405	num_ols_changrp++;
1e1dac0c	406	}
f0de2dd0	407	grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
91fd0f72 BV	408	if (num_ols_changrp)
	409	grange[1] = g_variant_new_uint64(devc->max_samples / num_ols_changrp);
	410	else
	411	grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES);
f0de2dd0 BV	412	*data = g_variant_new_tuple(grange, 2);
f0de2dd0 BV	413	break;
a1c743fc	414	default:
bd6fbf62	415	return SR_ERR_NA;
a1c743fc BV	416	}
	417
	418	return SR_OK;
	419	}
	420
016e72f3 BV	421	static int set_trigger(const struct sr_dev_inst *sdi, int stage)
	422	{
	423	struct dev_context *devc;
	424	struct sr_serial_dev_inst *serial;
	425	uint8_t cmd, arg[4];
	426
	427	devc = sdi->priv;
	428	serial = sdi->conn;
	429
	430	cmd = CMD_SET_TRIGGER_MASK + stage * 4;
	431	arg[0] = devc->trigger_mask[stage] & 0xff;
	432	arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
	433	arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
	434	arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
	435	if (send_longcommand(serial, cmd, arg) != SR_OK)
	436	return SR_ERR;
	437
	438	cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
	439	arg[0] = devc->trigger_value[stage] & 0xff;
	440	arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
	441	arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
	442	arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
	443	if (send_longcommand(serial, cmd, arg) != SR_OK)
	444	return SR_ERR;
	445
	446	cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
	447	arg[0] = arg[1] = arg[3] = 0x00;
	448	arg[2] = stage;
	449	if (stage == devc->num_stages)
	450	/* Last stage, fire when this one matches. */
	451	arg[3] \|= TRIGGER_START;
	452	if (send_longcommand(serial, cmd, arg) != SR_OK)
	453	return SR_ERR;
	454
	455	return SR_OK;
	456	}
	457
03f4de8c	458	static int dev_acquisition_start(const struct sr_dev_inst *sdi,
0aba65da UH	459	void *cb_data)
0aba65da UH	460	{
0aba65da	461	struct dev_context *devc;
459a0f26	462	struct sr_serial_dev_inst *serial;
32f09bfd	463	uint16_t samplecount, readcount, delaycount;
91fd0f72 BV	464	uint8_t ols_changrp_mask, arg[4];
91fd0f72 BV	465	int num_ols_changrp;
016e72f3	466	int ret, i;
0aba65da	467
e73ffd42 BV	468	if (sdi->status != SR_ST_ACTIVE)
	469	return SR_ERR_DEV_CLOSED;
	470
0aba65da	471	devc = sdi->priv;
459a0f26	472	serial = sdi->conn;
0aba65da	473
91fd0f72	474	ols_channel_mask(sdi);
0aba65da	475
91fd0f72 BV	476	num_ols_changrp = 0;
91fd0f72 BV	477	ols_changrp_mask = 0;
0aba65da	478	for (i = 0; i < 4; i++) {
ba7dd8bb	479	if (devc->channel_mask & (0xff << (i * 8))) {
91fd0f72 BV	480	ols_changrp_mask \|= (1 << i);
91fd0f72 BV	481	num_ols_changrp++;
0aba65da UH	482	}
	483	}
	484
	485	/*
	486	* Limit readcount to prevent reading past the end of the hardware
	487	* buffer.
	488	*/
91fd0f72	489	samplecount = MIN(devc->max_samples / num_ols_changrp, devc->limit_samples);
32f09bfd	490	readcount = samplecount / 4;
016e72f3 BV	491
	492	/* Rather read too many samples than too few. */
	493	if (samplecount % 4 != 0)
32f09bfd	494	readcount++;
0aba65da	495
016e72f3	496	/* Basic triggers. */
91fd0f72 BV	497	if (ols_convert_trigger(sdi) != SR_OK) {
	498	sr_err("Failed to configure channels.");
	499	return SR_ERR;
	500	}
	501	if (devc->num_stages > 0) {
0aba65da UH	502	delaycount = readcount * (1 - devc->capture_ratio / 100.0);
0aba65da UH	503	devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
016e72f3	504	for (i = 0; i <= devc->num_stages; i++) {
91fd0f72	505	sr_dbg("Setting OLS stage %d trigger.", i);
016e72f3 BV	506	if ((ret = set_trigger(sdi, i)) != SR_OK)
	507	return ret;
	508	}
0aba65da	509	} else {
016e72f3 BV	510	/* No triggers configured, force trigger on first stage. */
	511	sr_dbg("Forcing trigger at stage 0.");
	512	if ((ret = set_trigger(sdi, 0)) != SR_OK)
	513	return ret;
0aba65da UH	514	delaycount = readcount;
	515	}
	516
6d16fdfb	517	/* Samplerate. */
016e72f3	518	sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
6d16fdfb	519	devc->cur_samplerate, devc->cur_samplerate_divider);
016e72f3 BV	520	arg[0] = devc->cur_samplerate_divider & 0xff;
	521	arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
	522	arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
	523	arg[3] = 0x00;
	524	if (send_longcommand(serial, CMD_SET_DIVIDER, arg) != SR_OK)
0aba65da UH	525	return SR_ERR;
	526
	527	/* Send sample limit and pre/post-trigger capture ratio. */
016e72f3	528	sr_dbg("Setting sample limit %d, trigger point at %d",
6d16fdfb	529	(readcount - 1) * 4, (delaycount - 1) * 4);
016e72f3 BV	530	arg[0] = ((readcount - 1) & 0xff);
	531	arg[1] = ((readcount - 1) & 0xff00) >> 8;
	532	arg[2] = ((delaycount - 1) & 0xff);
	533	arg[3] = ((delaycount - 1) & 0xff00) >> 8;
	534	if (send_longcommand(serial, CMD_CAPTURE_SIZE, arg) != SR_OK)
0aba65da UH	535	return SR_ERR;
0aba65da UH	536
6d16fdfb	537	/* Flag register. */
625763e2 BV	538	sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
625763e2 BV	539	devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
6d16fdfb	540	devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
625763e2 BV	541	devc->flag_reg & FLAG_RLE ? "on" : "off",
	542	devc->flag_reg & FLAG_FILTER ? "on": "off",
	543	devc->flag_reg & FLAG_DEMUX ? "on" : "off");
91fd0f72 BV	544	/*
	545	* Enable/disable OLS channel groups in the flag register according
	546	* to the channel mask. 1 means "disable channel".
	547	*/
	548	devc->flag_reg \|= ~(ols_changrp_mask << 2) & 0x3c;
016e72f3 BV	549	arg[0] = devc->flag_reg & 0xff;
	550	arg[1] = devc->flag_reg >> 8;
	551	arg[2] = arg[3] = 0x00;
	552	if (send_longcommand(serial, CMD_SET_FLAGS, arg) != SR_OK)
0aba65da UH	553	return SR_ERR;
	554
	555	/* Start acquisition on the device. */
459a0f26	556	if (send_shortcommand(serial, CMD_RUN) != SR_OK)
0aba65da UH	557	return SR_ERR;
0aba65da UH	558
bf256783	559	/* Reset all operational states. */
6d16fdfb BV	560	devc->rle_count = devc->num_transfers = 0;
6d16fdfb BV	561	devc->num_samples = devc->num_bytes = 0;
625763e2	562	devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
abb39e6b	563	memset(devc->sample, 0, 4);
bf256783	564
4afdfd46	565	/* Send header packet to the session bus. */
29a27196	566	std_session_send_df_header(cb_data, LOG_PREFIX);
4afdfd46	567
102f1239 BV	568	serial_source_add(sdi->session, serial, G_IO_IN, -1,
102f1239 BV	569	ols_receive_data, cb_data);
0aba65da	570
0aba65da UH	571	return SR_OK;
	572	}
	573
03f4de8c	574	static int dev_acquisition_stop(struct sr_dev_inst sdi, void cb_data)
0aba65da	575	{
0aba65da UH	576	(void)cb_data;
	577
	578	abort_acquisition(sdi);
	579
	580	return SR_OK;
	581	}
	582
	583	SR_PRIV struct sr_dev_driver ols_driver_info = {
	584	.name = "ols",
	585	.longname = "Openbench Logic Sniffer",
	586	.api_version = 1,
03f4de8c	587	.init = init,
eea49cf1	588	.cleanup = cleanup,
03f4de8c BV	589	.scan = scan,
03f4de8c BV	590	.dev_list = dev_list,
a6630742	591	.dev_clear = NULL,
035a1078 BV	592	.config_get = config_get,
035a1078 BV	593	.config_set = config_set,
a1c743fc	594	.config_list = config_list,
854434de	595	.dev_open = std_serial_dev_open,
bf2c987f	596	.dev_close = std_serial_dev_close,
03f4de8c BV	597	.dev_acquisition_start = dev_acquisition_start,
03f4de8c BV	598	.dev_acquisition_stop = dev_acquisition_stop,
0aba65da UH	599	.priv = NULL,
0aba65da UH	600	};