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[libsigrok.git] / src / hardware / atten-pps3xxx / api.c
CommitLineData
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
6ec6c43b 20#include <config.h>
33c40990 21#include <string.h>
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22#include "protocol.h"
23
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24/*
25 * The default serial communication settings on the device are 9600
26 * baud, 9 data bits. The 9th bit isn't actually used, and the vendor
27 * software uses Mark parity to absorb the extra bit.
28 *
29 * Since 9 data bits is not a standard available in POSIX, we use two
30 * stop bits to skip over the extra bit instead.
31 */
32#define SERIALCOMM "9600/8n2"
33
584560f1 34static const uint32_t scanopts[] = {
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35 SR_CONF_CONN,
36 SR_CONF_SERIALCOMM,
37};
38
1f889afd 39static const uint32_t drvopts[] = {
33c40990 40 SR_CONF_POWER_SUPPLY,
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41};
42
1f889afd 43static const uint32_t devopts[] = {
e91bb0a6 44 SR_CONF_CONTINUOUS,
7a0b98b5 45 SR_CONF_CHANNEL_CONFIG | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
5827f61b 46 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
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47};
48
584560f1 49static const uint32_t devopts_cg[] = {
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AJ
50 SR_CONF_VOLTAGE | SR_CONF_GET,
51 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_CURRENT | SR_CONF_GET,
53 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
54 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
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55};
56
57static const char *channel_modes[] = {
58 "Independent",
59 "Series",
60 "Parallel",
61};
62
329733d9 63static const struct pps_model models[] = {
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64 { PPS_3203T_3S, "PPS3203T-3S",
65 CHANMODE_INDEPENDENT | CHANMODE_SERIES | CHANMODE_PARALLEL,
66 3,
67 {
68 /* Channel 1 */
69 { { 0, 32, 0.01 }, { 0, 3, 0.001 } },
70 /* Channel 2 */
71 { { 0, 32, 0.01 }, { 0, 3, 0.001 } },
72 /* Channel 3 */
73 { { 0, 6, 0.01 }, { 0, 3, 0.001 } },
74 },
75 },
76};
77
4f840ce9 78static GSList *scan(struct sr_dev_driver *di, GSList *options, int modelid)
fa0d6afe 79{
33c40990 80 struct sr_dev_inst *sdi;
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81 struct dev_context *devc;
82 struct sr_config *src;
ba7dd8bb 83 struct sr_channel *ch;
40fd0264 84 struct sr_channel_group *cg;
33c40990 85 struct sr_serial_dev_inst *serial;
43376f33 86 GSList *l;
329733d9 87 const struct pps_model *model;
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88 uint8_t packet[PACKET_SIZE];
89 unsigned int i;
2eb1612d 90 int delay_ms, ret;
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91 const char *conn, *serialcomm;
92 char channel[10];
fa0d6afe 93
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94 conn = serialcomm = NULL;
95 for (l = options; l; l = l->next) {
96 src = l->data;
97 switch (src->key) {
98 case SR_CONF_CONN:
99 conn = g_variant_get_string(src->data, NULL);
100 break;
101 case SR_CONF_SERIALCOMM:
102 serialcomm = g_variant_get_string(src->data, NULL);
103 break;
104 }
105 }
106 if (!conn)
107 return NULL;
108 if (!serialcomm)
109 serialcomm = SERIALCOMM;
110
91219afc 111 serial = sr_serial_dev_inst_new(conn, serialcomm);
33c40990 112
5305266a 113 if (serial_open(serial, SERIAL_RDWR) != SR_OK)
33c40990 114 return NULL;
91219afc 115
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116 serial_flush(serial);
117
945cfd4f 118 /* This is how the vendor software scans for hardware. */
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119 memset(packet, 0, PACKET_SIZE);
120 packet[0] = 0xaa;
121 packet[1] = 0xaa;
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122 delay_ms = serial_timeout(serial, PACKET_SIZE);
123 if (serial_write_blocking(serial, packet, PACKET_SIZE, delay_ms) < PACKET_SIZE) {
081c214e 124 sr_err("Unable to write while probing for hardware.");
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125 return NULL;
126 }
127 /* The device responds with a 24-byte packet when it receives a packet.
128 * At 9600 baud, 300ms is long enough for it to have arrived. */
129 g_usleep(300 * 1000);
130 memset(packet, 0, PACKET_SIZE);
131 if ((ret = serial_read_nonblocking(serial, packet, PACKET_SIZE)) < 0) {
132 sr_err("Unable to read while probing for hardware: %s",
8d522801 133 sr_strerror(ret));
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134 return NULL;
135 }
136 if (ret != PACKET_SIZE || packet[0] != 0xaa || packet[1] != 0xaa) {
137 /* Doesn't look like an Atten PPS. */
138 return NULL;
139 }
140
141 model = NULL;
142 for (i = 0; i < ARRAY_SIZE(models); i++) {
143 if (models[i].modelid == modelid) {
144 model = &models[i];
145 break;
146 }
147 }
148 if (!model) {
149 sr_err("Unknown modelid %d", modelid);
150 return NULL;
151 }
152
aac29cc1 153 sdi = g_malloc0(sizeof(struct sr_dev_inst));
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154 sdi->status = SR_ST_INACTIVE;
155 sdi->vendor = g_strdup("Atten");
156 sdi->model = g_strdup(model->name);
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157 sdi->inst_type = SR_INST_SERIAL;
158 sdi->conn = serial;
159 for (i = 0; i < MAX_CHANNELS; i++) {
160 snprintf(channel, 10, "CH%d", i + 1);
5e23fcab 161 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel);
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162 cg = g_malloc(sizeof(struct sr_channel_group));
163 cg->name = g_strdup(channel);
ba7dd8bb 164 cg->channels = g_slist_append(NULL, ch);
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UH
165 cg->priv = NULL;
166 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
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167 }
168
169 devc = g_malloc0(sizeof(struct dev_context));
170 devc->model = model;
171 devc->config = g_malloc0(sizeof(struct per_channel_config) * model->num_channels);
2eb1612d 172 devc->delay_ms = delay_ms;
33c40990 173 sdi->priv = devc;
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174
175 serial_close(serial);
fa0d6afe 176
43376f33 177 return std_scan_complete(di, g_slist_append(NULL, sdi));
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178}
179
4f840ce9 180static GSList *scan_3203(struct sr_dev_driver *di, GSList *options)
33c40990 181{
4f840ce9 182 return scan(di, options, PPS_3203T_3S);
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183}
184
584560f1 185static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 186 const struct sr_channel_group *cg)
fa0d6afe 187{
33c40990 188 struct dev_context *devc;
ba7dd8bb 189 struct sr_channel *ch;
a9010323 190 int channel;
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191
192 if (!sdi)
193 return SR_ERR_ARG;
fa0d6afe 194
33c40990 195 devc = sdi->priv;
fa0d6afe 196
53b4680f 197 if (!cg) {
33c40990 198 switch (key) {
7a0b98b5 199 case SR_CONF_CHANNEL_CONFIG:
fe997353 200 *data = g_variant_new_string(channel_modes[devc->channel_mode]);
33c40990 201 break;
a1eaa9e0 202 case SR_CONF_OVER_CURRENT_PROTECTION_ENABLED:
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203 *data = g_variant_new_boolean(devc->over_current_protection);
204 break;
205 default:
206 return SR_ERR_NA;
207 }
208 } else {
660e398f 209 /* We only ever have one channel per channel group in this driver. */
ba7dd8bb
UH
210 ch = cg->channels->data;
211 channel = ch->index;
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212
213 switch (key) {
7a0b98b5 214 case SR_CONF_VOLTAGE:
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215 *data = g_variant_new_double(devc->config[channel].output_voltage_last);
216 break;
7a0b98b5 217 case SR_CONF_VOLTAGE_TARGET:
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218 *data = g_variant_new_double(devc->config[channel].output_voltage_max);
219 break;
7a0b98b5 220 case SR_CONF_CURRENT:
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221 *data = g_variant_new_double(devc->config[channel].output_current_last);
222 break;
7a0b98b5 223 case SR_CONF_CURRENT_LIMIT:
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224 *data = g_variant_new_double(devc->config[channel].output_current_max);
225 break;
7a0b98b5 226 case SR_CONF_ENABLED:
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227 *data = g_variant_new_boolean(devc->config[channel].output_enabled);
228 break;
229 default:
230 return SR_ERR_NA;
231 }
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232 }
233
a9010323 234 return SR_OK;
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235}
236
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237static int find_str(const char *str, const char **strings, int array_size)
238{
239 int idx, i;
240
241 idx = -1;
242 for (i = 0; i < array_size; i++) {
243 if (!strcmp(str, strings[i])) {
244 idx = i;
245 break;
246 }
247 }
248
249 return idx;
250}
251
584560f1 252static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
53b4680f 253 const struct sr_channel_group *cg)
fa0d6afe 254{
33c40990 255 struct dev_context *devc;
ba7dd8bb 256 struct sr_channel *ch;
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257 gdouble dval;
258 int channel, ret, ival;
259 const char *sval;
260 gboolean bval;
fa0d6afe 261
fa0d6afe 262 ret = SR_OK;
33c40990 263 devc = sdi->priv;
53b4680f 264 if (!cg) {
33c40990 265 switch (key) {
7a0b98b5 266 case SR_CONF_CHANNEL_CONFIG:
33c40990 267 sval = g_variant_get_string(data, NULL);
53012da6 268 if ((ival = find_str(sval, ARRAY_AND_SIZE(channel_modes))) == -1) {
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269 ret = SR_ERR_ARG;
270 break;
271 }
272 if (devc->model->channel_modes && (1 << ival) == 0) {
273 /* Not supported on this model. */
274 ret = SR_ERR_ARG;
275 }
276 if (ival == devc->channel_mode_set)
277 /* Nothing to do. */
278 break;
279 devc->channel_mode_set = ival;
ab988ecb 280 devc->config_dirty = TRUE;
33c40990 281 break;
a1eaa9e0 282 case SR_CONF_OVER_CURRENT_PROTECTION_ENABLED:
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283 bval = g_variant_get_boolean(data);
284 if (bval == devc->over_current_protection_set)
285 /* Nothing to do. */
286 break;
287 devc->over_current_protection_set = bval;
ab988ecb 288 devc->config_dirty = TRUE;
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289 break;
290 default:
291 return SR_ERR_NA;
292 }
293 } else {
660e398f 294 /* We only ever have one channel per channel group in this driver. */
ba7dd8bb
UH
295 ch = cg->channels->data;
296 channel = ch->index;
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297
298 switch (key) {
7a0b98b5 299 case SR_CONF_VOLTAGE_TARGET:
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300 dval = g_variant_get_double(data);
301 if (dval < 0 || dval > devc->model->channels[channel].voltage[1])
302 ret = SR_ERR_ARG;
303 devc->config[channel].output_voltage_max = dval;
ab988ecb 304 devc->config_dirty = TRUE;
33c40990 305 break;
7a0b98b5 306 case SR_CONF_CURRENT_LIMIT:
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307 dval = g_variant_get_double(data);
308 if (dval < 0 || dval > devc->model->channels[channel].current[1])
309 ret = SR_ERR_ARG;
310 devc->config[channel].output_current_max = dval;
ab988ecb 311 devc->config_dirty = TRUE;
33c40990 312 break;
7a0b98b5 313 case SR_CONF_ENABLED:
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314 bval = g_variant_get_boolean(data);
315 if (bval == devc->config[channel].output_enabled_set)
316 /* Nothing to do. */
317 break;
318 devc->config[channel].output_enabled_set = bval;
ab988ecb 319 devc->config_dirty = TRUE;
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320 break;
321 default:
322 ret = SR_ERR_NA;
323 }
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324 }
325
326 return ret;
327}
328
584560f1 329static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 330 const struct sr_channel_group *cg)
fa0d6afe 331{
33c40990 332 struct dev_context *devc;
ba7dd8bb 333 struct sr_channel *ch;
54d471f4 334 int channel;
33c40990 335
e66d1892 336 devc = (sdi) ? sdi->priv : NULL;
a9010323 337
53b4680f 338 if (!cg) {
33c40990 339 switch (key) {
e66d1892 340 case SR_CONF_SCAN_OPTIONS:
33c40990 341 case SR_CONF_DEVICE_OPTIONS:
e66d1892 342 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
7a0b98b5 343 case SR_CONF_CHANNEL_CONFIG:
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344 if (devc->model->channel_modes == CHANMODE_INDEPENDENT) {
345 /* The 1-channel models. */
346 *data = g_variant_new_strv(channel_modes, 1);
347 } else {
348 /* The other models support all modes. */
53012da6 349 *data = g_variant_new_strv(ARRAY_AND_SIZE(channel_modes));
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350 }
351 break;
352 default:
353 return SR_ERR_NA;
354 }
355 } else {
660e398f 356 /* We only ever have one channel per channel group in this driver. */
ba7dd8bb
UH
357 ch = cg->channels->data;
358 channel = ch->index;
33c40990
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359
360 switch (key) {
361 case SR_CONF_DEVICE_OPTIONS:
53012da6 362 *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg));
33c40990 363 break;
7a0b98b5 364 case SR_CONF_VOLTAGE_TARGET:
54d471f4 365 *data = std_gvar_min_max_step_array(devc->model->channels[channel].voltage);
33c40990 366 break;
7a0b98b5 367 case SR_CONF_CURRENT_LIMIT:
54d471f4 368 *data = std_gvar_min_max_step_array(devc->model->channels[channel].current);
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369 break;
370 default:
371 return SR_ERR_NA;
372 }
fa0d6afe
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373 }
374
a9010323 375 return SR_OK;
fa0d6afe
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376}
377
ab988ecb
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378static int dev_close(struct sr_dev_inst *sdi)
379{
380 struct dev_context *devc;
381
382 devc = sdi->priv;
f1ba6b4b 383
ab988ecb
BV
384 if (devc->config_dirty)
385 /* Some configuration changes were queued up but didn't
386 * get sent to the device, likely because we were never
387 * in acquisition mode. Send them out now. */
388 send_config(sdi);
389
390 return std_serial_dev_close(sdi);
391}
392
695dc859 393static int dev_acquisition_start(const struct sr_dev_inst *sdi)
fa0d6afe 394{
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395 struct dev_context *devc;
396 struct sr_serial_dev_inst *serial;
397 uint8_t packet[PACKET_SIZE];
398
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399 devc = sdi->priv;
400 memset(devc->packet, 0x44, PACKET_SIZE);
401 devc->packet_size = 0;
402
403 devc->acquisition_running = TRUE;
404
405 serial = sdi->conn;
102f1239
BV
406 serial_source_add(sdi->session, serial, G_IO_IN, 50,
407 atten_pps3xxx_receive_data, (void *)sdi);
bee2b016 408 std_session_send_df_header(sdi);
33c40990 409
ba7dd8bb 410 /* Send a "channel" configuration packet now. */
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411 memset(packet, 0, PACKET_SIZE);
412 packet[0] = 0xaa;
413 packet[1] = 0xaa;
414 send_packet(sdi, packet);
fa0d6afe
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415
416 return SR_OK;
417}
418
695dc859 419static int dev_acquisition_stop(struct sr_dev_inst *sdi)
fa0d6afe 420{
33c40990
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421 struct dev_context *devc;
422
33c40990
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423 devc = sdi->priv;
424 devc->acquisition_running = FALSE;
fa0d6afe
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425
426 return SR_OK;
427}
428
dd5c48a6 429static struct sr_dev_driver atten_pps3203_driver_info = {
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430 .name = "atten-pps3203",
431 .longname = "Atten PPS3203T-3S",
fa0d6afe 432 .api_version = 1,
c2fdcc25 433 .init = std_init,
700d6b64 434 .cleanup = std_cleanup,
33c40990 435 .scan = scan_3203,
c01bf34c 436 .dev_list = std_dev_list,
f778bf02 437 .dev_clear = std_dev_clear,
fa0d6afe
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438 .config_get = config_get,
439 .config_set = config_set,
440 .config_list = config_list,
33c40990 441 .dev_open = std_serial_dev_open,
ab988ecb 442 .dev_close = dev_close,
fa0d6afe
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443 .dev_acquisition_start = dev_acquisition_start,
444 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 445 .context = NULL,
fa0d6afe 446};
dd5c48a6 447SR_REGISTER_DEV_DRIVER(atten_pps3203_driver_info);