]> sigrok.org Git - libsigrok.git/blame - src/hardware/atten-pps3xxx/api.c
rigol-ds: improve robustness in samplerate getting code path
[libsigrok.git] / src / hardware / atten-pps3xxx / api.c
CommitLineData
fa0d6afe
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
6ec6c43b 20#include <config.h>
33c40990 21#include <string.h>
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22#include "protocol.h"
23
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24/*
25 * The default serial communication settings on the device are 9600
26 * baud, 9 data bits. The 9th bit isn't actually used, and the vendor
27 * software uses Mark parity to absorb the extra bit.
28 *
29 * Since 9 data bits is not a standard available in POSIX, we use two
30 * stop bits to skip over the extra bit instead.
31 */
32#define SERIALCOMM "9600/8n2"
33
584560f1 34static const uint32_t scanopts[] = {
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35 SR_CONF_CONN,
36 SR_CONF_SERIALCOMM,
37};
38
1f889afd 39static const uint32_t drvopts[] = {
33c40990 40 SR_CONF_POWER_SUPPLY,
d6fa8ace
BV
41};
42
1f889afd 43static const uint32_t devopts[] = {
e91bb0a6 44 SR_CONF_CONTINUOUS,
7a0b98b5 45 SR_CONF_CHANNEL_CONFIG | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
5827f61b 46 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
33c40990
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47};
48
584560f1 49static const uint32_t devopts_cg[] = {
7a0b98b5
AJ
50 SR_CONF_VOLTAGE | SR_CONF_GET,
51 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_CURRENT | SR_CONF_GET,
53 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
54 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
33c40990
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55};
56
57static const char *channel_modes[] = {
58 "Independent",
59 "Series",
60 "Parallel",
61};
62
329733d9 63static const struct pps_model models[] = {
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64 { PPS_3203T_3S, "PPS3203T-3S",
65 CHANMODE_INDEPENDENT | CHANMODE_SERIES | CHANMODE_PARALLEL,
66 3,
67 {
68 /* Channel 1 */
69 { { 0, 32, 0.01 }, { 0, 3, 0.001 } },
70 /* Channel 2 */
71 { { 0, 32, 0.01 }, { 0, 3, 0.001 } },
72 /* Channel 3 */
73 { { 0, 6, 0.01 }, { 0, 3, 0.001 } },
74 },
75 },
76};
77
4f840ce9 78static GSList *scan(struct sr_dev_driver *di, GSList *options, int modelid)
fa0d6afe 79{
33c40990 80 struct sr_dev_inst *sdi;
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81 struct dev_context *devc;
82 struct sr_config *src;
ba7dd8bb 83 struct sr_channel *ch;
40fd0264 84 struct sr_channel_group *cg;
33c40990 85 struct sr_serial_dev_inst *serial;
43376f33 86 GSList *l;
329733d9 87 const struct pps_model *model;
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88 uint8_t packet[PACKET_SIZE];
89 unsigned int i;
2eb1612d 90 int delay_ms, ret;
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91 const char *conn, *serialcomm;
92 char channel[10];
fa0d6afe 93
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94 conn = serialcomm = NULL;
95 for (l = options; l; l = l->next) {
96 src = l->data;
97 switch (src->key) {
98 case SR_CONF_CONN:
99 conn = g_variant_get_string(src->data, NULL);
100 break;
101 case SR_CONF_SERIALCOMM:
102 serialcomm = g_variant_get_string(src->data, NULL);
103 break;
104 }
105 }
106 if (!conn)
107 return NULL;
108 if (!serialcomm)
109 serialcomm = SERIALCOMM;
110
91219afc 111 serial = sr_serial_dev_inst_new(conn, serialcomm);
33c40990 112
5305266a 113 if (serial_open(serial, SERIAL_RDWR) != SR_OK)
33c40990 114 return NULL;
91219afc 115
945cfd4f 116 /* This is how the vendor software scans for hardware. */
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117 memset(packet, 0, PACKET_SIZE);
118 packet[0] = 0xaa;
119 packet[1] = 0xaa;
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120 delay_ms = serial_timeout(serial, PACKET_SIZE);
121 if (serial_write_blocking(serial, packet, PACKET_SIZE, delay_ms) < PACKET_SIZE) {
081c214e 122 sr_err("Unable to write while probing for hardware.");
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123 return NULL;
124 }
125 /* The device responds with a 24-byte packet when it receives a packet.
126 * At 9600 baud, 300ms is long enough for it to have arrived. */
127 g_usleep(300 * 1000);
128 memset(packet, 0, PACKET_SIZE);
129 if ((ret = serial_read_nonblocking(serial, packet, PACKET_SIZE)) < 0) {
130 sr_err("Unable to read while probing for hardware: %s",
8d522801 131 sr_strerror(ret));
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132 return NULL;
133 }
134 if (ret != PACKET_SIZE || packet[0] != 0xaa || packet[1] != 0xaa) {
135 /* Doesn't look like an Atten PPS. */
136 return NULL;
137 }
138
139 model = NULL;
140 for (i = 0; i < ARRAY_SIZE(models); i++) {
141 if (models[i].modelid == modelid) {
142 model = &models[i];
143 break;
144 }
145 }
146 if (!model) {
147 sr_err("Unknown modelid %d", modelid);
148 return NULL;
149 }
150
aac29cc1 151 sdi = g_malloc0(sizeof(struct sr_dev_inst));
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152 sdi->status = SR_ST_INACTIVE;
153 sdi->vendor = g_strdup("Atten");
154 sdi->model = g_strdup(model->name);
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155 sdi->inst_type = SR_INST_SERIAL;
156 sdi->conn = serial;
157 for (i = 0; i < MAX_CHANNELS; i++) {
158 snprintf(channel, 10, "CH%d", i + 1);
5e23fcab 159 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel);
40fd0264
UH
160 cg = g_malloc(sizeof(struct sr_channel_group));
161 cg->name = g_strdup(channel);
ba7dd8bb 162 cg->channels = g_slist_append(NULL, ch);
40fd0264
UH
163 cg->priv = NULL;
164 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
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165 }
166
167 devc = g_malloc0(sizeof(struct dev_context));
168 devc->model = model;
169 devc->config = g_malloc0(sizeof(struct per_channel_config) * model->num_channels);
2eb1612d 170 devc->delay_ms = delay_ms;
33c40990 171 sdi->priv = devc;
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172
173 serial_close(serial);
fa0d6afe 174
43376f33 175 return std_scan_complete(di, g_slist_append(NULL, sdi));
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176}
177
4f840ce9 178static GSList *scan_3203(struct sr_dev_driver *di, GSList *options)
33c40990 179{
4f840ce9 180 return scan(di, options, PPS_3203T_3S);
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181}
182
dd7a72ea
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183static int config_get(uint32_t key, GVariant **data,
184 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
fa0d6afe 185{
33c40990 186 struct dev_context *devc;
ba7dd8bb 187 struct sr_channel *ch;
a9010323 188 int channel;
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189
190 if (!sdi)
191 return SR_ERR_ARG;
fa0d6afe 192
33c40990 193 devc = sdi->priv;
fa0d6afe 194
53b4680f 195 if (!cg) {
33c40990 196 switch (key) {
7a0b98b5 197 case SR_CONF_CHANNEL_CONFIG:
fe997353 198 *data = g_variant_new_string(channel_modes[devc->channel_mode]);
33c40990 199 break;
a1eaa9e0 200 case SR_CONF_OVER_CURRENT_PROTECTION_ENABLED:
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201 *data = g_variant_new_boolean(devc->over_current_protection);
202 break;
203 default:
204 return SR_ERR_NA;
205 }
206 } else {
660e398f 207 /* We only ever have one channel per channel group in this driver. */
ba7dd8bb
UH
208 ch = cg->channels->data;
209 channel = ch->index;
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210
211 switch (key) {
7a0b98b5 212 case SR_CONF_VOLTAGE:
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213 *data = g_variant_new_double(devc->config[channel].output_voltage_last);
214 break;
7a0b98b5 215 case SR_CONF_VOLTAGE_TARGET:
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216 *data = g_variant_new_double(devc->config[channel].output_voltage_max);
217 break;
7a0b98b5 218 case SR_CONF_CURRENT:
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219 *data = g_variant_new_double(devc->config[channel].output_current_last);
220 break;
7a0b98b5 221 case SR_CONF_CURRENT_LIMIT:
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222 *data = g_variant_new_double(devc->config[channel].output_current_max);
223 break;
7a0b98b5 224 case SR_CONF_ENABLED:
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225 *data = g_variant_new_boolean(devc->config[channel].output_enabled);
226 break;
227 default:
228 return SR_ERR_NA;
229 }
fa0d6afe
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230 }
231
a9010323 232 return SR_OK;
fa0d6afe
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233}
234
dd7a72ea
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235static int config_set(uint32_t key, GVariant *data,
236 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
fa0d6afe 237{
33c40990 238 struct dev_context *devc;
ba7dd8bb 239 struct sr_channel *ch;
33c40990 240 gdouble dval;
758906aa 241 int channel, ival;
33c40990 242 gboolean bval;
fa0d6afe 243
33c40990 244 devc = sdi->priv;
758906aa 245
53b4680f 246 if (!cg) {
33c40990 247 switch (key) {
7a0b98b5 248 case SR_CONF_CHANNEL_CONFIG:
697fb6dd
UH
249 if ((ival = std_str_idx(data, ARRAY_AND_SIZE(channel_modes))) < 0)
250 return SR_ERR_ARG;
758906aa
UH
251 if (devc->model->channel_modes && (1 << ival) == 0)
252 return SR_ERR_ARG; /* Not supported on this model. */
33c40990 253 if (ival == devc->channel_mode_set)
758906aa 254 break; /* Nothing to do. */
33c40990 255 devc->channel_mode_set = ival;
ab988ecb 256 devc->config_dirty = TRUE;
33c40990 257 break;
a1eaa9e0 258 case SR_CONF_OVER_CURRENT_PROTECTION_ENABLED:
33c40990
BV
259 bval = g_variant_get_boolean(data);
260 if (bval == devc->over_current_protection_set)
758906aa 261 break; /* Nothing to do. */
33c40990 262 devc->over_current_protection_set = bval;
ab988ecb 263 devc->config_dirty = TRUE;
33c40990
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264 break;
265 default:
266 return SR_ERR_NA;
267 }
268 } else {
660e398f 269 /* We only ever have one channel per channel group in this driver. */
ba7dd8bb
UH
270 ch = cg->channels->data;
271 channel = ch->index;
33c40990
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272
273 switch (key) {
7a0b98b5 274 case SR_CONF_VOLTAGE_TARGET:
33c40990
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275 dval = g_variant_get_double(data);
276 if (dval < 0 || dval > devc->model->channels[channel].voltage[1])
758906aa 277 return SR_ERR_ARG;
33c40990 278 devc->config[channel].output_voltage_max = dval;
ab988ecb 279 devc->config_dirty = TRUE;
33c40990 280 break;
7a0b98b5 281 case SR_CONF_CURRENT_LIMIT:
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282 dval = g_variant_get_double(data);
283 if (dval < 0 || dval > devc->model->channels[channel].current[1])
758906aa 284 return SR_ERR_ARG;
33c40990 285 devc->config[channel].output_current_max = dval;
ab988ecb 286 devc->config_dirty = TRUE;
33c40990 287 break;
7a0b98b5 288 case SR_CONF_ENABLED:
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289 bval = g_variant_get_boolean(data);
290 if (bval == devc->config[channel].output_enabled_set)
758906aa 291 break; /* Nothing to do. */
33c40990 292 devc->config[channel].output_enabled_set = bval;
ab988ecb 293 devc->config_dirty = TRUE;
33c40990
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294 break;
295 default:
758906aa 296 return SR_ERR_NA;
33c40990 297 }
fa0d6afe
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298 }
299
758906aa 300 return SR_OK;
fa0d6afe
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301}
302
dd7a72ea
UH
303static int config_list(uint32_t key, GVariant **data,
304 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
fa0d6afe 305{
33c40990 306 struct dev_context *devc;
ba7dd8bb 307 struct sr_channel *ch;
54d471f4 308 int channel;
33c40990 309
e66d1892 310 devc = (sdi) ? sdi->priv : NULL;
a9010323 311
53b4680f 312 if (!cg) {
33c40990 313 switch (key) {
e66d1892 314 case SR_CONF_SCAN_OPTIONS:
33c40990 315 case SR_CONF_DEVICE_OPTIONS:
e66d1892 316 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
7a0b98b5 317 case SR_CONF_CHANNEL_CONFIG:
f6c685e4
GS
318 if (!devc || !devc->model)
319 return SR_ERR_ARG;
33c40990
BV
320 if (devc->model->channel_modes == CHANMODE_INDEPENDENT) {
321 /* The 1-channel models. */
322 *data = g_variant_new_strv(channel_modes, 1);
323 } else {
324 /* The other models support all modes. */
53012da6 325 *data = g_variant_new_strv(ARRAY_AND_SIZE(channel_modes));
33c40990
BV
326 }
327 break;
328 default:
329 return SR_ERR_NA;
330 }
331 } else {
660e398f 332 /* We only ever have one channel per channel group in this driver. */
ba7dd8bb
UH
333 ch = cg->channels->data;
334 channel = ch->index;
33c40990
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335
336 switch (key) {
337 case SR_CONF_DEVICE_OPTIONS:
53012da6 338 *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg));
33c40990 339 break;
7a0b98b5 340 case SR_CONF_VOLTAGE_TARGET:
f6c685e4
GS
341 if (!devc || !devc->model)
342 return SR_ERR_ARG;
54d471f4 343 *data = std_gvar_min_max_step_array(devc->model->channels[channel].voltage);
33c40990 344 break;
7a0b98b5 345 case SR_CONF_CURRENT_LIMIT:
f6c685e4
GS
346 if (!devc || !devc->model)
347 return SR_ERR_ARG;
54d471f4 348 *data = std_gvar_min_max_step_array(devc->model->channels[channel].current);
33c40990
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349 break;
350 default:
351 return SR_ERR_NA;
352 }
fa0d6afe
BV
353 }
354
a9010323 355 return SR_OK;
fa0d6afe
BV
356}
357
ab988ecb
BV
358static int dev_close(struct sr_dev_inst *sdi)
359{
360 struct dev_context *devc;
361
362 devc = sdi->priv;
f1ba6b4b 363
ab988ecb
BV
364 if (devc->config_dirty)
365 /* Some configuration changes were queued up but didn't
366 * get sent to the device, likely because we were never
367 * in acquisition mode. Send them out now. */
368 send_config(sdi);
369
370 return std_serial_dev_close(sdi);
371}
372
695dc859 373static int dev_acquisition_start(const struct sr_dev_inst *sdi)
fa0d6afe 374{
33c40990
BV
375 struct dev_context *devc;
376 struct sr_serial_dev_inst *serial;
377 uint8_t packet[PACKET_SIZE];
378
33c40990
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379 devc = sdi->priv;
380 memset(devc->packet, 0x44, PACKET_SIZE);
381 devc->packet_size = 0;
382
383 devc->acquisition_running = TRUE;
384
385 serial = sdi->conn;
102f1239
BV
386 serial_source_add(sdi->session, serial, G_IO_IN, 50,
387 atten_pps3xxx_receive_data, (void *)sdi);
bee2b016 388 std_session_send_df_header(sdi);
33c40990 389
ba7dd8bb 390 /* Send a "channel" configuration packet now. */
33c40990
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391 memset(packet, 0, PACKET_SIZE);
392 packet[0] = 0xaa;
393 packet[1] = 0xaa;
394 send_packet(sdi, packet);
fa0d6afe
BV
395
396 return SR_OK;
397}
398
695dc859 399static int dev_acquisition_stop(struct sr_dev_inst *sdi)
fa0d6afe 400{
33c40990
BV
401 struct dev_context *devc;
402
33c40990
BV
403 devc = sdi->priv;
404 devc->acquisition_running = FALSE;
fa0d6afe
BV
405
406 return SR_OK;
407}
408
dd5c48a6 409static struct sr_dev_driver atten_pps3203_driver_info = {
33c40990
BV
410 .name = "atten-pps3203",
411 .longname = "Atten PPS3203T-3S",
fa0d6afe 412 .api_version = 1,
c2fdcc25 413 .init = std_init,
700d6b64 414 .cleanup = std_cleanup,
33c40990 415 .scan = scan_3203,
c01bf34c 416 .dev_list = std_dev_list,
f778bf02 417 .dev_clear = std_dev_clear,
fa0d6afe
BV
418 .config_get = config_get,
419 .config_set = config_set,
420 .config_list = config_list,
33c40990 421 .dev_open = std_serial_dev_open,
ab988ecb 422 .dev_close = dev_close,
fa0d6afe
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423 .dev_acquisition_start = dev_acquisition_start,
424 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 425 .context = NULL,
fa0d6afe 426};
dd5c48a6 427SR_REGISTER_DEV_DRIVER(atten_pps3203_driver_info);