]> sigrok.org Git - libsigrok.git/blame - hardware/hantek-dso/api.c
hardware: Make USB drivers use the libusb_context in struct sr_context
[libsigrok.git] / hardware / hantek-dso / api.c
CommitLineData
3b533202
BV
1/*
2 * This file is part of the sigrok project.
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
27#include <string.h>
28#include <sys/time.h>
29#include <inttypes.h>
3b533202
BV
30#include <glib.h>
31#include <libusb.h>
45c59c8b
BV
32#include "libsigrok.h"
33#include "libsigrok-internal.h"
3b533202
BV
34#include "dso.h"
35
fc8fe3e3
BV
36/* Max time in ms before we want to check on USB events */
37/* TODO tune this properly */
e98b7f1b 38#define TICK 1
3b533202 39
62bb8840 40static const int hwcaps[] = {
3b533202 41 SR_HWCAP_OSCILLOSCOPE,
ae88b97b 42 SR_HWCAP_LIMIT_SAMPLES,
3b533202 43 SR_HWCAP_CONTINUOUS,
a370ef19
BV
44 SR_HWCAP_TIMEBASE,
45 SR_HWCAP_BUFFERSIZE,
46 SR_HWCAP_TRIGGER_SOURCE,
47 SR_HWCAP_TRIGGER_SLOPE,
48 SR_HWCAP_HORIZ_TRIGGERPOS,
ebb781a6 49 SR_HWCAP_FILTER,
313deed2 50 SR_HWCAP_VDIV,
4a090d72 51 SR_HWCAP_COUPLING,
3b533202
BV
52 0,
53};
54
55static const char *probe_names[] = {
56 "CH1",
57 "CH2",
58 NULL,
59};
60
62bb8840 61static const struct dso_profile dev_profiles[] = {
88a13f30 62 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 63 "Hantek", "DSO-2090",
88a13f30
BV
64 FIRMWARE_DIR "/hantek-dso-2xxx.fw" },
65 { 0x04b4, 0x2150, 0x04b5, 0x2150,
66 "Hantek", "DSO-2150",
67 FIRMWARE_DIR "/hantek-dso-2xxx.fw" },
68 { 0x04b4, 0x2250, 0x04b5, 0x2250,
69 "Hantek", "DSO-2250",
70 FIRMWARE_DIR "/hantek-dso-2xxx.fw" },
71 { 0x04b4, 0x5200, 0x04b5, 0x5200,
72 "Hantek", "DSO-5200",
73 FIRMWARE_DIR "/hantek-dso-5xxx.fw" },
74 { 0x04b4, 0x520a, 0x04b5, 0x520a,
75 "Hantek", "DSO-5200A",
76 FIRMWARE_DIR "/hantek-dso-5xxx.fw" },
77 { 0, 0, 0, 0, 0, 0, 0 },
3b533202
BV
78};
79
62bb8840 80static const uint64_t buffersizes[] = {
a370ef19
BV
81 10240,
82 32768,
83 /* TODO: 65535 */
62bb8840 84 0,
a370ef19
BV
85};
86
62bb8840 87static const struct sr_rational timebases[] = {
a370ef19
BV
88 /* microseconds */
89 { 10, 1000000 },
90 { 20, 1000000 },
91 { 40, 1000000 },
92 { 100, 1000000 },
93 { 200, 1000000 },
94 { 400, 1000000 },
95 /* milliseconds */
96 { 1, 1000 },
97 { 2, 1000 },
98 { 4, 1000 },
99 { 10, 1000 },
100 { 20, 1000 },
101 { 40, 1000 },
102 { 100, 1000 },
103 { 200, 1000 },
104 { 400, 1000 },
62bb8840 105 { 0, 0},
a370ef19
BV
106};
107
62bb8840 108static const struct sr_rational vdivs[] = {
313deed2
BV
109 /* millivolts */
110 { 10, 1000 },
111 { 20, 1000 },
112 { 50, 1000 },
113 { 100, 1000 },
114 { 200, 1000 },
115 { 500, 1000 },
116 /* volts */
117 { 1, 1 },
118 { 2, 1 },
119 { 5, 1 },
62bb8840 120 { 0, 0 },
313deed2
BV
121};
122
62bb8840 123static const char *trigger_sources[] = {
a370ef19
BV
124 "CH1",
125 "CH2",
126 "EXT",
88a13f30 127 /* TODO: forced */
62bb8840 128 NULL,
a370ef19 129};
3b533202 130
62bb8840 131static const char *filter_targets[] = {
ebb781a6
BV
132 "CH1",
133 "CH2",
134 /* TODO: "TRIGGER", */
62bb8840 135 NULL,
ebb781a6
BV
136};
137
62bb8840 138static const char *coupling[] = {
b58fbd99
BV
139 "AC",
140 "DC",
141 "GND",
62bb8840 142 NULL,
b58fbd99
BV
143};
144
982947f7
BV
145SR_PRIV struct sr_dev_driver hantek_dso_driver_info;
146static struct sr_dev_driver *hdi = &hantek_dso_driver_info;
e98b7f1b 147
69b07d14 148static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data);
3b533202 149
62bb8840 150static struct sr_dev_inst *dso_dev_new(int index, const struct dso_profile *prof)
3b533202
BV
151{
152 struct sr_dev_inst *sdi;
87ca93c5 153 struct sr_probe *probe;
269971dd
BV
154 struct drv_context *drvc;
155 struct dev_context *devc;
87ca93c5 156 int i;
3b533202
BV
157
158 sdi = sr_dev_inst_new(index, SR_ST_INITIALIZING,
88a13f30 159 prof->vendor, prof->model, NULL);
3b533202
BV
160 if (!sdi)
161 return NULL;
b0c8d7ac 162 sdi->driver = hdi;
3b533202 163
e98b7f1b
UH
164 /*
165 * Add only the real probes -- EXT isn't a source of data, only
87ca93c5
BV
166 * a trigger source internal to the device.
167 */
168 for (i = 0; probe_names[i]; i++) {
169 if (!(probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE,
170 probe_names[i])))
171 return NULL;
172 sdi->probes = g_slist_append(sdi->probes, probe);
173 }
174
269971dd 175 if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
e98b7f1b 176 sr_err("Device context malloc failed.");
3b533202
BV
177 return NULL;
178 }
e98b7f1b 179
269971dd
BV
180 devc->profile = prof;
181 devc->dev_state = IDLE;
182 devc->timebase = DEFAULT_TIMEBASE;
183 devc->ch1_enabled = TRUE;
184 devc->ch2_enabled = TRUE;
185 devc->voltage_ch1 = DEFAULT_VOLTAGE;
186 devc->voltage_ch2 = DEFAULT_VOLTAGE;
187 devc->coupling_ch1 = DEFAULT_COUPLING;
188 devc->coupling_ch2 = DEFAULT_COUPLING;
189 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
190 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
191 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
192 devc->framesize = DEFAULT_FRAMESIZE;
193 devc->triggerslope = SLOPE_POSITIVE;
194 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
195 devc->triggerposition = DEFAULT_HORIZ_TRIGGERPOS;
196 sdi->priv = devc;
197 drvc = hdi->priv;
198 drvc->instances = g_slist_append(drvc->instances, sdi);
3b533202
BV
199
200 return sdi;
201}
202
014359e3 203static int configure_probes(const struct sr_dev_inst *sdi)
3b533202 204{
014359e3 205 struct dev_context *devc;
62bb8840
UH
206 const struct sr_probe *probe;
207 const GSList *l;
3b533202 208
014359e3
BV
209 devc = sdi->priv;
210
269971dd 211 devc->ch1_enabled = devc->ch2_enabled = FALSE;
014359e3 212 for (l = sdi->probes; l; l = l->next) {
3b533202 213 probe = (struct sr_probe *)l->data;
b35c8293 214 if (probe->index == 0)
269971dd 215 devc->ch1_enabled = probe->enabled;
b35c8293 216 else if (probe->index == 1)
269971dd 217 devc->ch2_enabled = probe->enabled;
3b533202
BV
218 }
219
220 return SR_OK;
221}
222
39cfdd75 223/* Properly close and free all devices. */
811deee4 224static int clear_instances(void)
39cfdd75
BV
225{
226 struct sr_dev_inst *sdi;
269971dd
BV
227 struct drv_context *drvc;
228 struct dev_context *devc;
39cfdd75
BV
229 GSList *l;
230
269971dd
BV
231 drvc = hdi->priv;
232 for (l = drvc->instances; l; l = l->next) {
39cfdd75
BV
233 if (!(sdi = l->data)) {
234 /* Log error, but continue cleaning up the rest. */
e98b7f1b 235 sr_err("%s: sdi was NULL, continuing", __func__);
39cfdd75
BV
236 continue;
237 }
269971dd 238 if (!(devc = sdi->priv)) {
39cfdd75 239 /* Log error, but continue cleaning up the rest. */
e98b7f1b 240 sr_err("%s: sdi->priv was NULL, continuing", __func__);
39cfdd75
BV
241 continue;
242 }
243 dso_close(sdi);
269971dd
BV
244 sr_usb_dev_inst_free(devc->usb);
245 g_free(devc->triggersource);
39cfdd75
BV
246
247 sr_dev_inst_free(sdi);
248 }
249
269971dd
BV
250 g_slist_free(drvc->instances);
251 drvc->instances = NULL;
39cfdd75 252
811deee4 253 return SR_OK;
39cfdd75
BV
254}
255
34f06b90 256static int hw_init(struct sr_context *sr_ctx)
61136ea6 257{
269971dd
BV
258 struct drv_context *drvc;
259
260 if (!(drvc = g_try_malloc0(sizeof(struct drv_context)))) {
e98b7f1b 261 sr_err("Driver context malloc failed.");
886a52b6 262 return SR_ERR_MALLOC;
269971dd 263 }
61136ea6 264
1ebe4b4e 265 drvc->sr_ctx = sr_ctx;
269971dd
BV
266 hdi->priv = drvc;
267
61136ea6
BV
268 return SR_OK;
269}
270
39cfdd75 271static GSList *hw_scan(GSList *options)
3b533202
BV
272{
273 struct sr_dev_inst *sdi;
62bb8840 274 const struct dso_profile *prof;
269971dd
BV
275 struct drv_context *drvc;
276 struct dev_context *devc;
39cfdd75
BV
277 GSList *devices;
278 struct libusb_device_descriptor des;
3b533202 279 libusb_device **devlist;
61136ea6 280 int devcnt, ret, i, j;
3b533202 281
39cfdd75 282 (void)options;
e98b7f1b 283
3b533202 284 devcnt = 0;
39cfdd75 285 devices = 0;
269971dd
BV
286 drvc = hdi->priv;
287 drvc->instances = NULL;
39cfdd75
BV
288
289 clear_instances();
290
291 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 292 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 293 for (i = 0; devlist[i]; i++) {
61136ea6 294 if ((ret = libusb_get_device_descriptor(devlist[i], &des))) {
e98b7f1b 295 sr_err("Failed to get device descriptor: %d.", ret);
3b533202
BV
296 continue;
297 }
298
299 prof = NULL;
300 for (j = 0; dev_profiles[j].orig_vid; j++) {
301 if (des.idVendor == dev_profiles[j].orig_vid
302 && des.idProduct == dev_profiles[j].orig_pid) {
303 /* Device matches the pre-firmware profile. */
304 prof = &dev_profiles[j];
e98b7f1b 305 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
3b533202 306 sdi = dso_dev_new(devcnt, prof);
39cfdd75 307 devices = g_slist_append(devices, sdi);
269971dd 308 devc = sdi->priv;
3b533202
BV
309 if (ezusb_upload_firmware(devlist[i], USB_CONFIGURATION,
310 prof->firmware) == SR_OK)
311 /* Remember when the firmware on this device was updated */
269971dd 312 devc->fw_updated = g_get_monotonic_time();
3b533202 313 else
e98b7f1b
UH
314 sr_err("Firmware upload failed for "
315 "device %d.", devcnt);
3b533202 316 /* Dummy USB address of 0xff will get overwritten later. */
269971dd 317 devc->usb = sr_usb_dev_inst_new(
3b533202
BV
318 libusb_get_bus_number(devlist[i]), 0xff, NULL);
319 devcnt++;
320 break;
321 } else if (des.idVendor == dev_profiles[j].fw_vid
322 && des.idProduct == dev_profiles[j].fw_pid) {
323 /* Device matches the post-firmware profile. */
324 prof = &dev_profiles[j];
e98b7f1b 325 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
3b533202
BV
326 sdi = dso_dev_new(devcnt, prof);
327 sdi->status = SR_ST_INACTIVE;
39cfdd75 328 devices = g_slist_append(devices, sdi);
269971dd
BV
329 devc = sdi->priv;
330 devc->usb = sr_usb_dev_inst_new(
3b533202
BV
331 libusb_get_bus_number(devlist[i]),
332 libusb_get_device_address(devlist[i]), NULL);
333 devcnt++;
334 break;
335 }
336 }
337 if (!prof)
338 /* not a supported VID/PID */
339 continue;
340 }
341 libusb_free_device_list(devlist, 1);
342
39cfdd75 343 return devices;
3b533202
BV
344}
345
811deee4
BV
346static GSList *hw_dev_list(void)
347{
348 struct drv_context *drvc;
349
350 drvc = hdi->priv;
351
352 return drvc->instances;
353}
354
25a0f108 355static int hw_dev_open(struct sr_dev_inst *sdi)
3b533202 356{
269971dd 357 struct dev_context *devc;
fc8fe3e3
BV
358 int64_t timediff_us, timediff_ms;
359 int err;
3b533202 360
269971dd 361 devc = sdi->priv;
3b533202
BV
362
363 /*
e98b7f1b
UH
364 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
365 * for the FX2 to renumerate.
3b533202 366 */
fc8fe3e3 367 err = SR_ERR;
269971dd 368 if (devc->fw_updated > 0) {
e98b7f1b
UH
369 sr_info("Waiting for device to reset.");
370 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 371 g_usleep(300 * 1000);
fc8fe3e3
BV
372 timediff_ms = 0;
373 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 374 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
375 break;
376 g_usleep(100 * 1000);
269971dd 377 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 378 timediff_ms = timediff_us / 1000;
e98b7f1b 379 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 380 }
e98b7f1b 381 sr_info("Device came back after %d ms.", timediff_ms);
3b533202 382 } else {
25a0f108 383 err = dso_open(sdi);
3b533202
BV
384 }
385
386 if (err != SR_OK) {
e98b7f1b 387 sr_err("Unable to open device.");
3b533202
BV
388 return SR_ERR;
389 }
390
269971dd 391 err = libusb_claim_interface(devc->usb->devhdl, USB_INTERFACE);
3b533202 392 if (err != 0) {
e98b7f1b 393 sr_err("Unable to claim interface: %d.", err);
3b533202
BV
394 return SR_ERR;
395 }
396
397 return SR_OK;
398}
399
25a0f108 400static int hw_dev_close(struct sr_dev_inst *sdi)
3b533202 401{
3b533202
BV
402 dso_close(sdi);
403
404 return SR_OK;
405}
406
407static int hw_cleanup(void)
408{
269971dd
BV
409 struct drv_context *drvc;
410
411 if (!(drvc = hdi->priv))
412 return SR_OK;
3b533202 413
39cfdd75 414 clear_instances();
3b533202 415
3b533202
BV
416 return SR_OK;
417}
418
0b79bcbb 419static int hw_info_get(int info_id, const void **data,
e98b7f1b 420 const struct sr_dev_inst *sdi)
3b533202 421{
3b533202
BV
422 uint64_t tmp;
423
6f57fd96
BV
424 (void)sdi;
425
0b79bcbb 426 switch (info_id) {
2ce9f046
BV
427 case SR_DI_HWCAPS:
428 *data = hwcaps;
429 break;
3b533202 430 case SR_DI_NUM_PROBES:
0b79bcbb 431 *data = GINT_TO_POINTER(NUM_PROBES);
3b533202
BV
432 break;
433 case SR_DI_PROBE_NAMES:
0b79bcbb 434 *data = probe_names;
3b533202 435 break;
a370ef19 436 case SR_DI_BUFFERSIZES:
0b79bcbb 437 *data = buffersizes;
a370ef19
BV
438 break;
439 case SR_DI_TIMEBASES:
0b79bcbb 440 *data = timebases;
a370ef19
BV
441 break;
442 case SR_DI_TRIGGER_SOURCES:
0b79bcbb 443 *data = trigger_sources;
a370ef19 444 break;
ebb781a6 445 case SR_DI_FILTERS:
0b79bcbb 446 *data = filter_targets;
ebb781a6 447 break;
313deed2 448 case SR_DI_VDIVS:
0b79bcbb 449 *data = vdivs;
313deed2 450 break;
4a090d72 451 case SR_DI_COUPLING:
0b79bcbb 452 *data = coupling;
4a090d72 453 break;
3b533202
BV
454 /* TODO remove this */
455 case SR_DI_CUR_SAMPLERATE:
0b79bcbb 456 *data = &tmp;
3b533202 457 break;
b0c8d7ac
BV
458 default:
459 return SR_ERR_ARG;
3b533202
BV
460 }
461
0b79bcbb 462 return SR_OK;
3b533202
BV
463}
464
6f4b1868 465static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
e98b7f1b 466 const void *value)
3b533202 467{
269971dd 468 struct dev_context *devc;
a370ef19
BV
469 struct sr_rational tmp_rat;
470 float tmp_float;
471 uint64_t tmp_u64;
472 int ret, i;
4a090d72 473 char **targets;
3b533202 474
3b533202
BV
475 if (sdi->status != SR_ST_ACTIVE)
476 return SR_ERR;
477
a370ef19 478 ret = SR_OK;
269971dd 479 devc = sdi->priv;
3b533202 480 switch (hwcap) {
ae88b97b 481 case SR_HWCAP_LIMIT_FRAMES:
269971dd 482 devc->limit_frames = *(const uint64_t *)value;
ae88b97b 483 break;
a370ef19 484 case SR_HWCAP_TRIGGER_SLOPE:
62bb8840 485 tmp_u64 = *(const int *)value;
a370ef19
BV
486 if (tmp_u64 != SLOPE_NEGATIVE && tmp_u64 != SLOPE_POSITIVE)
487 ret = SR_ERR_ARG;
269971dd 488 devc->triggerslope = tmp_u64;
a370ef19
BV
489 break;
490 case SR_HWCAP_HORIZ_TRIGGERPOS:
62bb8840 491 tmp_float = *(const float *)value;
a370ef19 492 if (tmp_float < 0.0 || tmp_float > 1.0) {
e98b7f1b 493 sr_err("Trigger position should be between 0.0 and 1.0.");
3b533202 494 ret = SR_ERR_ARG;
a370ef19 495 } else
269971dd 496 devc->triggerposition = tmp_float;
a370ef19
BV
497 break;
498 case SR_HWCAP_BUFFERSIZE:
62bb8840 499 tmp_u64 = *(const int *)value;
a370ef19
BV
500 for (i = 0; buffersizes[i]; i++) {
501 if (buffersizes[i] == tmp_u64) {
269971dd 502 devc->framesize = tmp_u64;
a370ef19
BV
503 break;
504 }
505 }
506 if (buffersizes[i] == 0)
507 ret = SR_ERR_ARG;
508 break;
509 case SR_HWCAP_TIMEBASE:
62bb8840 510 tmp_rat = *(const struct sr_rational *)value;
a370ef19
BV
511 for (i = 0; timebases[i].p && timebases[i].q; i++) {
512 if (timebases[i].p == tmp_rat.p
513 && timebases[i].q == tmp_rat.q) {
269971dd 514 devc->timebase = i;
a370ef19
BV
515 break;
516 }
517 }
518 if (timebases[i].p == 0 && timebases[i].q == 0)
519 ret = SR_ERR_ARG;
520 break;
521 case SR_HWCAP_TRIGGER_SOURCE:
a370ef19 522 for (i = 0; trigger_sources[i]; i++) {
4a090d72 523 if (!strcmp(value, trigger_sources[i])) {
269971dd 524 devc->triggersource = g_strdup(value);
a370ef19
BV
525 break;
526 }
527 }
528 if (trigger_sources[i] == 0)
529 ret = SR_ERR_ARG;
530 break;
ebb781a6 531 case SR_HWCAP_FILTER:
269971dd 532 devc->filter_ch1 = devc->filter_ch2 = devc->filter_trigger = 0;
ebb781a6
BV
533 targets = g_strsplit(value, ",", 0);
534 for (i = 0; targets[i]; i++) {
535 if (targets[i] == '\0')
536 /* Empty filter string can be used to clear them all. */
537 ;
538 else if (!strcmp(targets[i], "CH1"))
269971dd 539 devc->filter_ch1 = TRUE;
ebb781a6 540 else if (!strcmp(targets[i], "CH2"))
269971dd 541 devc->filter_ch2 = TRUE;
ebb781a6 542 else if (!strcmp(targets[i], "TRIGGER"))
269971dd 543 devc->filter_trigger = TRUE;
ebb781a6 544 else {
e98b7f1b 545 sr_err("Invalid filter target %s.", targets[i]);
ebb781a6
BV
546 ret = SR_ERR_ARG;
547 }
548 }
549 g_strfreev(targets);
550 break;
313deed2 551 case SR_HWCAP_VDIV:
e98b7f1b 552 /* TODO: Not supporting vdiv per channel yet. */
62bb8840 553 tmp_rat = *(const struct sr_rational *)value;
313deed2
BV
554 for (i = 0; vdivs[i].p && vdivs[i].q; i++) {
555 if (vdivs[i].p == tmp_rat.p
556 && vdivs[i].q == tmp_rat.q) {
269971dd
BV
557 devc->voltage_ch1 = i;
558 devc->voltage_ch2 = i;
313deed2
BV
559 break;
560 }
561 }
562 if (vdivs[i].p == 0 && vdivs[i].q == 0)
563 ret = SR_ERR_ARG;
564 break;
b58fbd99 565 case SR_HWCAP_COUPLING:
e98b7f1b 566 /* TODO: Not supporting coupling per channel yet. */
b58fbd99 567 for (i = 0; coupling[i]; i++) {
4a090d72 568 if (!strcmp(value, coupling[i])) {
269971dd
BV
569 devc->coupling_ch1 = i;
570 devc->coupling_ch2 = i;
b58fbd99
BV
571 break;
572 }
573 }
574 if (coupling[i] == 0)
575 ret = SR_ERR_ARG;
576 break;
3b533202
BV
577 default:
578 ret = SR_ERR_ARG;
e98b7f1b 579 break;
3b533202
BV
580 }
581
582 return ret;
583}
584
269971dd 585static void send_chunk(struct dev_context *devc, unsigned char *buf,
e749a8cb 586 int num_samples)
3b533202
BV
587{
588 struct sr_datafeed_packet packet;
589 struct sr_datafeed_analog analog;
c5841b28 590 float ch1, ch2, range;
6e71ef3b 591 int num_probes, data_offset, i;
3b533202 592
269971dd 593 num_probes = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
3b533202
BV
594 packet.type = SR_DF_ANALOG;
595 packet.payload = &analog;
6e71ef3b 596 /* TODO: support for 5xxx series 9-bit samples */
e749a8cb 597 analog.num_samples = num_samples;
9956f285
UH
598 analog.mq = SR_MQ_VOLTAGE;
599 analog.unit = SR_UNIT_VOLT;
886a52b6 600 /* TODO: Check malloc return value. */
6e71ef3b
BV
601 analog.data = g_try_malloc(analog.num_samples * sizeof(float) * num_probes);
602 data_offset = 0;
3b533202 603 for (i = 0; i < analog.num_samples; i++) {
e98b7f1b
UH
604 /*
605 * The device always sends data for both channels. If a channel
6e71ef3b 606 * is disabled, it contains a copy of the enabled channel's
e98b7f1b
UH
607 * data. However, we only send the requested channels to
608 * the bus.
c5841b28 609 *
e98b7f1b
UH
610 * Voltage values are encoded as a value 0-255 (0-512 on the
611 * DSO-5200*), where the value is a point in the range
612 * represented by the vdiv setting. There are 8 vertical divs,
613 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
614 * and 255 = +2V.
6e71ef3b 615 */
e98b7f1b 616 /* TODO: Support for DSO-5xxx series 9-bit samples. */
269971dd
BV
617 if (devc->ch1_enabled) {
618 range = ((float)vdivs[devc->voltage_ch1].p / vdivs[devc->voltage_ch1].q) * 8;
e749a8cb 619 ch1 = range / 255 * *(buf + i * 2 + 1);
c5841b28
BV
620 /* Value is centered around 0V. */
621 ch1 -= range / 2;
6e71ef3b
BV
622 analog.data[data_offset++] = ch1;
623 }
269971dd
BV
624 if (devc->ch2_enabled) {
625 range = ((float)vdivs[devc->voltage_ch2].p / vdivs[devc->voltage_ch2].q) * 8;
e749a8cb 626 ch2 = range / 255 * *(buf + i * 2);
c5841b28 627 ch2 -= range / 2;
6e71ef3b
BV
628 analog.data[data_offset++] = ch2;
629 }
3b533202 630 }
269971dd 631 sr_session_send(devc->cb_data, &packet);
e749a8cb
BV
632}
633
e98b7f1b
UH
634/*
635 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 636 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 637 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
638 * the libsigrok session bus.
639 */
640static void receive_transfer(struct libusb_transfer *transfer)
641{
642 struct sr_datafeed_packet packet;
269971dd 643 struct dev_context *devc;
e749a8cb
BV
644 int num_samples, pre;
645
269971dd 646 devc = transfer->user_data;
e98b7f1b
UH
647 sr_dbg("receive_transfer(): status %d received %d bytes.",
648 transfer->status, transfer->actual_length);
e749a8cb
BV
649
650 if (transfer->actual_length == 0)
651 /* Nothing to send to the bus. */
652 return;
653
654 num_samples = transfer->actual_length / 2;
655
e98b7f1b
UH
656 sr_dbg("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
657 devc->samp_received + num_samples, devc->framesize);
e749a8cb 658
e98b7f1b
UH
659 /*
660 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
661 * doesn't represent the trigger point. The offset at which the trigger
662 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
663 * from there up the session bus. The samples in the frame buffer
664 * before that trigger point came after the end of the device's frame
665 * buffer was reached, and it wrapped around to overwrite up until the
666 * trigger point.
e749a8cb 667 */
269971dd 668 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 669 /* Trigger point not yet reached. */
269971dd 670 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 671 /* The entire chunk is before the trigger point. */
269971dd 672 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 673 transfer->buffer, num_samples * 2);
269971dd 674 devc->samp_buffered += num_samples;
e749a8cb 675 } else {
e98b7f1b
UH
676 /*
677 * This chunk hits or overruns the trigger point.
e749a8cb 678 * Store the part before the trigger fired, and
e98b7f1b
UH
679 * send the rest up to the session bus.
680 */
269971dd
BV
681 pre = devc->trigger_offset - devc->samp_received;
682 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 683 transfer->buffer, pre * 2);
269971dd 684 devc->samp_buffered += pre;
e749a8cb
BV
685
686 /* The rest of this chunk starts with the trigger point. */
e98b7f1b
UH
687 sr_dbg("Reached trigger point, %d samples buffered.",
688 devc->samp_buffered);
e749a8cb
BV
689
690 /* Avoid the corner case where the chunk ended at
691 * exactly the trigger point. */
692 if (num_samples > pre)
269971dd 693 send_chunk(devc, transfer->buffer + pre * 2,
e749a8cb
BV
694 num_samples - pre);
695 }
696 } else {
697 /* Already past the trigger point, just send it all out. */
269971dd 698 send_chunk(devc, transfer->buffer,
e749a8cb
BV
699 num_samples);
700 }
701
269971dd 702 devc->samp_received += num_samples;
e749a8cb
BV
703
704 /* Everything in this transfer was either copied to the buffer or
705 * sent to the session bus. */
3b533202
BV
706 g_free(transfer->buffer);
707 libusb_free_transfer(transfer);
3b533202 708
269971dd 709 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
710 /* That was the last chunk in this frame. Send the buffered
711 * pre-trigger samples out now, in one big chunk. */
e98b7f1b
UH
712 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
713 devc->samp_buffered);
269971dd 714 send_chunk(devc, devc->framebuf, devc->samp_buffered);
e749a8cb
BV
715
716 /* Mark the end of this frame. */
ae88b97b 717 packet.type = SR_DF_FRAME_END;
269971dd 718 sr_session_send(devc->cb_data, &packet);
ae88b97b 719
269971dd 720 if (devc->limit_frames && ++devc->num_frames == devc->limit_frames) {
ae88b97b 721 /* Terminate session */
a3508e33 722 devc->dev_state = STOPPING;
ae88b97b 723 } else {
269971dd 724 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
725 }
726 }
3b533202
BV
727}
728
729static int handle_event(int fd, int revents, void *cb_data)
730{
a3508e33 731 const struct sr_dev_inst *sdi;
ae88b97b 732 struct sr_datafeed_packet packet;
3b533202 733 struct timeval tv;
269971dd 734 struct dev_context *devc;
d4abb463 735 struct drv_context *drvc = hdi->priv;
a3508e33
BV
736 const struct libusb_pollfd **lupfd;
737 int num_probes, i;
6e6eeff4
BV
738 uint32_t trigger_offset;
739 uint8_t capturestate;
3b533202 740
3b533202
BV
741 (void)fd;
742 (void)revents;
743
269971dd
BV
744 sdi = cb_data;
745 devc = sdi->priv;
a3508e33
BV
746 if (devc->dev_state == STOPPING) {
747 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
748 sr_dbg("Stopping acquisition.");
749 /*
750 * TODO: Doesn't really cancel pending transfers so they might
751 * come in after SR_DF_END is sent.
752 */
d4abb463 753 lupfd = libusb_get_pollfds(drvc->sr_ctx->libusb_ctx);
a3508e33
BV
754 for (i = 0; lupfd[i]; i++)
755 sr_source_remove(lupfd[i]->fd);
756 free(lupfd);
757
758 packet.type = SR_DF_END;
759 sr_session_send(sdi, &packet);
760
761 devc->dev_state = IDLE;
762
763 return TRUE;
764 }
765
3b533202
BV
766 /* Always handle pending libusb events. */
767 tv.tv_sec = tv.tv_usec = 0;
d4abb463 768 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 769
3b533202 770 /* TODO: ugh */
269971dd
BV
771 if (devc->dev_state == NEW_CAPTURE) {
772 if (dso_capture_start(devc) != SR_OK)
3b533202 773 return TRUE;
269971dd 774 if (dso_enable_trigger(devc) != SR_OK)
3b533202 775 return TRUE;
269971dd 776// if (dso_force_trigger(devc) != SR_OK)
a370ef19 777// return TRUE;
e98b7f1b 778 sr_dbg("Successfully requested next chunk.");
269971dd 779 devc->dev_state = CAPTURE;
3b533202
BV
780 return TRUE;
781 }
269971dd 782 if (devc->dev_state != CAPTURE)
3b533202
BV
783 return TRUE;
784
269971dd 785 if ((dso_get_capturestate(devc, &capturestate, &trigger_offset)) != SR_OK)
3b533202 786 return TRUE;
3b533202 787
e98b7f1b
UH
788 sr_dbg("Capturestate %d.", capturestate);
789 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
790 switch (capturestate) {
791 case CAPTURE_EMPTY:
269971dd
BV
792 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
793 devc->capture_empty_count = 0;
794 if (dso_capture_start(devc) != SR_OK)
3b533202 795 break;
269971dd 796 if (dso_enable_trigger(devc) != SR_OK)
3b533202 797 break;
269971dd 798// if (dso_force_trigger(devc) != SR_OK)
a370ef19 799// break;
e98b7f1b 800 sr_dbg("Successfully requested next chunk.");
3b533202
BV
801 }
802 break;
803 case CAPTURE_FILLING:
e98b7f1b 804 /* No data yet. */
3b533202
BV
805 break;
806 case CAPTURE_READY_8BIT:
e749a8cb 807 /* Remember where in the captured frame the trigger is. */
269971dd 808 devc->trigger_offset = trigger_offset;
e749a8cb 809
269971dd 810 num_probes = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
886a52b6 811 /* TODO: Check malloc return value. */
269971dd
BV
812 devc->framebuf = g_try_malloc(devc->framesize * num_probes * 2);
813 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 814
3b533202 815 /* Tell the scope to send us the first frame. */
269971dd 816 if (dso_get_channeldata(devc, receive_transfer) != SR_OK)
3b533202 817 break;
ae88b97b 818
e98b7f1b
UH
819 /*
820 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
821 * the data we just told the scope to send.
822 */
269971dd 823 devc->dev_state = FETCH_DATA;
ae88b97b
BV
824
825 /* Tell the frontend a new frame is on the way. */
826 packet.type = SR_DF_FRAME_BEGIN;
269971dd 827 sr_session_send(sdi, &packet);
3b533202
BV
828 break;
829 case CAPTURE_READY_9BIT:
830 /* TODO */
e98b7f1b 831 sr_err("Not yet supported.");
3b533202
BV
832 break;
833 case CAPTURE_TIMEOUT:
834 /* Doesn't matter, we'll try again next time. */
835 break;
836 default:
e98b7f1b
UH
837 sr_dbg("Unknown capture state: %d.", capturestate);
838 break;
3b533202
BV
839 }
840
841 return TRUE;
842}
843
3ffb6964 844static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
e98b7f1b 845 void *cb_data)
3b533202
BV
846{
847 const struct libusb_pollfd **lupfd;
848 struct sr_datafeed_packet packet;
849 struct sr_datafeed_header header;
850 struct sr_datafeed_meta_analog meta;
269971dd 851 struct dev_context *devc;
d4abb463 852 struct drv_context *drvc = hdi->priv;
3b533202
BV
853 int i;
854
3b533202
BV
855 if (sdi->status != SR_ST_ACTIVE)
856 return SR_ERR;
857
269971dd
BV
858 devc = sdi->priv;
859 devc->cb_data = cb_data;
3b533202 860
014359e3 861 if (configure_probes(sdi) != SR_OK) {
e98b7f1b 862 sr_err("Failed to configure probes.");
014359e3
BV
863 return SR_ERR;
864 }
865
269971dd 866 if (dso_init(devc) != SR_OK)
3b533202
BV
867 return SR_ERR;
868
269971dd 869 if (dso_capture_start(devc) != SR_OK)
3b533202
BV
870 return SR_ERR;
871
269971dd 872 devc->dev_state = CAPTURE;
d4abb463 873 lupfd = libusb_get_pollfds(drvc->sr_ctx->libusb_ctx);
3b533202 874 for (i = 0; lupfd[i]; i++)
e98b7f1b
UH
875 sr_source_add(lupfd[i]->fd, lupfd[i]->events, TICK,
876 handle_event, (void *)sdi);
3b533202
BV
877 free(lupfd);
878
879 /* Send header packet to the session bus. */
880 packet.type = SR_DF_HEADER;
881 packet.payload = (unsigned char *)&header;
882 header.feed_version = 1;
883 gettimeofday(&header.starttime, NULL);
884 sr_session_send(cb_data, &packet);
885
886 /* Send metadata about the SR_DF_ANALOG packets to come. */
887 packet.type = SR_DF_META_ANALOG;
888 packet.payload = &meta;
88a13f30 889 meta.num_probes = NUM_PROBES;
3b533202
BV
890 sr_session_send(cb_data, &packet);
891
892 return SR_OK;
893}
894
69b07d14 895static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
3b533202 896{
269971dd
BV
897 struct dev_context *devc;
898
899 (void)cb_data;
3b533202 900
3b533202
BV
901 if (sdi->status != SR_ST_ACTIVE)
902 return SR_ERR;
903
a3508e33
BV
904 devc = sdi->priv;
905 devc->dev_state = STOPPING;
3b533202
BV
906
907 return SR_OK;
908}
909
62bb8840 910SR_PRIV struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
911 .name = "hantek-dso",
912 .longname = "Hantek DSO",
913 .api_version = 1,
914 .init = hw_init,
915 .cleanup = hw_cleanup,
61136ea6 916 .scan = hw_scan,
811deee4
BV
917 .dev_list = hw_dev_list,
918 .dev_clear = clear_instances,
3b533202
BV
919 .dev_open = hw_dev_open,
920 .dev_close = hw_dev_close,
0b79bcbb 921 .info_get = hw_info_get,
3b533202 922 .dev_config_set = hw_dev_config_set,
62bb8840
UH
923 .dev_acquisition_start = hw_dev_acquisition_start,
924 .dev_acquisition_stop = hw_dev_acquisition_stop,
269971dd 925 .priv = NULL,
3b533202 926};