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7a396ff5 GS |
1 | /* |
2 | * This file is part of the libsigrok project. | |
3 | * | |
4 | * Copyright (C) 2018 Gerhard Sittig <gerhard.sittig@gmx.net> | |
5 | * | |
6 | * This program is free software: you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation, either version 3 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
3cdad416 | 20 | #include <string.h> |
7a396ff5 GS |
21 | #include "protocol.h" |
22 | ||
0617bb5a GS |
23 | static struct sr_dev_driver scpi_dmm_driver_info; |
24 | ||
3cdad416 GS |
25 | static const uint32_t scanopts[] = { |
26 | SR_CONF_CONN, | |
31e65c62 | 27 | SR_CONF_SERIALCOMM, |
3cdad416 GS |
28 | }; |
29 | ||
30 | static const uint32_t drvopts[] = { | |
31 | SR_CONF_MULTIMETER, | |
32 | }; | |
33 | ||
1d2f9963 | 34 | static const uint32_t devopts_generic[] = { |
3cdad416 GS |
35 | SR_CONF_CONTINUOUS, |
36 | SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET, | |
37 | SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET, | |
38 | SR_CONF_MEASURED_QUANTITY | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
39 | }; | |
40 | ||
41 | static const struct scpi_command cmdset_agilent[] = { | |
42 | { DMM_CMD_SETUP_REMOTE, "\n", }, | |
43 | { DMM_CMD_SETUP_FUNC, "CONF:%s", }, | |
44 | { DMM_CMD_QUERY_FUNC, "CONF?", }, | |
45 | { DMM_CMD_START_ACQ, "MEAS", }, | |
46 | { DMM_CMD_STOP_ACQ, "ABORT", }, | |
47 | { DMM_CMD_QUERY_VALUE, "READ?", }, | |
48 | { DMM_CMD_QUERY_PREC, "CONF?", }, | |
49 | ALL_ZERO, | |
50 | }; | |
51 | ||
a1619831 | 52 | /* |
1c8110db | 53 | * cmdset_hp is used for the 34401A, which was added to this code after the |
a1619831 AG |
54 | * 34405A and 34465A. It differs in starting the measurement with INIT: using |
55 | * MEAS without a trailing '?' (as used for the 34405A) is not valid for the | |
1c8110db FS |
56 | * 34401A and gives an error. |
57 | * I'm surprised the same instruction sequence doesn't work and INIT may | |
58 | * work for both, but I don't have the others to re-test. | |
a1619831 | 59 | * |
85cff5cf MW |
60 | * cmdset_hp also works well for the 34410A, using cmdset_agilent throws an |
61 | * error on 'MEAS' without a '?'. | |
62 | * | |
1c8110db FS |
63 | * On the 34401A, |
64 | * MEAS <optional parameters> ? configures, arms, triggers and waits | |
a1619831 AG |
65 | * for a reading |
66 | * CONF <parameters> configures | |
1c8110db | 67 | * INIT prepares for triggering (trigger mode is not set, assumed |
a1619831 AG |
68 | * internal - external might time out) |
69 | * *OPC waits for completion, and | |
70 | * READ? retrieves the result | |
71 | */ | |
72 | static const struct scpi_command cmdset_hp[] = { | |
73 | { DMM_CMD_SETUP_REMOTE, "\n", }, | |
74 | { DMM_CMD_SETUP_FUNC, "CONF:%s", }, | |
75 | { DMM_CMD_QUERY_FUNC, "CONF?", }, | |
76 | { DMM_CMD_START_ACQ, "INIT", }, | |
77 | { DMM_CMD_STOP_ACQ, "ABORT", }, | |
78 | { DMM_CMD_QUERY_VALUE, "READ?", }, | |
79 | { DMM_CMD_QUERY_PREC, "CONF?", }, | |
80 | ALL_ZERO, | |
81 | }; | |
82 | ||
d0b602f0 TK |
83 | static const struct scpi_command cmdset_gwinstek[] = { |
84 | { DMM_CMD_SETUP_REMOTE, "SYST:REM", }, | |
4c80a272 | 85 | { DMM_CMD_SETUP_LOCAL, "SYST:LOC", }, |
d0b602f0 TK |
86 | { DMM_CMD_SETUP_FUNC, "CONF:%s", }, |
87 | { DMM_CMD_QUERY_FUNC, "CONF:STAT:FUNC?", }, | |
88 | { DMM_CMD_START_ACQ, "*CLS;SYST:REM", }, | |
89 | { DMM_CMD_STOP_ACQ, "SYST:LOC", }, | |
90 | { DMM_CMD_QUERY_VALUE, "VAL1?", }, | |
91 | { DMM_CMD_QUERY_PREC, "SENS:DET:RATE?", }, | |
92 | ALL_ZERO, | |
93 | }; | |
94 | ||
868fc65e TK |
95 | static const struct scpi_command cmdset_gwinstek_906x[] = { |
96 | { DMM_CMD_SETUP_REMOTE, "SYST:REM", }, | |
4c80a272 | 97 | { DMM_CMD_SETUP_LOCAL, "SYST:LOC", }, |
868fc65e TK |
98 | { DMM_CMD_SETUP_FUNC, "CONF:%s", }, |
99 | { DMM_CMD_QUERY_FUNC, "CONF?", }, | |
100 | { DMM_CMD_START_ACQ, "*CLS;SYST:REM", }, | |
101 | { DMM_CMD_STOP_ACQ, "SYST:LOC", }, | |
102 | { DMM_CMD_QUERY_VALUE, "VAL1?", }, | |
103 | { DMM_CMD_QUERY_PREC, "SENS:DET:RATE?", }, | |
104 | ALL_ZERO, | |
105 | }; | |
106 | ||
64d03de1 | 107 | static const struct mqopt_item mqopts_agilent_34405a[] = { |
3cdad416 GS |
108 | { SR_MQ_VOLTAGE, SR_MQFLAG_DC, "VOLT:DC", "VOLT ", NO_DFLT_PREC, }, |
109 | { SR_MQ_VOLTAGE, SR_MQFLAG_AC, "VOLT:AC", "VOLT:AC ", NO_DFLT_PREC, }, | |
110 | { SR_MQ_CURRENT, SR_MQFLAG_DC, "CURR:DC", "CURR ", NO_DFLT_PREC, }, | |
111 | { SR_MQ_CURRENT, SR_MQFLAG_AC, "CURR:AC", "CURR:AC ", NO_DFLT_PREC, }, | |
112 | { SR_MQ_RESISTANCE, 0, "RES", "RES ", NO_DFLT_PREC, }, | |
3cdad416 GS |
113 | { SR_MQ_CONTINUITY, 0, "CONT", "CONT", -1, }, |
114 | { SR_MQ_CAPACITANCE, 0, "CAP", "CAP ", NO_DFLT_PREC, }, | |
115 | { SR_MQ_VOLTAGE, SR_MQFLAG_DC | SR_MQFLAG_DIODE, "DIOD", "DIOD", -4, }, | |
116 | { SR_MQ_TEMPERATURE, 0, "TEMP", "TEMP ", NO_DFLT_PREC, }, | |
117 | { SR_MQ_FREQUENCY, 0, "FREQ", "FREQ ", NO_DFLT_PREC, }, | |
118 | }; | |
119 | ||
a1619831 AG |
120 | static const struct mqopt_item mqopts_agilent_34401a[] = { |
121 | { SR_MQ_VOLTAGE, SR_MQFLAG_DC, "VOLT:DC", "VOLT ", NO_DFLT_PREC, }, | |
122 | { SR_MQ_VOLTAGE, SR_MQFLAG_AC, "VOLT:AC", "VOLT:AC ", NO_DFLT_PREC, }, | |
123 | { SR_MQ_CURRENT, SR_MQFLAG_DC, "CURR:DC", "CURR ", NO_DFLT_PREC, }, | |
124 | { SR_MQ_CURRENT, SR_MQFLAG_AC, "CURR:AC", "CURR:AC ", NO_DFLT_PREC, }, | |
125 | { SR_MQ_RESISTANCE, 0, "RES", "RES ", NO_DFLT_PREC, }, | |
126 | { SR_MQ_RESISTANCE, SR_MQFLAG_FOUR_WIRE, "FRES", "FRES ", NO_DFLT_PREC, }, | |
127 | { SR_MQ_CONTINUITY, 0, "CONT", "CONT", -1, }, | |
128 | { SR_MQ_VOLTAGE, SR_MQFLAG_DC | SR_MQFLAG_DIODE, "DIOD", "DIOD", -4, }, | |
129 | { SR_MQ_FREQUENCY, 0, "FREQ", "FREQ ", NO_DFLT_PREC, }, | |
130 | { SR_MQ_TIME, 0, "PER", "PER ", NO_DFLT_PREC, }, | |
131 | }; | |
132 | ||
d0b602f0 TK |
133 | static const struct mqopt_item mqopts_gwinstek_gdm8200a[] = { |
134 | { SR_MQ_VOLTAGE, SR_MQFLAG_DC, "VOLT:DC", "01", NO_DFLT_PREC, }, | |
135 | { SR_MQ_VOLTAGE, SR_MQFLAG_AC, "VOLT:AC", "02", NO_DFLT_PREC, }, | |
136 | { SR_MQ_CURRENT, SR_MQFLAG_DC, "CURR:DC", "03", NO_DFLT_PREC, }, | |
137 | { SR_MQ_CURRENT, SR_MQFLAG_AC, "CURR:AC", "04", NO_DFLT_PREC, }, | |
138 | { SR_MQ_CURRENT, SR_MQFLAG_DC, "CURR:DC", "05", NO_DFLT_PREC, }, /* mA */ | |
139 | { SR_MQ_CURRENT, SR_MQFLAG_AC, "CURR:AC", "06", NO_DFLT_PREC, }, /* mA */ | |
140 | { SR_MQ_RESISTANCE, 0, "RES", "07", NO_DFLT_PREC, }, | |
141 | { SR_MQ_RESISTANCE, SR_MQFLAG_FOUR_WIRE, "FRES", "16", NO_DFLT_PREC, }, | |
142 | { SR_MQ_CONTINUITY, 0, "CONT", "13", -1, }, | |
143 | { SR_MQ_VOLTAGE, SR_MQFLAG_DC | SR_MQFLAG_DIODE, "DIOD", "17", -4, }, | |
144 | { SR_MQ_TEMPERATURE, 0, "TEMP", "09", NO_DFLT_PREC, }, /* Celsius */ | |
145 | { SR_MQ_TEMPERATURE, 0, "TEMP", "15", NO_DFLT_PREC, }, /* Fahrenheit */ | |
146 | { SR_MQ_FREQUENCY, 0, "FREQ", "08", NO_DFLT_PREC, }, | |
147 | { SR_MQ_TIME, 0, "PER", "14", NO_DFLT_PREC, }, | |
148 | }; | |
149 | ||
868fc65e TK |
150 | static const struct mqopt_item mqopts_gwinstek_gdm906x[] = { |
151 | { SR_MQ_VOLTAGE, SR_MQFLAG_DC, "VOLT:DC", "VOLT ", NO_DFLT_PREC, }, | |
152 | { SR_MQ_VOLTAGE, SR_MQFLAG_AC, "VOLT:AC", "VOLT:AC", NO_DFLT_PREC, }, | |
153 | { SR_MQ_CURRENT, SR_MQFLAG_DC, "CURR:DC", "CURR ", NO_DFLT_PREC, }, | |
154 | { SR_MQ_CURRENT, SR_MQFLAG_AC, "CURR:AC", "CURR:AC", NO_DFLT_PREC, }, | |
155 | { SR_MQ_RESISTANCE, 0, "RES", "RES", NO_DFLT_PREC, }, | |
156 | { SR_MQ_RESISTANCE, SR_MQFLAG_FOUR_WIRE, "FRES", "FRES", NO_DFLT_PREC, }, | |
157 | { SR_MQ_CONTINUITY, 0, "CONT", "CONT", -1, }, | |
158 | { SR_MQ_VOLTAGE, SR_MQFLAG_DC | SR_MQFLAG_DIODE, "DIOD", "DIOD", -4, }, | |
159 | { SR_MQ_TEMPERATURE, 0, "TEMP", "TEMP", NO_DFLT_PREC, }, | |
160 | { SR_MQ_FREQUENCY, 0, "FREQ", "FREQ", NO_DFLT_PREC, }, | |
161 | { SR_MQ_TIME, 0, "PER", "PER", NO_DFLT_PREC, }, | |
162 | { SR_MQ_CAPACITANCE, 0, "CAP", "CAP", NO_DFLT_PREC, }, | |
163 | }; | |
164 | ||
3cdad416 GS |
165 | SR_PRIV const struct scpi_dmm_model models[] = { |
166 | { | |
167 | "Agilent", "34405A", | |
64d03de1 | 168 | 1, 5, cmdset_agilent, ARRAY_AND_SIZE(mqopts_agilent_34405a), |
3cdad416 | 169 | scpi_dmm_get_meas_agilent, |
1d2f9963 | 170 | ARRAY_AND_SIZE(devopts_generic), |
1c8110db | 171 | 0, |
3cdad416 | 172 | }, |
85cff5cf MW |
173 | { |
174 | "Agilent", "34410A", | |
175 | 1, 6, cmdset_hp, ARRAY_AND_SIZE(mqopts_agilent_34405a), | |
176 | scpi_dmm_get_meas_agilent, | |
177 | ARRAY_AND_SIZE(devopts_generic), | |
178 | 0, | |
179 | }, | |
d0b602f0 TK |
180 | { |
181 | "GW", "GDM8251A", | |
182 | 1, 6, cmdset_gwinstek, ARRAY_AND_SIZE(mqopts_gwinstek_gdm8200a), | |
183 | scpi_dmm_get_meas_gwinstek, | |
184 | ARRAY_AND_SIZE(devopts_generic), | |
185 | 1000 * 2500, | |
186 | }, | |
187 | { | |
188 | "GW", "GDM8255A", | |
189 | 1, 6, cmdset_gwinstek, ARRAY_AND_SIZE(mqopts_gwinstek_gdm8200a), | |
190 | scpi_dmm_get_meas_gwinstek, | |
191 | ARRAY_AND_SIZE(devopts_generic), | |
192 | 1000 * 2500, | |
193 | }, | |
868fc65e TK |
194 | { |
195 | "GWInstek", "GDM9060", | |
196 | 1, 6, cmdset_gwinstek_906x, ARRAY_AND_SIZE(mqopts_gwinstek_gdm906x), | |
197 | scpi_dmm_get_meas_agilent, | |
198 | ARRAY_AND_SIZE(devopts_generic), | |
199 | 0, | |
200 | }, | |
201 | { | |
202 | "GWInstek", "GDM9061", | |
203 | 1, 6, cmdset_gwinstek_906x, ARRAY_AND_SIZE(mqopts_gwinstek_gdm906x), | |
204 | scpi_dmm_get_meas_agilent, | |
205 | ARRAY_AND_SIZE(devopts_generic), | |
206 | 0, | |
207 | }, | |
25879a34 GS |
208 | { |
209 | "HP", "34401A", | |
210 | 1, 6, cmdset_hp, ARRAY_AND_SIZE(mqopts_agilent_34401a), | |
211 | scpi_dmm_get_meas_agilent, | |
212 | ARRAY_AND_SIZE(devopts_generic), | |
213 | /* 34401A: typ. 1020ms for AC readings (default is 1000ms). */ | |
214 | 1000 * 1500, | |
215 | }, | |
216 | { | |
217 | "Keysight", "34465A", | |
218 | 1, 5, cmdset_agilent, ARRAY_AND_SIZE(mqopts_agilent_34405a), | |
219 | scpi_dmm_get_meas_agilent, | |
220 | ARRAY_AND_SIZE(devopts_generic), | |
221 | 0, | |
222 | }, | |
3cdad416 GS |
223 | }; |
224 | ||
225 | static const struct scpi_dmm_model *is_compatible(const char *vendor, const char *model) | |
7a396ff5 | 226 | { |
3cdad416 GS |
227 | size_t i; |
228 | const struct scpi_dmm_model *entry; | |
229 | ||
230 | for (i = 0; i < ARRAY_SIZE(models); i++) { | |
231 | entry = &models[i]; | |
232 | if (!entry->vendor || !entry->model) | |
233 | continue; | |
234 | if (strcmp(vendor, entry->vendor) != 0) | |
235 | continue; | |
236 | if (strcmp(model, entry->model) != 0) | |
237 | continue; | |
238 | return entry; | |
239 | } | |
7a396ff5 | 240 | |
3cdad416 GS |
241 | return NULL; |
242 | } | |
7a396ff5 | 243 | |
3cdad416 GS |
244 | static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi) |
245 | { | |
246 | struct sr_scpi_hw_info *hw_info; | |
247 | int ret; | |
248 | const char *vendor; | |
249 | const struct scpi_dmm_model *model; | |
250 | struct sr_dev_inst *sdi; | |
251 | struct dev_context *devc; | |
252 | size_t i; | |
253 | gchar *channel_name; | |
4c80a272 | 254 | const char *command; |
3cdad416 | 255 | |
3cdad416 | 256 | scpi_dmm_cmd_delay(scpi); |
28877994 | 257 | ret = sr_scpi_get_hw_id(scpi, &hw_info); |
3cdad416 GS |
258 | if (ret != SR_OK) { |
259 | sr_info("Could not get IDN response."); | |
260 | return NULL; | |
261 | } | |
262 | vendor = sr_vendor_alias(hw_info->manufacturer); | |
263 | model = is_compatible(vendor, hw_info->model); | |
264 | if (!model) { | |
265 | sr_scpi_hw_info_free(hw_info); | |
266 | return NULL; | |
267 | } | |
7a396ff5 | 268 | |
3cdad416 GS |
269 | sdi = g_malloc0(sizeof(*sdi)); |
270 | sdi->vendor = g_strdup(hw_info->manufacturer); | |
271 | sdi->model = g_strdup(hw_info->model); | |
272 | sdi->version = g_strdup(hw_info->firmware_version); | |
273 | sdi->serial_num = g_strdup(hw_info->serial_number); | |
274 | sdi->conn = scpi; | |
275 | sdi->driver = &scpi_dmm_driver_info; | |
276 | sdi->inst_type = SR_INST_SCPI; | |
277 | sr_scpi_hw_info_free(hw_info); | |
1c8110db | 278 | if (model->read_timeout_us) /* non-default read timeout */ |
a1619831 | 279 | scpi->read_timeout_us = model->read_timeout_us; |
3cdad416 GS |
280 | devc = g_malloc0(sizeof(*devc)); |
281 | sdi->priv = devc; | |
282 | devc->num_channels = model->num_channels; | |
283 | devc->cmdset = model->cmdset; | |
284 | devc->model = model; | |
285 | ||
286 | for (i = 0; i < devc->num_channels; i++) { | |
287 | channel_name = g_strdup_printf("P%zu", i + 1); | |
288 | sr_channel_new(sdi, 0, SR_CHANNEL_ANALOG, TRUE, channel_name); | |
289 | } | |
290 | ||
4c80a272 TK |
291 | /* |
292 | * If device has DMM_CMD_SETUP_LOCAL command, send it now. To avoid | |
293 | * leaving device in remote mode (if only a "scan" is run). | |
294 | */ | |
295 | command = sr_scpi_cmd_get(devc->cmdset, DMM_CMD_SETUP_LOCAL); | |
296 | if (command && *command) { | |
297 | scpi_dmm_cmd_delay(scpi); | |
298 | sr_scpi_send(scpi, command); | |
299 | } | |
300 | ||
3cdad416 GS |
301 | return sdi; |
302 | } | |
7a396ff5 | 303 | |
3cdad416 GS |
304 | static GSList *scan(struct sr_dev_driver *di, GSList *options) |
305 | { | |
306 | return sr_scpi_scan(di->context, options, probe_device); | |
7a396ff5 GS |
307 | } |
308 | ||
309 | static int dev_open(struct sr_dev_inst *sdi) | |
310 | { | |
3cdad416 GS |
311 | struct sr_scpi_dev_inst *scpi; |
312 | int ret; | |
7a396ff5 | 313 | |
3cdad416 GS |
314 | scpi = sdi->conn; |
315 | ret = sr_scpi_open(scpi); | |
316 | if (ret < 0) { | |
317 | sr_err("Failed to open SCPI device: %s.", sr_strerror(ret)); | |
318 | return SR_ERR; | |
319 | } | |
7a396ff5 GS |
320 | |
321 | return SR_OK; | |
322 | } | |
323 | ||
324 | static int dev_close(struct sr_dev_inst *sdi) | |
325 | { | |
4c80a272 | 326 | struct dev_context *devc; |
3cdad416 | 327 | struct sr_scpi_dev_inst *scpi; |
4c80a272 | 328 | const char *command; |
7a396ff5 | 329 | |
4c80a272 | 330 | devc = sdi->priv; |
3cdad416 GS |
331 | scpi = sdi->conn; |
332 | if (!scpi) | |
333 | return SR_ERR_BUG; | |
7a396ff5 | 334 | |
3cdad416 GS |
335 | sr_dbg("DIAG: sdi->status %d.", sdi->status - SR_ST_NOT_FOUND); |
336 | if (sdi->status <= SR_ST_INACTIVE) | |
337 | return SR_OK; | |
338 | ||
4c80a272 TK |
339 | /* |
340 | * If device has DMM_CMD_SETUP_LOCAL command, send it now | |
341 | * to avoid leaving device in remote mode. | |
342 | */ | |
343 | command = sr_scpi_cmd_get(devc->cmdset, DMM_CMD_SETUP_LOCAL); | |
344 | if (command && *command) { | |
345 | scpi_dmm_cmd_delay(scpi); | |
346 | sr_scpi_send(scpi, command); | |
347 | } | |
348 | ||
3cdad416 | 349 | return sr_scpi_close(scpi); |
7a396ff5 GS |
350 | } |
351 | ||
352 | static int config_get(uint32_t key, GVariant **data, | |
353 | const struct sr_dev_inst *sdi, const struct sr_channel_group *cg) | |
354 | { | |
3cdad416 GS |
355 | struct dev_context *devc; |
356 | enum sr_mq mq; | |
357 | enum sr_mqflag mqflag; | |
358 | GVariant *arr[2]; | |
7a396ff5 GS |
359 | int ret; |
360 | ||
7a396ff5 GS |
361 | (void)cg; |
362 | ||
3cdad416 GS |
363 | devc = sdi->priv; |
364 | ||
7a396ff5 | 365 | switch (key) { |
3cdad416 GS |
366 | case SR_CONF_LIMIT_SAMPLES: |
367 | case SR_CONF_LIMIT_MSEC: | |
368 | return sr_sw_limits_config_get(&devc->limits, key, data); | |
369 | case SR_CONF_MEASURED_QUANTITY: | |
08f3b427 | 370 | ret = scpi_dmm_get_mq(sdi, &mq, &mqflag, NULL, NULL); |
3cdad416 GS |
371 | if (ret != SR_OK) |
372 | return ret; | |
373 | arr[0] = g_variant_new_uint32(mq); | |
374 | arr[1] = g_variant_new_uint64(mqflag); | |
375 | *data = g_variant_new_tuple(arr, ARRAY_SIZE(arr)); | |
376 | return SR_OK; | |
7a396ff5 GS |
377 | default: |
378 | return SR_ERR_NA; | |
379 | } | |
7a396ff5 GS |
380 | } |
381 | ||
382 | static int config_set(uint32_t key, GVariant *data, | |
383 | const struct sr_dev_inst *sdi, const struct sr_channel_group *cg) | |
384 | { | |
3cdad416 GS |
385 | struct dev_context *devc; |
386 | enum sr_mq mq; | |
387 | enum sr_mqflag mqflag; | |
388 | GVariant *tuple_child; | |
7a396ff5 | 389 | |
7a396ff5 GS |
390 | (void)cg; |
391 | ||
3cdad416 GS |
392 | devc = sdi->priv; |
393 | ||
7a396ff5 | 394 | switch (key) { |
3cdad416 GS |
395 | case SR_CONF_LIMIT_SAMPLES: |
396 | case SR_CONF_LIMIT_MSEC: | |
397 | return sr_sw_limits_config_set(&devc->limits, key, data); | |
398 | case SR_CONF_MEASURED_QUANTITY: | |
399 | tuple_child = g_variant_get_child_value(data, 0); | |
400 | mq = g_variant_get_uint32(tuple_child); | |
ff5fb185 | 401 | g_variant_unref(tuple_child); |
3cdad416 GS |
402 | tuple_child = g_variant_get_child_value(data, 1); |
403 | mqflag = g_variant_get_uint64(tuple_child); | |
404 | g_variant_unref(tuple_child); | |
405 | return scpi_dmm_set_mq(sdi, mq, mqflag); | |
7a396ff5 | 406 | default: |
3cdad416 | 407 | return SR_ERR_NA; |
7a396ff5 | 408 | } |
7a396ff5 GS |
409 | } |
410 | ||
411 | static int config_list(uint32_t key, GVariant **data, | |
412 | const struct sr_dev_inst *sdi, const struct sr_channel_group *cg) | |
413 | { | |
3cdad416 GS |
414 | struct dev_context *devc; |
415 | GVariant *gvar, *arr[2]; | |
416 | GVariantBuilder gvb; | |
417 | size_t i; | |
7a396ff5 | 418 | |
7a396ff5 GS |
419 | (void)cg; |
420 | ||
3cdad416 GS |
421 | devc = sdi ? sdi->priv : NULL; |
422 | ||
7a396ff5 | 423 | switch (key) { |
3cdad416 GS |
424 | case SR_CONF_SCAN_OPTIONS: |
425 | case SR_CONF_DEVICE_OPTIONS: | |
1d2f9963 GS |
426 | if (!devc) |
427 | return STD_CONFIG_LIST(key, data, sdi, cg, | |
428 | scanopts, drvopts, devopts_generic); | |
429 | return std_opts_config_list(key, data, sdi, cg, | |
430 | ARRAY_AND_SIZE(scanopts), ARRAY_AND_SIZE(drvopts), | |
431 | devc->model->devopts, devc->model->devopts_size); | |
3cdad416 GS |
432 | case SR_CONF_MEASURED_QUANTITY: |
433 | /* TODO Use std_gvar_measured_quantities() when available. */ | |
434 | if (!devc) | |
435 | return SR_ERR_ARG; | |
436 | g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY); | |
437 | for (i = 0; i < devc->model->mqopt_size; i++) { | |
438 | arr[0] = g_variant_new_uint32(devc->model->mqopts[i].mq); | |
439 | arr[1] = g_variant_new_uint64(devc->model->mqopts[i].mqflag); | |
440 | gvar = g_variant_new_tuple(arr, ARRAY_SIZE(arr)); | |
441 | g_variant_builder_add_value(&gvb, gvar); | |
442 | } | |
443 | *data = g_variant_builder_end(&gvb); | |
444 | return SR_OK; | |
7a396ff5 | 445 | default: |
3cdad416 | 446 | (void)devc; |
7a396ff5 GS |
447 | return SR_ERR_NA; |
448 | } | |
7a396ff5 GS |
449 | } |
450 | ||
451 | static int dev_acquisition_start(const struct sr_dev_inst *sdi) | |
452 | { | |
3cdad416 GS |
453 | struct sr_scpi_dev_inst *scpi; |
454 | struct dev_context *devc; | |
455 | int ret; | |
08f3b427 | 456 | const struct mqopt_item *item; |
3cdad416 | 457 | const char *command; |
d0b602f0 | 458 | char *response; |
3cdad416 GS |
459 | |
460 | scpi = sdi->conn; | |
461 | devc = sdi->priv; | |
462 | ||
463 | ret = scpi_dmm_get_mq(sdi, &devc->start_acq_mq.curr_mq, | |
08f3b427 | 464 | &devc->start_acq_mq.curr_mqflag, NULL, &item); |
3cdad416 GS |
465 | if (ret != SR_OK) |
466 | return ret; | |
467 | ||
d0b602f0 TK |
468 | /* |
469 | * Query for current precision if DMM supports the command | |
470 | */ | |
471 | command = sr_scpi_cmd_get(devc->cmdset, DMM_CMD_QUERY_PREC); | |
472 | if (command && *command) { | |
473 | scpi_dmm_cmd_delay(scpi); | |
474 | ret = sr_scpi_get_string(scpi, command, &response); | |
475 | if (ret == SR_OK) { | |
476 | g_strstrip(response); | |
33aa8117 GS |
477 | g_free(devc->precision); |
478 | devc->precision = g_strdup(response); | |
d0b602f0 TK |
479 | g_free(response); |
480 | sr_dbg("%s: Precision: '%s'", __func__, devc->precision); | |
481 | } else { | |
33aa8117 GS |
482 | sr_info("Precision query ('%s') failed: %d", |
483 | command, ret); | |
d0b602f0 TK |
484 | } |
485 | } | |
486 | ||
3cdad416 GS |
487 | command = sr_scpi_cmd_get(devc->cmdset, DMM_CMD_START_ACQ); |
488 | if (command && *command) { | |
3cdad416 | 489 | scpi_dmm_cmd_delay(scpi); |
28877994 | 490 | ret = sr_scpi_send(scpi, command); |
3cdad416 GS |
491 | if (ret != SR_OK) |
492 | return ret; | |
493 | } | |
7a396ff5 | 494 | |
3cdad416 GS |
495 | sr_sw_limits_acquisition_start(&devc->limits); |
496 | ret = std_session_send_df_header(sdi); | |
497 | if (ret != SR_OK) | |
498 | return ret; | |
499 | ||
500 | ret = sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 10, | |
501 | scpi_dmm_receive_data, (void *)sdi); | |
502 | if (ret != SR_OK) | |
503 | return ret; | |
7a396ff5 GS |
504 | |
505 | return SR_OK; | |
506 | } | |
507 | ||
508 | static int dev_acquisition_stop(struct sr_dev_inst *sdi) | |
509 | { | |
3cdad416 GS |
510 | struct sr_scpi_dev_inst *scpi; |
511 | struct dev_context *devc; | |
512 | const char *command; | |
513 | ||
514 | scpi = sdi->conn; | |
515 | devc = sdi->priv; | |
7a396ff5 | 516 | |
3cdad416 GS |
517 | command = sr_scpi_cmd_get(devc->cmdset, DMM_CMD_STOP_ACQ); |
518 | if (command && *command) { | |
3cdad416 | 519 | scpi_dmm_cmd_delay(scpi); |
28877994 | 520 | (void)sr_scpi_send(scpi, command); |
3cdad416 GS |
521 | } |
522 | sr_scpi_source_remove(sdi->session, scpi); | |
523 | ||
524 | std_session_send_df_end(sdi); | |
7a396ff5 | 525 | |
33aa8117 GS |
526 | g_free(devc->precision); |
527 | devc->precision = NULL; | |
d0b602f0 | 528 | |
7a396ff5 GS |
529 | return SR_OK; |
530 | } | |
531 | ||
0617bb5a | 532 | static struct sr_dev_driver scpi_dmm_driver_info = { |
7a396ff5 GS |
533 | .name = "scpi-dmm", |
534 | .longname = "SCPI DMM", | |
535 | .api_version = 1, | |
536 | .init = std_init, | |
537 | .cleanup = std_cleanup, | |
538 | .scan = scan, | |
539 | .dev_list = std_dev_list, | |
540 | .dev_clear = std_dev_clear, | |
541 | .config_get = config_get, | |
542 | .config_set = config_set, | |
543 | .config_list = config_list, | |
544 | .dev_open = dev_open, | |
545 | .dev_close = dev_close, | |
546 | .dev_acquisition_start = dev_acquisition_start, | |
547 | .dev_acquisition_stop = dev_acquisition_stop, | |
548 | .context = NULL, | |
549 | }; | |
7a396ff5 | 550 | SR_REGISTER_DEV_DRIVER(scpi_dmm_driver_info); |