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scpi-dmm: alpha-sort the list of supported devices (vendor/model list)
[libsigrok.git] / src / hardware / scpi-dmm / api.c
CommitLineData
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2018 Gerhard Sittig <gerhard.sittig@gmx.net>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
3cdad416 20#include <string.h>
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21#include "protocol.h"
22
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23static struct sr_dev_driver scpi_dmm_driver_info;
24
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25static const uint32_t scanopts[] = {
26 SR_CONF_CONN,
31e65c62 27 SR_CONF_SERIALCOMM,
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28};
29
30static const uint32_t drvopts[] = {
31 SR_CONF_MULTIMETER,
32};
33
1d2f9963 34static const uint32_t devopts_generic[] = {
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35 SR_CONF_CONTINUOUS,
36 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
37 SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
38 SR_CONF_MEASURED_QUANTITY | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
39};
40
41static const struct scpi_command cmdset_agilent[] = {
42 { DMM_CMD_SETUP_REMOTE, "\n", },
43 { DMM_CMD_SETUP_FUNC, "CONF:%s", },
44 { DMM_CMD_QUERY_FUNC, "CONF?", },
45 { DMM_CMD_START_ACQ, "MEAS", },
46 { DMM_CMD_STOP_ACQ, "ABORT", },
47 { DMM_CMD_QUERY_VALUE, "READ?", },
48 { DMM_CMD_QUERY_PREC, "CONF?", },
49 ALL_ZERO,
50};
51
a1619831 52/*
1c8110db 53 * cmdset_hp is used for the 34401A, which was added to this code after the
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54 * 34405A and 34465A. It differs in starting the measurement with INIT: using
55 * MEAS without a trailing '?' (as used for the 34405A) is not valid for the
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56 * 34401A and gives an error.
57 * I'm surprised the same instruction sequence doesn't work and INIT may
58 * work for both, but I don't have the others to re-test.
a1619831 59 *
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60 * cmdset_hp also works well for the 34410A, using cmdset_agilent throws an
61 * error on 'MEAS' without a '?'.
62 *
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63 * On the 34401A,
64 * MEAS <optional parameters> ? configures, arms, triggers and waits
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65 * for a reading
66 * CONF <parameters> configures
1c8110db 67 * INIT prepares for triggering (trigger mode is not set, assumed
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68 * internal - external might time out)
69 * *OPC waits for completion, and
70 * READ? retrieves the result
71 */
72static const struct scpi_command cmdset_hp[] = {
73 { DMM_CMD_SETUP_REMOTE, "\n", },
74 { DMM_CMD_SETUP_FUNC, "CONF:%s", },
75 { DMM_CMD_QUERY_FUNC, "CONF?", },
76 { DMM_CMD_START_ACQ, "INIT", },
77 { DMM_CMD_STOP_ACQ, "ABORT", },
78 { DMM_CMD_QUERY_VALUE, "READ?", },
79 { DMM_CMD_QUERY_PREC, "CONF?", },
80 ALL_ZERO,
81};
82
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83static const struct scpi_command cmdset_gwinstek[] = {
84 { DMM_CMD_SETUP_REMOTE, "SYST:REM", },
85 { DMM_CMD_SETUP_FUNC, "CONF:%s", },
86 { DMM_CMD_QUERY_FUNC, "CONF:STAT:FUNC?", },
87 { DMM_CMD_START_ACQ, "*CLS;SYST:REM", },
88 { DMM_CMD_STOP_ACQ, "SYST:LOC", },
89 { DMM_CMD_QUERY_VALUE, "VAL1?", },
90 { DMM_CMD_QUERY_PREC, "SENS:DET:RATE?", },
91 ALL_ZERO,
92};
93
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94static const struct scpi_command cmdset_gwinstek_906x[] = {
95 { DMM_CMD_SETUP_REMOTE, "SYST:REM", },
96 { DMM_CMD_SETUP_FUNC, "CONF:%s", },
97 { DMM_CMD_QUERY_FUNC, "CONF?", },
98 { DMM_CMD_START_ACQ, "*CLS;SYST:REM", },
99 { DMM_CMD_STOP_ACQ, "SYST:LOC", },
100 { DMM_CMD_QUERY_VALUE, "VAL1?", },
101 { DMM_CMD_QUERY_PREC, "SENS:DET:RATE?", },
102 ALL_ZERO,
103};
104
64d03de1 105static const struct mqopt_item mqopts_agilent_34405a[] = {
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106 { SR_MQ_VOLTAGE, SR_MQFLAG_DC, "VOLT:DC", "VOLT ", NO_DFLT_PREC, },
107 { SR_MQ_VOLTAGE, SR_MQFLAG_AC, "VOLT:AC", "VOLT:AC ", NO_DFLT_PREC, },
108 { SR_MQ_CURRENT, SR_MQFLAG_DC, "CURR:DC", "CURR ", NO_DFLT_PREC, },
109 { SR_MQ_CURRENT, SR_MQFLAG_AC, "CURR:AC", "CURR:AC ", NO_DFLT_PREC, },
110 { SR_MQ_RESISTANCE, 0, "RES", "RES ", NO_DFLT_PREC, },
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111 { SR_MQ_CONTINUITY, 0, "CONT", "CONT", -1, },
112 { SR_MQ_CAPACITANCE, 0, "CAP", "CAP ", NO_DFLT_PREC, },
113 { SR_MQ_VOLTAGE, SR_MQFLAG_DC | SR_MQFLAG_DIODE, "DIOD", "DIOD", -4, },
114 { SR_MQ_TEMPERATURE, 0, "TEMP", "TEMP ", NO_DFLT_PREC, },
115 { SR_MQ_FREQUENCY, 0, "FREQ", "FREQ ", NO_DFLT_PREC, },
116};
117
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118static const struct mqopt_item mqopts_agilent_34401a[] = {
119 { SR_MQ_VOLTAGE, SR_MQFLAG_DC, "VOLT:DC", "VOLT ", NO_DFLT_PREC, },
120 { SR_MQ_VOLTAGE, SR_MQFLAG_AC, "VOLT:AC", "VOLT:AC ", NO_DFLT_PREC, },
121 { SR_MQ_CURRENT, SR_MQFLAG_DC, "CURR:DC", "CURR ", NO_DFLT_PREC, },
122 { SR_MQ_CURRENT, SR_MQFLAG_AC, "CURR:AC", "CURR:AC ", NO_DFLT_PREC, },
123 { SR_MQ_RESISTANCE, 0, "RES", "RES ", NO_DFLT_PREC, },
124 { SR_MQ_RESISTANCE, SR_MQFLAG_FOUR_WIRE, "FRES", "FRES ", NO_DFLT_PREC, },
125 { SR_MQ_CONTINUITY, 0, "CONT", "CONT", -1, },
126 { SR_MQ_VOLTAGE, SR_MQFLAG_DC | SR_MQFLAG_DIODE, "DIOD", "DIOD", -4, },
127 { SR_MQ_FREQUENCY, 0, "FREQ", "FREQ ", NO_DFLT_PREC, },
128 { SR_MQ_TIME, 0, "PER", "PER ", NO_DFLT_PREC, },
129};
130
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131static const struct mqopt_item mqopts_gwinstek_gdm8200a[] = {
132 { SR_MQ_VOLTAGE, SR_MQFLAG_DC, "VOLT:DC", "01", NO_DFLT_PREC, },
133 { SR_MQ_VOLTAGE, SR_MQFLAG_AC, "VOLT:AC", "02", NO_DFLT_PREC, },
134 { SR_MQ_CURRENT, SR_MQFLAG_DC, "CURR:DC", "03", NO_DFLT_PREC, },
135 { SR_MQ_CURRENT, SR_MQFLAG_AC, "CURR:AC", "04", NO_DFLT_PREC, },
136 { SR_MQ_CURRENT, SR_MQFLAG_DC, "CURR:DC", "05", NO_DFLT_PREC, }, /* mA */
137 { SR_MQ_CURRENT, SR_MQFLAG_AC, "CURR:AC", "06", NO_DFLT_PREC, }, /* mA */
138 { SR_MQ_RESISTANCE, 0, "RES", "07", NO_DFLT_PREC, },
139 { SR_MQ_RESISTANCE, SR_MQFLAG_FOUR_WIRE, "FRES", "16", NO_DFLT_PREC, },
140 { SR_MQ_CONTINUITY, 0, "CONT", "13", -1, },
141 { SR_MQ_VOLTAGE, SR_MQFLAG_DC | SR_MQFLAG_DIODE, "DIOD", "17", -4, },
142 { SR_MQ_TEMPERATURE, 0, "TEMP", "09", NO_DFLT_PREC, }, /* Celsius */
143 { SR_MQ_TEMPERATURE, 0, "TEMP", "15", NO_DFLT_PREC, }, /* Fahrenheit */
144 { SR_MQ_FREQUENCY, 0, "FREQ", "08", NO_DFLT_PREC, },
145 { SR_MQ_TIME, 0, "PER", "14", NO_DFLT_PREC, },
146};
147
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148static const struct mqopt_item mqopts_gwinstek_gdm906x[] = {
149 { SR_MQ_VOLTAGE, SR_MQFLAG_DC, "VOLT:DC", "VOLT ", NO_DFLT_PREC, },
150 { SR_MQ_VOLTAGE, SR_MQFLAG_AC, "VOLT:AC", "VOLT:AC", NO_DFLT_PREC, },
151 { SR_MQ_CURRENT, SR_MQFLAG_DC, "CURR:DC", "CURR ", NO_DFLT_PREC, },
152 { SR_MQ_CURRENT, SR_MQFLAG_AC, "CURR:AC", "CURR:AC", NO_DFLT_PREC, },
153 { SR_MQ_RESISTANCE, 0, "RES", "RES", NO_DFLT_PREC, },
154 { SR_MQ_RESISTANCE, SR_MQFLAG_FOUR_WIRE, "FRES", "FRES", NO_DFLT_PREC, },
155 { SR_MQ_CONTINUITY, 0, "CONT", "CONT", -1, },
156 { SR_MQ_VOLTAGE, SR_MQFLAG_DC | SR_MQFLAG_DIODE, "DIOD", "DIOD", -4, },
157 { SR_MQ_TEMPERATURE, 0, "TEMP", "TEMP", NO_DFLT_PREC, },
158 { SR_MQ_FREQUENCY, 0, "FREQ", "FREQ", NO_DFLT_PREC, },
159 { SR_MQ_TIME, 0, "PER", "PER", NO_DFLT_PREC, },
160 { SR_MQ_CAPACITANCE, 0, "CAP", "CAP", NO_DFLT_PREC, },
161};
162
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163SR_PRIV const struct scpi_dmm_model models[] = {
164 {
165 "Agilent", "34405A",
64d03de1 166 1, 5, cmdset_agilent, ARRAY_AND_SIZE(mqopts_agilent_34405a),
3cdad416 167 scpi_dmm_get_meas_agilent,
1d2f9963 168 ARRAY_AND_SIZE(devopts_generic),
1c8110db 169 0,
3cdad416 170 },
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171 {
172 "Agilent", "34410A",
173 1, 6, cmdset_hp, ARRAY_AND_SIZE(mqopts_agilent_34405a),
174 scpi_dmm_get_meas_agilent,
175 ARRAY_AND_SIZE(devopts_generic),
176 0,
177 },
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178 {
179 "GW", "GDM8251A",
180 1, 6, cmdset_gwinstek, ARRAY_AND_SIZE(mqopts_gwinstek_gdm8200a),
181 scpi_dmm_get_meas_gwinstek,
182 ARRAY_AND_SIZE(devopts_generic),
183 1000 * 2500,
184 },
185 {
186 "GW", "GDM8255A",
187 1, 6, cmdset_gwinstek, ARRAY_AND_SIZE(mqopts_gwinstek_gdm8200a),
188 scpi_dmm_get_meas_gwinstek,
189 ARRAY_AND_SIZE(devopts_generic),
190 1000 * 2500,
191 },
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192 {
193 "GWInstek", "GDM9060",
194 1, 6, cmdset_gwinstek_906x, ARRAY_AND_SIZE(mqopts_gwinstek_gdm906x),
195 scpi_dmm_get_meas_agilent,
196 ARRAY_AND_SIZE(devopts_generic),
197 0,
198 },
199 {
200 "GWInstek", "GDM9061",
201 1, 6, cmdset_gwinstek_906x, ARRAY_AND_SIZE(mqopts_gwinstek_gdm906x),
202 scpi_dmm_get_meas_agilent,
203 ARRAY_AND_SIZE(devopts_generic),
204 0,
205 },
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206 {
207 "HP", "34401A",
208 1, 6, cmdset_hp, ARRAY_AND_SIZE(mqopts_agilent_34401a),
209 scpi_dmm_get_meas_agilent,
210 ARRAY_AND_SIZE(devopts_generic),
211 /* 34401A: typ. 1020ms for AC readings (default is 1000ms). */
212 1000 * 1500,
213 },
214 {
215 "Keysight", "34465A",
216 1, 5, cmdset_agilent, ARRAY_AND_SIZE(mqopts_agilent_34405a),
217 scpi_dmm_get_meas_agilent,
218 ARRAY_AND_SIZE(devopts_generic),
219 0,
220 },
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221};
222
223static const struct scpi_dmm_model *is_compatible(const char *vendor, const char *model)
7a396ff5 224{
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225 size_t i;
226 const struct scpi_dmm_model *entry;
227
228 for (i = 0; i < ARRAY_SIZE(models); i++) {
229 entry = &models[i];
230 if (!entry->vendor || !entry->model)
231 continue;
232 if (strcmp(vendor, entry->vendor) != 0)
233 continue;
234 if (strcmp(model, entry->model) != 0)
235 continue;
236 return entry;
237 }
7a396ff5 238
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239 return NULL;
240}
7a396ff5 241
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242static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
243{
244 struct sr_scpi_hw_info *hw_info;
245 int ret;
246 const char *vendor;
247 const struct scpi_dmm_model *model;
248 struct sr_dev_inst *sdi;
249 struct dev_context *devc;
250 size_t i;
251 gchar *channel_name;
252
3cdad416 253 scpi_dmm_cmd_delay(scpi);
28877994 254 ret = sr_scpi_get_hw_id(scpi, &hw_info);
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255 if (ret != SR_OK) {
256 sr_info("Could not get IDN response.");
257 return NULL;
258 }
259 vendor = sr_vendor_alias(hw_info->manufacturer);
260 model = is_compatible(vendor, hw_info->model);
261 if (!model) {
262 sr_scpi_hw_info_free(hw_info);
263 return NULL;
264 }
7a396ff5 265
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266 sdi = g_malloc0(sizeof(*sdi));
267 sdi->vendor = g_strdup(hw_info->manufacturer);
268 sdi->model = g_strdup(hw_info->model);
269 sdi->version = g_strdup(hw_info->firmware_version);
270 sdi->serial_num = g_strdup(hw_info->serial_number);
271 sdi->conn = scpi;
272 sdi->driver = &scpi_dmm_driver_info;
273 sdi->inst_type = SR_INST_SCPI;
274 sr_scpi_hw_info_free(hw_info);
1c8110db 275 if (model->read_timeout_us) /* non-default read timeout */
a1619831 276 scpi->read_timeout_us = model->read_timeout_us;
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277 devc = g_malloc0(sizeof(*devc));
278 sdi->priv = devc;
279 devc->num_channels = model->num_channels;
280 devc->cmdset = model->cmdset;
281 devc->model = model;
282
283 for (i = 0; i < devc->num_channels; i++) {
284 channel_name = g_strdup_printf("P%zu", i + 1);
285 sr_channel_new(sdi, 0, SR_CHANNEL_ANALOG, TRUE, channel_name);
286 }
287
288 return sdi;
289}
7a396ff5 290
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291static GSList *scan(struct sr_dev_driver *di, GSList *options)
292{
293 return sr_scpi_scan(di->context, options, probe_device);
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294}
295
296static int dev_open(struct sr_dev_inst *sdi)
297{
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298 struct sr_scpi_dev_inst *scpi;
299 int ret;
7a396ff5 300
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301 scpi = sdi->conn;
302 ret = sr_scpi_open(scpi);
303 if (ret < 0) {
304 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
305 return SR_ERR;
306 }
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307
308 return SR_OK;
309}
310
311static int dev_close(struct sr_dev_inst *sdi)
312{
3cdad416 313 struct sr_scpi_dev_inst *scpi;
7a396ff5 314
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315 scpi = sdi->conn;
316 if (!scpi)
317 return SR_ERR_BUG;
7a396ff5 318
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319 sr_dbg("DIAG: sdi->status %d.", sdi->status - SR_ST_NOT_FOUND);
320 if (sdi->status <= SR_ST_INACTIVE)
321 return SR_OK;
322
323 return sr_scpi_close(scpi);
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324}
325
326static int config_get(uint32_t key, GVariant **data,
327 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
328{
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329 struct dev_context *devc;
330 enum sr_mq mq;
331 enum sr_mqflag mqflag;
332 GVariant *arr[2];
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333 int ret;
334
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335 (void)cg;
336
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337 devc = sdi->priv;
338
7a396ff5 339 switch (key) {
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340 case SR_CONF_LIMIT_SAMPLES:
341 case SR_CONF_LIMIT_MSEC:
342 return sr_sw_limits_config_get(&devc->limits, key, data);
343 case SR_CONF_MEASURED_QUANTITY:
08f3b427 344 ret = scpi_dmm_get_mq(sdi, &mq, &mqflag, NULL, NULL);
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345 if (ret != SR_OK)
346 return ret;
347 arr[0] = g_variant_new_uint32(mq);
348 arr[1] = g_variant_new_uint64(mqflag);
349 *data = g_variant_new_tuple(arr, ARRAY_SIZE(arr));
350 return SR_OK;
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351 default:
352 return SR_ERR_NA;
353 }
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354}
355
356static int config_set(uint32_t key, GVariant *data,
357 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
358{
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359 struct dev_context *devc;
360 enum sr_mq mq;
361 enum sr_mqflag mqflag;
362 GVariant *tuple_child;
7a396ff5 363
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364 (void)cg;
365
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366 devc = sdi->priv;
367
7a396ff5 368 switch (key) {
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369 case SR_CONF_LIMIT_SAMPLES:
370 case SR_CONF_LIMIT_MSEC:
371 return sr_sw_limits_config_set(&devc->limits, key, data);
372 case SR_CONF_MEASURED_QUANTITY:
373 tuple_child = g_variant_get_child_value(data, 0);
374 mq = g_variant_get_uint32(tuple_child);
ff5fb185 375 g_variant_unref(tuple_child);
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376 tuple_child = g_variant_get_child_value(data, 1);
377 mqflag = g_variant_get_uint64(tuple_child);
378 g_variant_unref(tuple_child);
379 return scpi_dmm_set_mq(sdi, mq, mqflag);
7a396ff5 380 default:
3cdad416 381 return SR_ERR_NA;
7a396ff5 382 }
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383}
384
385static int config_list(uint32_t key, GVariant **data,
386 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
387{
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388 struct dev_context *devc;
389 GVariant *gvar, *arr[2];
390 GVariantBuilder gvb;
391 size_t i;
7a396ff5 392
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393 (void)cg;
394
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395 devc = sdi ? sdi->priv : NULL;
396
7a396ff5 397 switch (key) {
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398 case SR_CONF_SCAN_OPTIONS:
399 case SR_CONF_DEVICE_OPTIONS:
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400 if (!devc)
401 return STD_CONFIG_LIST(key, data, sdi, cg,
402 scanopts, drvopts, devopts_generic);
403 return std_opts_config_list(key, data, sdi, cg,
404 ARRAY_AND_SIZE(scanopts), ARRAY_AND_SIZE(drvopts),
405 devc->model->devopts, devc->model->devopts_size);
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406 case SR_CONF_MEASURED_QUANTITY:
407 /* TODO Use std_gvar_measured_quantities() when available. */
408 if (!devc)
409 return SR_ERR_ARG;
410 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
411 for (i = 0; i < devc->model->mqopt_size; i++) {
412 arr[0] = g_variant_new_uint32(devc->model->mqopts[i].mq);
413 arr[1] = g_variant_new_uint64(devc->model->mqopts[i].mqflag);
414 gvar = g_variant_new_tuple(arr, ARRAY_SIZE(arr));
415 g_variant_builder_add_value(&gvb, gvar);
416 }
417 *data = g_variant_builder_end(&gvb);
418 return SR_OK;
7a396ff5 419 default:
3cdad416 420 (void)devc;
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421 return SR_ERR_NA;
422 }
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423}
424
425static int dev_acquisition_start(const struct sr_dev_inst *sdi)
426{
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427 struct sr_scpi_dev_inst *scpi;
428 struct dev_context *devc;
429 int ret;
08f3b427 430 const struct mqopt_item *item;
3cdad416 431 const char *command;
d0b602f0 432 char *response;
3cdad416
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433
434 scpi = sdi->conn;
435 devc = sdi->priv;
436
437 ret = scpi_dmm_get_mq(sdi, &devc->start_acq_mq.curr_mq,
08f3b427 438 &devc->start_acq_mq.curr_mqflag, NULL, &item);
3cdad416
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439 if (ret != SR_OK)
440 return ret;
441
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442 /*
443 * Query for current precision if DMM supports the command
444 */
445 command = sr_scpi_cmd_get(devc->cmdset, DMM_CMD_QUERY_PREC);
446 if (command && *command) {
447 scpi_dmm_cmd_delay(scpi);
448 ret = sr_scpi_get_string(scpi, command, &response);
449 if (ret == SR_OK) {
450 g_strstrip(response);
33aa8117
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451 g_free(devc->precision);
452 devc->precision = g_strdup(response);
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453 g_free(response);
454 sr_dbg("%s: Precision: '%s'", __func__, devc->precision);
455 } else {
33aa8117
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456 sr_info("Precision query ('%s') failed: %d",
457 command, ret);
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458 }
459 }
460
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461 command = sr_scpi_cmd_get(devc->cmdset, DMM_CMD_START_ACQ);
462 if (command && *command) {
3cdad416 463 scpi_dmm_cmd_delay(scpi);
28877994 464 ret = sr_scpi_send(scpi, command);
3cdad416
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465 if (ret != SR_OK)
466 return ret;
467 }
7a396ff5 468
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469 sr_sw_limits_acquisition_start(&devc->limits);
470 ret = std_session_send_df_header(sdi);
471 if (ret != SR_OK)
472 return ret;
473
474 ret = sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 10,
475 scpi_dmm_receive_data, (void *)sdi);
476 if (ret != SR_OK)
477 return ret;
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478
479 return SR_OK;
480}
481
482static int dev_acquisition_stop(struct sr_dev_inst *sdi)
483{
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484 struct sr_scpi_dev_inst *scpi;
485 struct dev_context *devc;
486 const char *command;
487
488 scpi = sdi->conn;
489 devc = sdi->priv;
7a396ff5 490
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491 command = sr_scpi_cmd_get(devc->cmdset, DMM_CMD_STOP_ACQ);
492 if (command && *command) {
3cdad416 493 scpi_dmm_cmd_delay(scpi);
28877994 494 (void)sr_scpi_send(scpi, command);
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495 }
496 sr_scpi_source_remove(sdi->session, scpi);
497
498 std_session_send_df_end(sdi);
7a396ff5 499
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500 g_free(devc->precision);
501 devc->precision = NULL;
d0b602f0 502
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503 return SR_OK;
504}
505
0617bb5a 506static struct sr_dev_driver scpi_dmm_driver_info = {
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507 .name = "scpi-dmm",
508 .longname = "SCPI DMM",
509 .api_version = 1,
510 .init = std_init,
511 .cleanup = std_cleanup,
512 .scan = scan,
513 .dev_list = std_dev_list,
514 .dev_clear = std_dev_clear,
515 .config_get = config_get,
516 .config_set = config_set,
517 .config_list = config_list,
518 .dev_open = dev_open,
519 .dev_close = dev_close,
520 .dev_acquisition_start = dev_acquisition_start,
521 .dev_acquisition_stop = dev_acquisition_stop,
522 .context = NULL,
523};
7a396ff5 524SR_REGISTER_DEV_DRIVER(scpi_dmm_driver_info);