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f4816ac6 ML |
1 | /* |
2 | * This file is part of the libsigrok project. | |
3 | * | |
4 | * Copyright (C) 2012 Martin Ling <martin-git@earth.li> | |
88e429c9 | 5 | * Copyright (C) 2013 Bert Vermeulen <bert@biot.com> |
bafd4890 | 6 | * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de> |
f4816ac6 ML |
7 | * |
8 | * This program is free software: you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation, either version 3 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | ||
6ec6c43b | 22 | #include <config.h> |
e0b7d23c ML |
23 | #include <fcntl.h> |
24 | #include <unistd.h> | |
25 | #include <stdlib.h> | |
26 | #include <string.h> | |
ba464a12 | 27 | #include <strings.h> |
2b0e4a46 | 28 | #include <math.h> |
f4816ac6 | 29 | #include <glib.h> |
c1aae900 | 30 | #include <libsigrok/libsigrok.h> |
f4816ac6 | 31 | #include "libsigrok-internal.h" |
5a1afc09 | 32 | #include "scpi.h" |
f4816ac6 ML |
33 | #include "protocol.h" |
34 | ||
a0e0bb41 | 35 | static const uint32_t scanopts[] = { |
ca55277c | 36 | SR_CONF_CONN, |
05199c0a | 37 | SR_CONF_SERIALCOMM, |
ca55277c ML |
38 | }; |
39 | ||
d73aacf1 | 40 | static const uint32_t drvopts[] = { |
1953564a | 41 | SR_CONF_OSCILLOSCOPE, |
d73aacf1 SA |
42 | }; |
43 | ||
44 | static const uint32_t devopts[] = { | |
5827f61b | 45 | SR_CONF_LIMIT_FRAMES | SR_CONF_SET, |
86621306 | 46 | SR_CONF_SAMPLERATE | SR_CONF_GET, |
5827f61b | 47 | SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
86621306 UH |
48 | SR_CONF_NUM_HDIV | SR_CONF_GET, |
49 | SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET, | |
5827f61b | 50 | SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
b0c9d1d1 | 51 | SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
9ea62f2e | 52 | SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET, |
f579d08b | 53 | SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
f48e0249 ML |
54 | }; |
55 | ||
6b82c3e5 | 56 | static const uint32_t devopts_cg_analog[] = { |
5827f61b BV |
57 | SR_CONF_NUM_VDIV | SR_CONF_GET, |
58 | SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
59 | SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
934cf6cf | 60 | SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
e0b7d23c ML |
61 | }; |
62 | ||
f6a0ac9f | 63 | static const uint64_t timebases[][2] = { |
e0b7d23c | 64 | /* nanoseconds */ |
8e06edf5 | 65 | { 1, 1000000000 }, |
e0b7d23c ML |
66 | { 2, 1000000000 }, |
67 | { 5, 1000000000 }, | |
68 | { 10, 1000000000 }, | |
69 | { 20, 1000000000 }, | |
70 | { 50, 1000000000 }, | |
71 | { 100, 1000000000 }, | |
72 | { 500, 1000000000 }, | |
73 | /* microseconds */ | |
74 | { 1, 1000000 }, | |
75 | { 2, 1000000 }, | |
76 | { 5, 1000000 }, | |
77 | { 10, 1000000 }, | |
78 | { 20, 1000000 }, | |
79 | { 50, 1000000 }, | |
80 | { 100, 1000000 }, | |
81 | { 200, 1000000 }, | |
82 | { 500, 1000000 }, | |
83 | /* milliseconds */ | |
84 | { 1, 1000 }, | |
85 | { 2, 1000 }, | |
86 | { 5, 1000 }, | |
87 | { 10, 1000 }, | |
88 | { 20, 1000 }, | |
89 | { 50, 1000 }, | |
90 | { 100, 1000 }, | |
91 | { 200, 1000 }, | |
92 | { 500, 1000 }, | |
93 | /* seconds */ | |
94 | { 1, 1 }, | |
95 | { 2, 1 }, | |
96 | { 5, 1 }, | |
97 | { 10, 1 }, | |
98 | { 20, 1 }, | |
99 | { 50, 1 }, | |
bafd4890 ML |
100 | { 100, 1 }, |
101 | { 200, 1 }, | |
102 | { 500, 1 }, | |
8e06edf5 | 103 | { 1000, 1 }, |
e0b7d23c ML |
104 | }; |
105 | ||
f6a0ac9f | 106 | static const uint64_t vdivs[][2] = { |
bafd4890 ML |
107 | /* microvolts */ |
108 | { 500, 1000000 }, | |
e0b7d23c | 109 | /* millivolts */ |
bafd4890 | 110 | { 1, 1000 }, |
e0b7d23c ML |
111 | { 2, 1000 }, |
112 | { 5, 1000 }, | |
113 | { 10, 1000 }, | |
114 | { 20, 1000 }, | |
115 | { 50, 1000 }, | |
116 | { 100, 1000 }, | |
117 | { 200, 1000 }, | |
118 | { 500, 1000 }, | |
119 | /* volts */ | |
120 | { 1, 1 }, | |
121 | { 2, 1 }, | |
122 | { 5, 1 }, | |
123 | { 10, 1 }, | |
d50725e0 UH |
124 | { 20, 1 }, |
125 | { 50, 1 }, | |
126 | { 100, 1 }, | |
e0b7d23c ML |
127 | }; |
128 | ||
6bcc81ac VO |
129 | static const char *trigger_sources_2_chans[] = { |
130 | "CH1", "CH2", | |
131 | "EXT", "AC Line", | |
132 | "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7", | |
133 | "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15", | |
134 | }; | |
643c8824 | 135 | |
6bcc81ac | 136 | static const char *trigger_sources_4_chans[] = { |
f8195cb2 UH |
137 | "CH1", "CH2", "CH3", "CH4", |
138 | "EXT", "AC Line", | |
139 | "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7", | |
140 | "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15", | |
e0b7d23c ML |
141 | }; |
142 | ||
5d336f11 | 143 | static const char *trigger_slopes[] = { |
f8195cb2 | 144 | "r", "f", |
5d336f11 AJ |
145 | }; |
146 | ||
e0b7d23c | 147 | static const char *coupling[] = { |
f8195cb2 | 148 | "AC", "DC", "GND", |
e0b7d23c ML |
149 | }; |
150 | ||
934cf6cf | 151 | static const uint64_t probe_factor[] = { |
f8195cb2 | 152 | 1, 2, 5, 10, 20, 50, 100, 200, 500, 1000, |
934cf6cf AJ |
153 | }; |
154 | ||
babab622 ML |
155 | /* Do not change the order of entries */ |
156 | static const char *data_sources[] = { | |
157 | "Live", | |
158 | "Memory", | |
159 | "Segmented", | |
160 | }; | |
161 | ||
569d4dbd ML |
162 | enum vendor { |
163 | RIGOL, | |
164 | AGILENT, | |
165 | }; | |
166 | ||
167 | enum series { | |
168 | VS5000, | |
169 | DS1000, | |
170 | DS2000, | |
171 | DS2000A, | |
172 | DSO1000, | |
702f42e8 | 173 | DS1000Z, |
569d4dbd | 174 | }; |
10afee13 | 175 | |
569d4dbd ML |
176 | /* short name, full name */ |
177 | static const struct rigol_ds_vendor supported_vendors[] = { | |
178 | [RIGOL] = {"Rigol", "Rigol Technologies"}, | |
14e1aa6d | 179 | [AGILENT] = {"Agilent", "Agilent Technologies"}, |
569d4dbd ML |
180 | }; |
181 | ||
182 | #define VENDOR(x) &supported_vendors[x] | |
0f8bee71 UH |
183 | /* vendor, series/name, protocol, data format, max timebase, min vdiv, |
184 | * number of horizontal divs, live waveform samples, memory buffer samples */ | |
569d4dbd ML |
185 | static const struct rigol_ds_series supported_series[] = { |
186 | [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW, | |
187 | {50, 1}, {2, 1000}, 14, 2048, 0}, | |
188 | [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2, | |
189 | {50, 1}, {2, 1000}, 12, 600, 1048576}, | |
190 | [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2, | |
96cb7faa | 191 | {500, 1}, {500, 1000000}, 14, 1400, 14000}, |
569d4dbd ML |
192 | [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2, |
193 | {1000, 1}, {500, 1000000}, 14, 1400, 14000}, | |
194 | [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2, | |
195 | {50, 1}, {2, 1000}, 12, 600, 20480}, | |
702f42e8 ML |
196 | [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2, |
197 | {50, 1}, {1, 1000}, 12, 1200, 12000000}, | |
569d4dbd | 198 | }; |
10afee13 | 199 | |
569d4dbd | 200 | #define SERIES(x) &supported_series[x] |
643c8824 VO |
201 | /* |
202 | * Use a macro to select the correct list of trigger sources and its length | |
203 | * based on the number of analog channels and presence of digital channels. | |
204 | */ | |
205 | #define CH_INFO(num, digital) \ | |
206 | num, digital, trigger_sources_##num##_chans, \ | |
207 | digital ? ARRAY_SIZE(trigger_sources_##num##_chans) : (num + 2) | |
569d4dbd | 208 | /* series, model, min timebase, analog channels, digital */ |
bafd4890 | 209 | static const struct rigol_ds_model supported_models[] = { |
643c8824 VO |
210 | {SERIES(VS5000), "VS5022", {20, 1000000000}, CH_INFO(2, false)}, |
211 | {SERIES(VS5000), "VS5042", {10, 1000000000}, CH_INFO(2, false)}, | |
212 | {SERIES(VS5000), "VS5062", {5, 1000000000}, CH_INFO(2, false)}, | |
213 | {SERIES(VS5000), "VS5102", {2, 1000000000}, CH_INFO(2, false)}, | |
214 | {SERIES(VS5000), "VS5202", {2, 1000000000}, CH_INFO(2, false)}, | |
215 | {SERIES(VS5000), "VS5022D", {20, 1000000000}, CH_INFO(2, true)}, | |
216 | {SERIES(VS5000), "VS5042D", {10, 1000000000}, CH_INFO(2, true)}, | |
217 | {SERIES(VS5000), "VS5062D", {5, 1000000000}, CH_INFO(2, true)}, | |
218 | {SERIES(VS5000), "VS5102D", {2, 1000000000}, CH_INFO(2, true)}, | |
219 | {SERIES(VS5000), "VS5202D", {2, 1000000000}, CH_INFO(2, true)}, | |
220 | {SERIES(DS1000), "DS1052E", {5, 1000000000}, CH_INFO(2, false)}, | |
221 | {SERIES(DS1000), "DS1102E", {2, 1000000000}, CH_INFO(2, false)}, | |
222 | {SERIES(DS1000), "DS1152E", {2, 1000000000}, CH_INFO(2, false)}, | |
223 | {SERIES(DS1000), "DS1052D", {5, 1000000000}, CH_INFO(2, true)}, | |
224 | {SERIES(DS1000), "DS1102D", {2, 1000000000}, CH_INFO(2, true)}, | |
225 | {SERIES(DS1000), "DS1152D", {2, 1000000000}, CH_INFO(2, true)}, | |
226 | {SERIES(DS2000), "DS2072", {5, 1000000000}, CH_INFO(2, false)}, | |
227 | {SERIES(DS2000), "DS2102", {5, 1000000000}, CH_INFO(2, false)}, | |
228 | {SERIES(DS2000), "DS2202", {2, 1000000000}, CH_INFO(2, false)}, | |
229 | {SERIES(DS2000), "DS2302", {1, 1000000000}, CH_INFO(2, false)}, | |
230 | {SERIES(DS2000A), "DS2072A", {5, 1000000000}, CH_INFO(2, false)}, | |
231 | {SERIES(DS2000A), "DS2102A", {5, 1000000000}, CH_INFO(2, false)}, | |
232 | {SERIES(DS2000A), "DS2202A", {2, 1000000000}, CH_INFO(2, false)}, | |
233 | {SERIES(DS2000A), "DS2302A", {1, 1000000000}, CH_INFO(2, false)}, | |
234 | {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, CH_INFO(2, true)}, | |
235 | {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, CH_INFO(2, true)}, | |
236 | {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, CH_INFO(2, true)}, | |
237 | {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, CH_INFO(2, true)}, | |
238 | {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, CH_INFO(2, false)}, | |
239 | {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, CH_INFO(4, false)}, | |
240 | {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, CH_INFO(2, false)}, | |
241 | {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, CH_INFO(4, false)}, | |
242 | {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, CH_INFO(2, false)}, | |
243 | {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, CH_INFO(4, false)}, | |
244 | {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, CH_INFO(4, false)}, | |
245 | {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, CH_INFO(4, false)}, | |
246 | {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, CH_INFO(4, false)}, | |
247 | {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, CH_INFO(4, false)}, | |
248 | {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, CH_INFO(4, false)}, | |
249 | {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, CH_INFO(4, false)}, | |
250 | {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, CH_INFO(4, false)}, | |
251 | {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, CH_INFO(4, true)}, | |
252 | {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, CH_INFO(4, true)}, | |
253 | {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, CH_INFO(4, true)}, | |
254 | {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, CH_INFO(4, true)}, | |
512bb890 BV |
255 | }; |
256 | ||
dd5c48a6 | 257 | static struct sr_dev_driver rigol_ds_driver_info; |
f4816ac6 | 258 | |
3553451f | 259 | static void clear_helper(struct dev_context *devc) |
f4816ac6 | 260 | { |
effb9dd1 | 261 | unsigned int i; |
f4816ac6 | 262 | |
babab622 ML |
263 | g_free(devc->data); |
264 | g_free(devc->buffer); | |
effb9dd1 AJ |
265 | for (i = 0; i < ARRAY_SIZE(devc->coupling); i++) |
266 | g_free(devc->coupling[i]); | |
fa85f376 UH |
267 | g_free(devc->trigger_source); |
268 | g_free(devc->trigger_slope); | |
562b7ae5 | 269 | g_free(devc->analog_groups); |
fa85f376 | 270 | } |
f4816ac6 | 271 | |
4f840ce9 | 272 | static int dev_clear(const struct sr_dev_driver *di) |
fa85f376 | 273 | { |
3553451f | 274 | return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper); |
f4816ac6 ML |
275 | } |
276 | ||
9d3ae01b | 277 | static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi) |
f4816ac6 | 278 | { |
cc9fd2d2 BV |
279 | struct dev_context *devc; |
280 | struct sr_dev_inst *sdi; | |
ae1bc1cc | 281 | struct sr_scpi_hw_info *hw_info; |
ba7dd8bb | 282 | struct sr_channel *ch; |
8dd0b290 | 283 | long n[3]; |
f6a0ac9f | 284 | unsigned int i; |
bafd4890 | 285 | const struct rigol_ds_model *model = NULL; |
569d4dbd | 286 | gchar *channel_name, **version; |
fb6e5ba8 | 287 | |
ae1bc1cc | 288 | if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) { |
05238d28 ML |
289 | sr_info("Couldn't get IDN response, retrying."); |
290 | sr_scpi_close(scpi); | |
291 | sr_scpi_open(scpi); | |
292 | if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) { | |
293 | sr_info("Couldn't get IDN response."); | |
294 | return NULL; | |
295 | } | |
ca55277c | 296 | } |
e0b7d23c | 297 | |
ca55277c | 298 | for (i = 0; i < ARRAY_SIZE(supported_models); i++) { |
34577da6 | 299 | if (!g_ascii_strcasecmp(hw_info->manufacturer, |
569d4dbd | 300 | supported_models[i].series->vendor->full_name) && |
10afee13 | 301 | !strcmp(hw_info->model, supported_models[i].name)) { |
bafd4890 | 302 | model = &supported_models[i]; |
ca55277c | 303 | break; |
fb6e5ba8 | 304 | } |
ca55277c | 305 | } |
fb6e5ba8 | 306 | |
0af636be | 307 | if (!model) { |
ae1bc1cc | 308 | sr_scpi_hw_info_free(hw_info); |
9d3ae01b | 309 | return NULL; |
ca55277c | 310 | } |
fb6e5ba8 | 311 | |
aac29cc1 | 312 | sdi = g_malloc0(sizeof(struct sr_dev_inst)); |
0af636be UH |
313 | sdi->vendor = g_strdup(model->series->vendor->name); |
314 | sdi->model = g_strdup(model->name); | |
315 | sdi->version = g_strdup(hw_info->firmware_version); | |
ae1bc1cc | 316 | sdi->conn = scpi; |
4f840ce9 | 317 | sdi->driver = &rigol_ds_driver_info; |
ae1bc1cc | 318 | sdi->inst_type = SR_INST_SCPI; |
b3fccc85 | 319 | sdi->serial_num = g_strdup(hw_info->serial_number); |
f57d8ffe | 320 | devc = g_malloc0(sizeof(struct dev_context)); |
cc9fd2d2 | 321 | devc->limit_frames = 0; |
bafd4890 | 322 | devc->model = model; |
569d4dbd | 323 | devc->format = model->series->format; |
8dd0b290 | 324 | |
569d4dbd ML |
325 | /* DS1000 models with firmware before 0.2.4 used the old data format. */ |
326 | if (model->series == SERIES(DS1000)) { | |
8dd0b290 BV |
327 | version = g_strsplit(hw_info->firmware_version, ".", 0); |
328 | do { | |
329 | if (!version[0] || !version[1] || !version[2]) | |
330 | break; | |
331 | if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0) | |
332 | break; | |
333 | for (i = 0; i < 3; i++) { | |
334 | if (sr_atol(version[i], &n[i]) != SR_OK) | |
335 | break; | |
336 | } | |
337 | if (i != 3) | |
338 | break; | |
de285cce BV |
339 | scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2]; |
340 | if (scpi->firmware_version < 24) { | |
341 | sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format."); | |
342 | devc->format = FORMAT_RAW; | |
343 | } | |
344 | break; | |
0c5f2abc | 345 | } while (0); |
8dd0b290 BV |
346 | g_strfreev(version); |
347 | } | |
348 | ||
349 | sr_scpi_hw_info_free(hw_info); | |
512bb890 | 350 | |
562b7ae5 SA |
351 | devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) * |
352 | model->analog_channels); | |
353 | ||
821fbcad | 354 | for (i = 0; i < model->analog_channels; i++) { |
eac0c613 | 355 | channel_name = g_strdup_printf("CH%d", i + 1); |
5e23fcab | 356 | ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name); |
562b7ae5 SA |
357 | |
358 | devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group)); | |
359 | ||
360 | devc->analog_groups[i]->name = channel_name; | |
361 | devc->analog_groups[i]->channels = g_slist_append(NULL, ch); | |
660e398f | 362 | sdi->channel_groups = g_slist_append(sdi->channel_groups, |
562b7ae5 | 363 | devc->analog_groups[i]); |
ca55277c | 364 | } |
512bb890 | 365 | |
bafd4890 | 366 | if (devc->model->has_digital) { |
16aca766 | 367 | devc->digital_group = g_malloc0(sizeof(struct sr_channel_group)); |
562b7ae5 | 368 | |
effb9dd1 | 369 | for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) { |
eac0c613 | 370 | channel_name = g_strdup_printf("D%d", i); |
5e23fcab | 371 | ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name); |
ca55277c | 372 | g_free(channel_name); |
562b7ae5 SA |
373 | devc->digital_group->channels = g_slist_append( |
374 | devc->digital_group->channels, ch); | |
512bb890 | 375 | } |
562b7ae5 | 376 | devc->digital_group->name = g_strdup("LA"); |
660e398f | 377 | sdi->channel_groups = g_slist_append(sdi->channel_groups, |
562b7ae5 | 378 | devc->digital_group); |
ca55277c | 379 | } |
bafd4890 | 380 | |
396cdca0 | 381 | for (i = 0; i < ARRAY_SIZE(timebases); i++) { |
bafd4890 ML |
382 | if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2]))) |
383 | devc->timebases = &timebases[i]; | |
569d4dbd | 384 | if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2]))) |
bafd4890 ML |
385 | devc->num_timebases = &timebases[i] - devc->timebases + 1; |
386 | } | |
387 | ||
396cdca0 | 388 | for (i = 0; i < ARRAY_SIZE(vdivs); i++) { |
a95f142e UH |
389 | if (!memcmp(&devc->model->series->min_vdiv, |
390 | &vdivs[i], sizeof(uint64_t[2]))) { | |
6ff1394e | 391 | devc->vdivs = &vdivs[i]; |
396cdca0 | 392 | devc->num_vdivs = ARRAY_SIZE(vdivs) - i; |
81b85663 | 393 | } |
a95f142e | 394 | } |
bafd4890 | 395 | |
a95f142e UH |
396 | devc->buffer = g_malloc(ACQ_BUFFER_SIZE); |
397 | devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float)); | |
babab622 ML |
398 | |
399 | devc->data_source = DATA_SOURCE_LIVE; | |
400 | ||
cc9fd2d2 BV |
401 | sdi->priv = devc; |
402 | ||
9d3ae01b | 403 | return sdi; |
ca55277c | 404 | } |
512bb890 | 405 | |
4f840ce9 | 406 | static GSList *scan(struct sr_dev_driver *di, GSList *options) |
ca55277c | 407 | { |
41812aca | 408 | return sr_scpi_scan(di->context, options, probe_device); |
f4816ac6 ML |
409 | } |
410 | ||
6078d2c9 | 411 | static int dev_open(struct sr_dev_inst *sdi) |
f4816ac6 | 412 | { |
e1b5b7e7 | 413 | int ret; |
ae1bc1cc | 414 | struct sr_scpi_dev_inst *scpi = sdi->conn; |
9bd4c956 | 415 | |
e1b5b7e7 UH |
416 | if ((ret = sr_scpi_open(scpi)) < 0) { |
417 | sr_err("Failed to open SCPI device: %s.", sr_strerror(ret)); | |
e0b7d23c | 418 | return SR_ERR; |
e1b5b7e7 | 419 | } |
e0b7d23c | 420 | |
e1b5b7e7 UH |
421 | if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) { |
422 | sr_err("Failed to get device config: %s.", sr_strerror(ret)); | |
254dd102 | 423 | return SR_ERR; |
e1b5b7e7 | 424 | } |
f4816ac6 ML |
425 | |
426 | return SR_OK; | |
427 | } | |
428 | ||
6078d2c9 | 429 | static int dev_close(struct sr_dev_inst *sdi) |
f4816ac6 | 430 | { |
ae1bc1cc | 431 | struct sr_scpi_dev_inst *scpi; |
22c19688 | 432 | struct dev_context *devc; |
ae1bc1cc ML |
433 | |
434 | scpi = sdi->conn; | |
22c19688 ML |
435 | devc = sdi->priv; |
436 | ||
f1ba6b4b UH |
437 | if (!scpi) |
438 | return SR_ERR_BUG; | |
439 | ||
6e94eb41 | 440 | if (devc->model->series->protocol == PROTOCOL_V2) |
38354d9d | 441 | rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE"); |
e0b7d23c | 442 | |
f1ba6b4b | 443 | return sr_scpi_close(scpi); |
f4816ac6 ML |
444 | } |
445 | ||
5415e602 ML |
446 | static int analog_frame_size(const struct sr_dev_inst *sdi) |
447 | { | |
448 | struct dev_context *devc = sdi->priv; | |
ba7dd8bb UH |
449 | struct sr_channel *ch; |
450 | int analog_channels = 0; | |
5415e602 ML |
451 | GSList *l; |
452 | ||
ba7dd8bb UH |
453 | for (l = sdi->channels; l; l = l->next) { |
454 | ch = l->data; | |
3f239f08 | 455 | if (ch->type == SR_CHANNEL_ANALOG && ch->enabled) |
ba7dd8bb | 456 | analog_channels++; |
569d4dbd ML |
457 | } |
458 | ||
ba7dd8bb | 459 | if (analog_channels == 0) |
824eb2ac ML |
460 | return 0; |
461 | ||
569d4dbd ML |
462 | switch (devc->data_source) { |
463 | case DATA_SOURCE_LIVE: | |
464 | return devc->model->series->live_samples; | |
465 | case DATA_SOURCE_MEMORY: | |
ba7dd8bb | 466 | return devc->model->series->buffer_samples / analog_channels; |
470140fc | 467 | default: |
569d4dbd | 468 | return 0; |
5415e602 ML |
469 | } |
470 | } | |
471 | ||
d22250a9 ML |
472 | static int digital_frame_size(const struct sr_dev_inst *sdi) |
473 | { | |
474 | struct dev_context *devc = sdi->priv; | |
475 | ||
569d4dbd ML |
476 | switch (devc->data_source) { |
477 | case DATA_SOURCE_LIVE: | |
478 | return devc->model->series->live_samples * 2; | |
479 | case DATA_SOURCE_MEMORY: | |
480 | return devc->model->series->buffer_samples * 2; | |
d22250a9 ML |
481 | default: |
482 | return 0; | |
483 | } | |
484 | } | |
485 | ||
dd7a72ea UH |
486 | static int config_get(uint32_t key, GVariant **data, |
487 | const struct sr_dev_inst *sdi, const struct sr_channel_group *cg) | |
d62d7ad1 | 488 | { |
e43fdd8d | 489 | struct dev_context *devc; |
ba7dd8bb | 490 | struct sr_channel *ch; |
2b0e4a46 | 491 | const char *tmp_str; |
c2b394d5 | 492 | uint64_t samplerate; |
2b0e4a46 | 493 | int analog_channel = -1; |
c33ff377 | 494 | float smallest_diff = INFINITY; |
2b0e4a46 AJ |
495 | int idx = -1; |
496 | unsigned i; | |
d62d7ad1 | 497 | |
709468ba | 498 | if (!sdi) |
e43fdd8d BV |
499 | return SR_ERR_ARG; |
500 | ||
709468ba UH |
501 | devc = sdi->priv; |
502 | ||
660e398f | 503 | /* If a channel group is specified, it must be a valid one. */ |
53b4680f | 504 | if (cg && !g_slist_find(sdi->channel_groups, cg)) { |
660e398f | 505 | sr_err("Invalid channel group specified."); |
969edf63 | 506 | return SR_ERR; |
be60a9e4 BV |
507 | } |
508 | ||
53b4680f | 509 | if (cg) { |
ba7dd8bb UH |
510 | ch = g_slist_nth_data(cg->channels, 0); |
511 | if (!ch) | |
2b0e4a46 | 512 | return SR_ERR; |
3f239f08 | 513 | if (ch->type == SR_CHANNEL_ANALOG) { |
ba7dd8bb | 514 | if (ch->name[2] < '1' || ch->name[2] > '4') |
2b0e4a46 | 515 | return SR_ERR; |
ba7dd8bb | 516 | analog_channel = ch->name[2] - '1'; |
2b0e4a46 AJ |
517 | } |
518 | } | |
519 | ||
584560f1 | 520 | switch (key) { |
bf622e6d | 521 | case SR_CONF_NUM_HDIV: |
569d4dbd | 522 | *data = g_variant_new_int32(devc->model->series->num_horizontal_divs); |
d62d7ad1 BV |
523 | break; |
524 | case SR_CONF_NUM_VDIV: | |
81b85663 | 525 | *data = g_variant_new_int32(devc->num_vdivs); |
f44f7e61 | 526 | break; |
babab622 ML |
527 | case SR_CONF_DATA_SOURCE: |
528 | if (devc->data_source == DATA_SOURCE_LIVE) | |
529 | *data = g_variant_new_string("Live"); | |
530 | else if (devc->data_source == DATA_SOURCE_MEMORY) | |
531 | *data = g_variant_new_string("Memory"); | |
532 | else | |
533 | *data = g_variant_new_string("Segmented"); | |
534 | break; | |
4914dd4b ML |
535 | case SR_CONF_SAMPLERATE: |
536 | if (devc->data_source == DATA_SOURCE_LIVE) { | |
c2b394d5 | 537 | samplerate = analog_frame_size(sdi) / |
569d4dbd | 538 | (devc->timebase * devc->model->series->num_horizontal_divs); |
4914dd4b | 539 | *data = g_variant_new_uint64(samplerate); |
c2b394d5 | 540 | } else { |
e1b5b7e7 | 541 | sr_dbg("Unknown data source: %d.", devc->data_source); |
4914dd4b | 542 | return SR_ERR_NA; |
c2b394d5 | 543 | } |
4914dd4b | 544 | break; |
2b0e4a46 AJ |
545 | case SR_CONF_TRIGGER_SOURCE: |
546 | if (!strcmp(devc->trigger_source, "ACL")) | |
547 | tmp_str = "AC Line"; | |
548 | else if (!strcmp(devc->trigger_source, "CHAN1")) | |
549 | tmp_str = "CH1"; | |
550 | else if (!strcmp(devc->trigger_source, "CHAN2")) | |
551 | tmp_str = "CH2"; | |
552 | else if (!strcmp(devc->trigger_source, "CHAN3")) | |
553 | tmp_str = "CH3"; | |
554 | else if (!strcmp(devc->trigger_source, "CHAN4")) | |
555 | tmp_str = "CH4"; | |
556 | else | |
557 | tmp_str = devc->trigger_source; | |
558 | *data = g_variant_new_string(tmp_str); | |
559 | break; | |
5d336f11 | 560 | case SR_CONF_TRIGGER_SLOPE: |
e1b5b7e7 | 561 | if (!strncmp(devc->trigger_slope, "POS", 3)) { |
5d336f11 | 562 | tmp_str = "r"; |
e1b5b7e7 | 563 | } else if (!strncmp(devc->trigger_slope, "NEG", 3)) { |
5d336f11 | 564 | tmp_str = "f"; |
e1b5b7e7 UH |
565 | } else { |
566 | sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope); | |
5d336f11 | 567 | return SR_ERR_NA; |
e1b5b7e7 | 568 | } |
5d336f11 AJ |
569 | *data = g_variant_new_string(tmp_str); |
570 | break; | |
9ea62f2e AJ |
571 | case SR_CONF_TRIGGER_LEVEL: |
572 | *data = g_variant_new_double(devc->trigger_level); | |
573 | break; | |
2b0e4a46 AJ |
574 | case SR_CONF_TIMEBASE: |
575 | for (i = 0; i < devc->num_timebases; i++) { | |
576 | float tb = (float)devc->timebases[i][0] / devc->timebases[i][1]; | |
577 | float diff = fabs(devc->timebase - tb); | |
578 | if (diff < smallest_diff) { | |
579 | smallest_diff = diff; | |
580 | idx = i; | |
581 | } | |
582 | } | |
e1b5b7e7 UH |
583 | if (idx < 0) { |
584 | sr_dbg("Negative timebase index: %d.", idx); | |
2b0e4a46 | 585 | return SR_ERR_NA; |
e1b5b7e7 | 586 | } |
2b0e4a46 AJ |
587 | *data = g_variant_new("(tt)", devc->timebases[idx][0], |
588 | devc->timebases[idx][1]); | |
589 | break; | |
590 | case SR_CONF_VDIV: | |
e1b5b7e7 UH |
591 | if (analog_channel < 0) { |
592 | sr_dbg("Negative analog channel: %d.", analog_channel); | |
2b0e4a46 | 593 | return SR_ERR_NA; |
e1b5b7e7 | 594 | } |
2b0e4a46 AJ |
595 | for (i = 0; i < ARRAY_SIZE(vdivs); i++) { |
596 | float vdiv = (float)vdivs[i][0] / vdivs[i][1]; | |
597 | float diff = fabs(devc->vdiv[analog_channel] - vdiv); | |
598 | if (diff < smallest_diff) { | |
599 | smallest_diff = diff; | |
600 | idx = i; | |
601 | } | |
602 | } | |
e1b5b7e7 UH |
603 | if (idx < 0) { |
604 | sr_dbg("Negative vdiv index: %d.", idx); | |
2b0e4a46 | 605 | return SR_ERR_NA; |
e1b5b7e7 | 606 | } |
2b0e4a46 AJ |
607 | *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]); |
608 | break; | |
609 | case SR_CONF_COUPLING: | |
e1b5b7e7 UH |
610 | if (analog_channel < 0) { |
611 | sr_dbg("Negative analog channel: %d.", analog_channel); | |
2b0e4a46 | 612 | return SR_ERR_NA; |
e1b5b7e7 | 613 | } |
2b0e4a46 AJ |
614 | *data = g_variant_new_string(devc->coupling[analog_channel]); |
615 | break; | |
934cf6cf AJ |
616 | case SR_CONF_PROBE_FACTOR: |
617 | if (analog_channel < 0) { | |
618 | sr_dbg("Negative analog channel: %d.", analog_channel); | |
619 | return SR_ERR_NA; | |
620 | } | |
621 | *data = g_variant_new_uint64(devc->attenuation[analog_channel]); | |
622 | break; | |
d62d7ad1 | 623 | default: |
bd6fbf62 | 624 | return SR_ERR_NA; |
d62d7ad1 BV |
625 | } |
626 | ||
627 | return SR_OK; | |
628 | } | |
629 | ||
dd7a72ea UH |
630 | static int config_set(uint32_t key, GVariant *data, |
631 | const struct sr_dev_inst *sdi, const struct sr_channel_group *cg) | |
f4816ac6 | 632 | { |
29d957ce | 633 | struct dev_context *devc; |
697fb6dd | 634 | uint64_t p; |
254dd102 | 635 | double t_dbl; |
fcd6a8bd | 636 | int ret, idx, i; |
254dd102 | 637 | const char *tmp_str; |
889ef4a0 | 638 | char buffer[16]; |
f4816ac6 | 639 | |
b0baddef | 640 | devc = sdi->priv; |
29d957ce | 641 | |
660e398f | 642 | /* If a channel group is specified, it must be a valid one. */ |
53b4680f | 643 | if (cg && !g_slist_find(sdi->channel_groups, cg)) { |
660e398f | 644 | sr_err("Invalid channel group specified."); |
969edf63 | 645 | return SR_ERR; |
be60a9e4 BV |
646 | } |
647 | ||
584560f1 | 648 | switch (key) { |
1953564a | 649 | case SR_CONF_LIMIT_FRAMES: |
f6a0ac9f | 650 | devc->limit_frames = g_variant_get_uint64(data); |
e0b7d23c | 651 | break; |
1953564a | 652 | case SR_CONF_TRIGGER_SLOPE: |
697fb6dd | 653 | if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_slopes))) < 0) |
ca9b9f48 | 654 | return SR_ERR_ARG; |
254dd102 | 655 | g_free(devc->trigger_slope); |
697fb6dd | 656 | devc->trigger_slope = g_strdup((trigger_slopes[idx][0] == 'r') ? "POS" : "NEG"); |
758906aa | 657 | return rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope); |
1953564a | 658 | case SR_CONF_HORIZ_TRIGGERPOS: |
254dd102 | 659 | t_dbl = g_variant_get_double(data); |
e1b5b7e7 UH |
660 | if (t_dbl < 0.0 || t_dbl > 1.0) { |
661 | sr_err("Invalid horiz. trigger position: %g.", t_dbl); | |
254dd102 | 662 | return SR_ERR; |
e1b5b7e7 | 663 | } |
254dd102 BV |
664 | devc->horiz_triggerpos = t_dbl; |
665 | /* We have the trigger offset as a percentage of the frame, but | |
666 | * need to express this in seconds. */ | |
bafd4890 | 667 | t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases; |
889ef4a0 | 668 | g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl); |
758906aa | 669 | return rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer); |
9ea62f2e AJ |
670 | case SR_CONF_TRIGGER_LEVEL: |
671 | t_dbl = g_variant_get_double(data); | |
672 | g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl); | |
673 | ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer); | |
674 | if (ret == SR_OK) | |
675 | devc->trigger_level = t_dbl; | |
758906aa | 676 | return ret; |
1953564a | 677 | case SR_CONF_TIMEBASE: |
697fb6dd UH |
678 | if ((idx = std_u64_tuple_idx(data, devc->timebases, devc->num_timebases)) < 0) |
679 | return SR_ERR_ARG; | |
680 | devc->timebase = (float)devc->timebases[idx][0] / devc->timebases[idx][1]; | |
681 | g_ascii_formatd(buffer, sizeof(buffer), "%.9f", | |
682 | devc->timebase); | |
758906aa | 683 | return rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer); |
1953564a | 684 | case SR_CONF_TRIGGER_SOURCE: |
6bcc81ac | 685 | if ((idx = std_str_idx(data, devc->model->trigger_sources, devc->model->num_trigger_sources)) < 0) |
697fb6dd UH |
686 | return SR_ERR_ARG; |
687 | g_free(devc->trigger_source); | |
6bcc81ac | 688 | devc->trigger_source = g_strdup(devc->model->trigger_sources[idx]); |
697fb6dd UH |
689 | if (!strcmp(devc->trigger_source, "AC Line")) |
690 | tmp_str = "ACL"; | |
691 | else if (!strcmp(devc->trigger_source, "CH1")) | |
692 | tmp_str = "CHAN1"; | |
693 | else if (!strcmp(devc->trigger_source, "CH2")) | |
694 | tmp_str = "CHAN2"; | |
695 | else if (!strcmp(devc->trigger_source, "CH3")) | |
696 | tmp_str = "CHAN3"; | |
697 | else if (!strcmp(devc->trigger_source, "CH4")) | |
698 | tmp_str = "CHAN4"; | |
699 | else | |
700 | tmp_str = (char *)devc->trigger_source; | |
758906aa | 701 | return rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str); |
1953564a | 702 | case SR_CONF_VDIV: |
9e411f4b | 703 | if (!cg) |
660e398f | 704 | return SR_ERR_CHANNEL_GROUP; |
fcd6a8bd UH |
705 | if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0) |
706 | return SR_ERR_ARG; | |
707 | if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(vdivs))) < 0) | |
708 | return SR_ERR_ARG; | |
709 | devc->vdiv[i] = (float)vdivs[idx][0] / vdivs[idx][1]; | |
710 | g_ascii_formatd(buffer, sizeof(buffer), "%.3f", devc->vdiv[i]); | |
711 | return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1, buffer); | |
1953564a | 712 | case SR_CONF_COUPLING: |
9e411f4b | 713 | if (!cg) |
660e398f | 714 | return SR_ERR_CHANNEL_GROUP; |
fcd6a8bd UH |
715 | if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0) |
716 | return SR_ERR_ARG; | |
717 | if ((idx = std_str_idx(data, ARRAY_AND_SIZE(coupling))) < 0) | |
718 | return SR_ERR_ARG; | |
719 | g_free(devc->coupling[i]); | |
720 | devc->coupling[i] = g_strdup(coupling[idx]); | |
721 | return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1, devc->coupling[i]); | |
934cf6cf | 722 | case SR_CONF_PROBE_FACTOR: |
9e411f4b | 723 | if (!cg) |
934cf6cf | 724 | return SR_ERR_CHANNEL_GROUP; |
fcd6a8bd UH |
725 | if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0) |
726 | return SR_ERR_ARG; | |
727 | if ((idx = std_u64_idx(data, ARRAY_AND_SIZE(probe_factor))) < 0) | |
728 | return SR_ERR_ARG; | |
934cf6cf | 729 | p = g_variant_get_uint64(data); |
fcd6a8bd UH |
730 | devc->attenuation[i] = probe_factor[idx]; |
731 | ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64, i + 1, p); | |
732 | if (ret == SR_OK) | |
733 | rigol_ds_get_dev_cfg_vertical(sdi); | |
734 | return ret; | |
babab622 ML |
735 | case SR_CONF_DATA_SOURCE: |
736 | tmp_str = g_variant_get_string(data, NULL); | |
737 | if (!strcmp(tmp_str, "Live")) | |
738 | devc->data_source = DATA_SOURCE_LIVE; | |
569d4dbd ML |
739 | else if (devc->model->series->protocol >= PROTOCOL_V2 |
740 | && !strcmp(tmp_str, "Memory")) | |
babab622 | 741 | devc->data_source = DATA_SOURCE_MEMORY; |
569d4dbd | 742 | else if (devc->model->series->protocol >= PROTOCOL_V3 |
babab622 ML |
743 | && !strcmp(tmp_str, "Segmented")) |
744 | devc->data_source = DATA_SOURCE_SEGMENTED; | |
e1b5b7e7 UH |
745 | else { |
746 | sr_err("Unknown data source: '%s'.", tmp_str); | |
babab622 | 747 | return SR_ERR; |
e1b5b7e7 | 748 | } |
babab622 | 749 | break; |
f4816ac6 | 750 | default: |
dcd438ee | 751 | return SR_ERR_NA; |
f4816ac6 ML |
752 | } |
753 | ||
758906aa | 754 | return SR_OK; |
f4816ac6 ML |
755 | } |
756 | ||
dd7a72ea UH |
757 | static int config_list(uint32_t key, GVariant **data, |
758 | const struct sr_dev_inst *sdi, const struct sr_channel_group *cg) | |
a1c743fc | 759 | { |
e66d1892 | 760 | struct dev_context *devc; |
e43fdd8d | 761 | |
e66d1892 | 762 | devc = (sdi) ? sdi->priv : NULL; |
be60a9e4 | 763 | |
e43fdd8d | 764 | switch (key) { |
e66d1892 | 765 | case SR_CONF_SCAN_OPTIONS: |
9a6517d1 | 766 | case SR_CONF_DEVICE_OPTIONS: |
e66d1892 UH |
767 | if (!cg) |
768 | return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts); | |
0306ae30 GS |
769 | if (!devc) |
770 | return SR_ERR_ARG; | |
562b7ae5 | 771 | if (cg == devc->digital_group) { |
105df674 | 772 | *data = std_gvar_array_u32(NULL, 0); |
f48e0249 ML |
773 | return SR_OK; |
774 | } else { | |
fcd6a8bd UH |
775 | if (std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels) < 0) |
776 | return SR_ERR_ARG; | |
777 | *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg_analog)); | |
778 | return SR_OK; | |
f48e0249 | 779 | } |
5f77dffc | 780 | break; |
2a7b113d | 781 | case SR_CONF_COUPLING: |
e66d1892 | 782 | if (!cg) |
660e398f | 783 | return SR_ERR_CHANNEL_GROUP; |
53012da6 | 784 | *data = g_variant_new_strv(ARRAY_AND_SIZE(coupling)); |
58f43369 | 785 | break; |
934cf6cf | 786 | case SR_CONF_PROBE_FACTOR: |
e66d1892 | 787 | if (!cg) |
934cf6cf | 788 | return SR_ERR_CHANNEL_GROUP; |
53012da6 | 789 | *data = std_gvar_array_u64(ARRAY_AND_SIZE(probe_factor)); |
934cf6cf | 790 | break; |
e4f2b2ad | 791 | case SR_CONF_VDIV: |
7cc1a550 ML |
792 | if (!devc) |
793 | /* Can't know this until we have the exact model. */ | |
794 | return SR_ERR_ARG; | |
e66d1892 | 795 | if (!cg) |
660e398f | 796 | return SR_ERR_CHANNEL_GROUP; |
58ffcf97 | 797 | *data = std_gvar_tuple_array(devc->vdivs, devc->num_vdivs); |
58f43369 | 798 | break; |
41f5bd09 | 799 | case SR_CONF_TIMEBASE: |
7cc1a550 ML |
800 | if (!devc) |
801 | /* Can't know this until we have the exact model. */ | |
802 | return SR_ERR_ARG; | |
a31b2ccb AJ |
803 | if (devc->num_timebases <= 0) |
804 | return SR_ERR_NA; | |
58ffcf97 | 805 | *data = std_gvar_tuple_array(devc->timebases, devc->num_timebases); |
41f5bd09 | 806 | break; |
328bafab | 807 | case SR_CONF_TRIGGER_SOURCE: |
7cc1a550 ML |
808 | if (!devc) |
809 | /* Can't know this until we have the exact model. */ | |
810 | return SR_ERR_ARG; | |
6bcc81ac | 811 | *data = g_variant_new_strv(devc->model->trigger_sources, devc->model->num_trigger_sources); |
328bafab | 812 | break; |
5d336f11 | 813 | case SR_CONF_TRIGGER_SLOPE: |
53012da6 | 814 | *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_slopes)); |
5d336f11 | 815 | break; |
babab622 ML |
816 | case SR_CONF_DATA_SOURCE: |
817 | if (!devc) | |
818 | /* Can't know this until we have the exact model. */ | |
819 | return SR_ERR_ARG; | |
569d4dbd ML |
820 | switch (devc->model->series->protocol) { |
821 | case PROTOCOL_V1: | |
822 | *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2); | |
823 | break; | |
824 | case PROTOCOL_V2: | |
babab622 | 825 | *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1); |
569d4dbd ML |
826 | break; |
827 | default: | |
53012da6 | 828 | *data = g_variant_new_strv(ARRAY_AND_SIZE(data_sources)); |
569d4dbd ML |
829 | break; |
830 | } | |
babab622 | 831 | break; |
a1c743fc | 832 | default: |
bd6fbf62 | 833 | return SR_ERR_NA; |
a1c743fc BV |
834 | } |
835 | ||
836 | return SR_OK; | |
837 | } | |
838 | ||
695dc859 | 839 | static int dev_acquisition_start(const struct sr_dev_inst *sdi) |
f4816ac6 | 840 | { |
ae1bc1cc | 841 | struct sr_scpi_dev_inst *scpi; |
29d957ce | 842 | struct dev_context *devc; |
ba7dd8bb | 843 | struct sr_channel *ch; |
f76c24f6 | 844 | struct sr_datafeed_packet packet; |
702f42e8 | 845 | gboolean some_digital; |
254dd102 | 846 | GSList *l; |
29d957ce | 847 | |
ae1bc1cc | 848 | scpi = sdi->conn; |
29d957ce UH |
849 | devc = sdi->priv; |
850 | ||
51b294cd ML |
851 | devc->num_frames = 0; |
852 | ||
702f42e8 | 853 | some_digital = FALSE; |
ba7dd8bb UH |
854 | for (l = sdi->channels; l; l = l->next) { |
855 | ch = l->data; | |
856 | sr_dbg("handling channel %s", ch->name); | |
3f239f08 | 857 | if (ch->type == SR_CHANNEL_ANALOG) { |
ba7dd8bb | 858 | if (ch->enabled) |
702f42e8 ML |
859 | devc->enabled_channels = g_slist_append( |
860 | devc->enabled_channels, ch); | |
ba7dd8bb | 861 | if (ch->enabled != devc->analog_channels[ch->index]) { |
6bb192bc | 862 | /* Enabled channel is currently disabled, or vice versa. */ |
ba7dd8bb UH |
863 | if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1, |
864 | ch->enabled ? "ON" : "OFF") != SR_OK) | |
6bb192bc | 865 | return SR_ERR; |
ba7dd8bb | 866 | devc->analog_channels[ch->index] = ch->enabled; |
6bb192bc | 867 | } |
3f239f08 | 868 | } else if (ch->type == SR_CHANNEL_LOGIC) { |
01dd7a4c ML |
869 | /* Only one list entry for older protocols. All channels are |
870 | * retrieved together when this entry is processed. */ | |
702f42e8 | 871 | if (ch->enabled && ( |
01dd7a4c | 872 | devc->model->series->protocol > PROTOCOL_V3 || |
702f42e8 ML |
873 | !some_digital)) |
874 | devc->enabled_channels = g_slist_append( | |
875 | devc->enabled_channels, ch); | |
ba7dd8bb | 876 | if (ch->enabled) { |
702f42e8 | 877 | some_digital = TRUE; |
04e8e01e ML |
878 | /* Turn on LA module if currently off. */ |
879 | if (!devc->la_enabled) { | |
702f42e8 | 880 | if (rigol_ds_config_set(sdi, |
01dd7a4c | 881 | devc->model->series->protocol >= PROTOCOL_V3 ? |
702f42e8 | 882 | ":LA:STAT ON" : ":LA:DISP ON") != SR_OK) |
04e8e01e ML |
883 | return SR_ERR; |
884 | devc->la_enabled = TRUE; | |
885 | } | |
886 | } | |
ba7dd8bb | 887 | if (ch->enabled != devc->digital_channels[ch->index]) { |
6bb192bc | 888 | /* Enabled channel is currently disabled, or vice versa. */ |
702f42e8 | 889 | if (rigol_ds_config_set(sdi, |
01dd7a4c | 890 | devc->model->series->protocol >= PROTOCOL_V3 ? |
702f42e8 | 891 | ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index, |
ba7dd8bb | 892 | ch->enabled ? "ON" : "OFF") != SR_OK) |
6bb192bc | 893 | return SR_ERR; |
ba7dd8bb | 894 | devc->digital_channels[ch->index] = ch->enabled; |
6bb192bc | 895 | } |
254dd102 BV |
896 | } |
897 | } | |
1fed20cb | 898 | |
702f42e8 | 899 | if (!devc->enabled_channels) |
254dd102 | 900 | return SR_ERR; |
e0b7d23c | 901 | |
ba7dd8bb | 902 | /* Turn off LA module if on and no digital channels selected. */ |
702f42e8 ML |
903 | if (devc->la_enabled && !some_digital) |
904 | if (rigol_ds_config_set(sdi, | |
01dd7a4c | 905 | devc->model->series->protocol >= PROTOCOL_V3 ? |
702f42e8 | 906 | ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK) |
04e8e01e ML |
907 | return SR_ERR; |
908 | ||
e086b750 ML |
909 | /* Set memory mode. */ |
910 | if (devc->data_source == DATA_SOURCE_SEGMENTED) { | |
911 | sr_err("Data source 'Segmented' not yet supported"); | |
912 | return SR_ERR; | |
913 | } | |
914 | ||
915 | devc->analog_frame_size = analog_frame_size(sdi); | |
916 | devc->digital_frame_size = digital_frame_size(sdi); | |
917 | ||
569d4dbd ML |
918 | switch (devc->model->series->protocol) { |
919 | case PROTOCOL_V2: | |
99af83b7 | 920 | if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK) |
e086b750 | 921 | return SR_ERR; |
569d4dbd ML |
922 | break; |
923 | case PROTOCOL_V3: | |
e086b750 ML |
924 | /* Apparently for the DS2000 the memory |
925 | * depth can only be set in Running state - | |
926 | * this matches the behaviour of the UI. */ | |
38354d9d | 927 | if (rigol_ds_config_set(sdi, ":RUN") != SR_OK) |
1fed20cb | 928 | return SR_ERR; |
e086b750 ML |
929 | if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d", |
930 | devc->analog_frame_size) != SR_OK) | |
931 | return SR_ERR; | |
932 | if (rigol_ds_config_set(sdi, ":STOP") != SR_OK) | |
1fed20cb | 933 | return SR_ERR; |
569d4dbd ML |
934 | break; |
935 | default: | |
936 | break; | |
1fed20cb ML |
937 | } |
938 | ||
e086b750 ML |
939 | if (devc->data_source == DATA_SOURCE_LIVE) |
940 | if (rigol_ds_config_set(sdi, ":RUN") != SR_OK) | |
941 | return SR_ERR; | |
942 | ||
102f1239 BV |
943 | sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50, |
944 | rigol_ds_receive, (void *)sdi); | |
e0b7d23c | 945 | |
bee2b016 | 946 | std_session_send_df_header(sdi); |
e0b7d23c | 947 | |
702f42e8 | 948 | devc->channel_entry = devc->enabled_channels; |
821fbcad | 949 | |
e086b750 ML |
950 | if (rigol_ds_capture_start(sdi) != SR_OK) |
951 | return SR_ERR; | |
f4816ac6 | 952 | |
f76c24f6 ML |
953 | /* Start of first frame. */ |
954 | packet.type = SR_DF_FRAME_BEGIN; | |
695dc859 | 955 | sr_session_send(sdi, &packet); |
f76c24f6 | 956 | |
f4816ac6 ML |
957 | return SR_OK; |
958 | } | |
959 | ||
695dc859 | 960 | static int dev_acquisition_stop(struct sr_dev_inst *sdi) |
f4816ac6 | 961 | { |
29d957ce | 962 | struct dev_context *devc; |
ae1bc1cc | 963 | struct sr_scpi_dev_inst *scpi; |
29d957ce | 964 | |
29d957ce UH |
965 | devc = sdi->priv; |
966 | ||
bee2b016 | 967 | std_session_send_df_end(sdi); |
b751cf7a | 968 | |
702f42e8 ML |
969 | g_slist_free(devc->enabled_channels); |
970 | devc->enabled_channels = NULL; | |
ae1bc1cc | 971 | scpi = sdi->conn; |
102f1239 | 972 | sr_scpi_source_remove(sdi->session, scpi); |
f4816ac6 ML |
973 | |
974 | return SR_OK; | |
975 | } | |
976 | ||
dd5c48a6 | 977 | static struct sr_dev_driver rigol_ds_driver_info = { |
3086efdd ML |
978 | .name = "rigol-ds", |
979 | .longname = "Rigol DS", | |
f4816ac6 | 980 | .api_version = 1, |
c2fdcc25 | 981 | .init = std_init, |
700d6b64 | 982 | .cleanup = std_cleanup, |
6078d2c9 | 983 | .scan = scan, |
c01bf34c | 984 | .dev_list = std_dev_list, |
3b412e3a | 985 | .dev_clear = dev_clear, |
d62d7ad1 | 986 | .config_get = config_get, |
035a1078 | 987 | .config_set = config_set, |
a1c743fc | 988 | .config_list = config_list, |
6078d2c9 UH |
989 | .dev_open = dev_open, |
990 | .dev_close = dev_close, | |
254dd102 BV |
991 | .dev_acquisition_start = dev_acquisition_start, |
992 | .dev_acquisition_stop = dev_acquisition_stop, | |
41812aca | 993 | .context = NULL, |
f4816ac6 | 994 | }; |
dd5c48a6 | 995 | SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info); |