]>
Commit | Line | Data |
---|---|---|
6a25fa42 AZ |
1 | /* |
2 | * This file is part of the libsigrok project. | |
3 | * | |
5089a143 AZ |
4 | * Copyright (C) 2016 Andreas Zschunke <andreas.zschunke@gmx.net> |
5 | * Copyright (C) 2017 Andrej Valek <andy@skyrain.eu> | |
6 | * Copyright (C) 2017 Uwe Hermann <uwe@hermann-uwe.de> | |
6a25fa42 AZ |
7 | * |
8 | * This program is free software: you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation, either version 3 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | ||
22 | #ifndef LIBSIGROK_HARDWARE_HANTEK_4032L_PROTOCOL_H | |
23 | #define LIBSIGROK_HARDWARE_HANTEK_4032L_PROTOCOL_H | |
24 | ||
25 | #include <stdint.h> | |
26 | #include <glib.h> | |
5089a143 | 27 | #include <string.h> |
6a25fa42 AZ |
28 | #include <libsigrok/libsigrok.h> |
29 | #include "libsigrok-internal.h" | |
30 | ||
31 | #define LOG_PREFIX "hantek-4032l" | |
32 | ||
5089a143 AZ |
33 | #define H4032L_USB_VENDOR 0x04b5 |
34 | #define H4032L_USB_PRODUCT 0x4032 | |
35 | ||
2958315d AV |
36 | #define H4032L_DATA_BUFFER_SIZE (2 * 1024) |
37 | #define H4032L_DATA_TRANSFER_MAX_NUM 32 | |
38 | ||
4b75f84c AV |
39 | #define H4043L_NUM_SAMPLES_MIN (2 * 1024) |
40 | #define H4032L_NUM_SAMPLES_MAX (64 * 1024 * 1024) | |
41 | ||
ee1a7d2f AV |
42 | #define H4032L_THR_VOLTAGE_MIN -6.0 |
43 | #define H4032L_THR_VOLTAGE_MAX 6.0 | |
44 | #define H4032L_THR_VOLTAGE_STEP 0.1 | |
45 | /* | |
46 | * Array index of the default voltage threshold value (2.5V): | |
47 | * (|min| / step) + (default / step) = (|-6.0| / 0.1) + (2.5 / 0.1) = 85 | |
48 | */ | |
49 | #define H4032L_THR_VOLTAGE_DEFAULT 85 | |
50 | ||
5089a143 AZ |
51 | #define H4032L_CMD_PKT_MAGIC 0x017f |
52 | #define H4032L_STATUS_PACKET_MAGIC 0x2B1A037F | |
53 | #define H4032L_START_PACKET_MAGIC 0x2B1A027F | |
54 | #define H4032L_END_PACKET_MAGIC 0x4D3C037F | |
55 | ||
f49065c6 AV |
56 | enum h4032l_clock_edge_type { |
57 | H4032L_CLOCK_EDGE_TYPE_RISE, | |
58 | H4032L_CLOCK_EDGE_TYPE_FALL, | |
59 | H4032L_CLOCK_EDGE_TYPE_BOTH | |
60 | }; | |
61 | ||
62 | enum h4032l_ext_clock_source { | |
63 | H4032L_EXT_CLOCK_SOURCE_CHANNEL_A, | |
64 | H4032L_EXT_CLOCK_SOURCE_CHANNEL_B | |
65 | }; | |
66 | ||
67 | enum h4032l_clock_edge_type_channel { | |
68 | H4032L_CLOCK_EDGE_TYPE_RISE_A = 0x24, | |
69 | H4032L_CLOCK_EDGE_TYPE_RISE_B, | |
70 | H4032L_CLOCK_EDGE_TYPE_BOTH_A, | |
71 | H4032L_CLOCK_EDGE_TYPE_BOTH_B, | |
72 | H4032L_CLOCK_EDGE_TYPE_FALL_A, | |
73 | H4032L_CLOCK_EDGE_TYPE_FALL_B | |
74 | }; | |
75 | ||
5089a143 | 76 | enum h4032l_trigger_edge_type { |
28f2d07f | 77 | H4032L_TRIGGER_EDGE_TYPE_RISE, |
5089a143 AZ |
78 | H4032L_TRIGGER_EDGE_TYPE_FALL, |
79 | H4032L_TRIGGER_EDGE_TYPE_TOGGLE, | |
80 | H4032L_TRIGGER_EDGE_TYPE_DISABLED | |
81 | }; | |
82 | ||
83 | enum h4032l_trigger_data_range_type { | |
28f2d07f | 84 | H4032L_TRIGGER_DATA_RANGE_TYPE_MAX, |
5089a143 AZ |
85 | H4032L_TRIGGER_DATA_RANGE_TYPE_MIN_OR_MAX, |
86 | H4032L_TRIGGER_DATA_RANGE_TYPE_OUT_OF_RANGE, | |
87 | H4032L_TRIGGER_DATA_RANGE_TYPE_WITHIN_RANGE | |
88 | }; | |
89 | ||
90 | enum h4032l_trigger_time_range_type { | |
28f2d07f | 91 | H4032L_TRIGGER_TIME_RANGE_TYPE_MAX, |
5089a143 AZ |
92 | H4032L_TRIGGER_TIME_RANGE_TYPE_MIN_OR_MAX, |
93 | H4032L_TRIGGER_TIME_RANGE_TYPE_OUT_OF_RANGE, | |
94 | H4032L_TRIGGER_TIME_RANGE_TYPE_WITHIN_RANGE | |
95 | }; | |
6a25fa42 | 96 | |
5089a143 | 97 | enum h4032l_trigger_data_selection { |
28f2d07f | 98 | H4032L_TRIGGER_DATA_SELECTION_NEXT, |
5089a143 AZ |
99 | H4032L_TRIGGER_DATA_SELECTION_CURRENT, |
100 | H4032L_TRIGGER_DATA_SELECTION_PREV | |
101 | }; | |
6a25fa42 | 102 | |
5089a143 AZ |
103 | enum h4032l_status { |
104 | H4032L_STATUS_IDLE, | |
105 | H4032L_STATUS_CMD_CONFIGURE, | |
106 | H4032L_STATUS_CMD_STATUS, | |
107 | H4032L_STATUS_RESPONSE_STATUS, | |
108 | H4032L_STATUS_RESPONSE_STATUS_RETRY, | |
109 | H4032L_STATUS_RESPONSE_STATUS_CONTINUE, | |
110 | H4032L_STATUS_CMD_GET, | |
111 | H4032L_STATUS_FIRST_TRANSFER, | |
28f2d07f | 112 | H4032L_STATUS_TRANSFER |
5089a143 | 113 | }; |
6a25fa42 | 114 | |
e80e1858 AV |
115 | #pragma pack(push,2) |
116 | struct h4032l_trigger { | |
5089a143 AZ |
117 | struct { |
118 | uint32_t edge_signal:5; | |
119 | uint32_t edge_type:2; | |
120 | uint32_t :1; | |
121 | uint32_t data_range_type:2; | |
122 | uint32_t time_range_type:2; | |
123 | uint32_t data_range_enabled:1; | |
124 | uint32_t time_range_enabled:1; | |
125 | uint32_t :2; | |
126 | uint32_t data_sel:2; | |
127 | uint32_t combined_enabled:1; | |
128 | } flags; | |
129 | uint32_t data_range_min; | |
130 | uint32_t data_range_max; | |
131 | uint32_t time_range_min; | |
132 | uint32_t time_range_max; | |
133 | uint32_t data_range_mask; | |
134 | uint32_t combine_mask; | |
135 | uint32_t combine_data; | |
136 | }; | |
6a25fa42 | 137 | |
e80e1858 | 138 | struct h4032l_cmd_pkt { |
5089a143 AZ |
139 | uint16_t magic; /* 0x017f */ |
140 | uint8_t sample_rate; | |
141 | struct { | |
142 | uint8_t enable_trigger1:1; | |
143 | uint8_t enable_trigger2:1; | |
144 | uint8_t trigger_and_logic:1; | |
145 | } trig_flags; | |
146 | uint16_t pwm_a; | |
147 | uint16_t pwm_b; | |
148 | uint16_t reserved; | |
149 | uint32_t sample_size; /* Sample depth in bits per channel, 2k-64M, must be multiple of 512. */ | |
150 | uint32_t pre_trigger_size; /* Pretrigger buffer depth in bits, must be < sample_size. */ | |
151 | struct h4032l_trigger trigger[2]; | |
152 | uint16_t cmd; | |
153 | }; | |
e80e1858 | 154 | #pragma pack(pop) |
5089a143 AZ |
155 | |
156 | struct dev_context { | |
157 | enum h4032l_status status; | |
f49065c6 | 158 | uint64_t sample_rate; |
3dc976fe | 159 | unsigned int sent_samples; |
2958315d | 160 | int submitted_transfers; |
5089a143 | 161 | uint32_t remaining_samples; |
a5b9880e | 162 | gboolean acq_aborted; |
5089a143 | 163 | struct h4032l_cmd_pkt cmd_pkt; |
2958315d AV |
164 | unsigned int num_transfers; |
165 | struct libusb_transfer **transfers; | |
c7b5c358 | 166 | uint8_t buf[512]; |
5089a143 | 167 | uint64_t capture_ratio; |
3dc976fe | 168 | uint32_t trigger_pos; |
f49065c6 AV |
169 | gboolean external_clock; |
170 | enum h4032l_ext_clock_source external_clock_source; | |
171 | enum h4032l_clock_edge_type clock_edge; | |
2a801861 | 172 | double cur_threshold[2]; |
7a7afc00 | 173 | uint32_t fpga_version; |
6a25fa42 AZ |
174 | }; |
175 | ||
5089a143 AZ |
176 | SR_PRIV int h4032l_receive_data(int fd, int revents, void *cb_data); |
177 | SR_PRIV uint16_t h4032l_voltage2pwm(double voltage); | |
178 | SR_PRIV void LIBUSB_CALL h4032l_usb_callback(struct libusb_transfer *transfer); | |
43d86035 AV |
179 | SR_PRIV void LIBUSB_CALL h4032l_data_transfer_callback(struct libusb_transfer *transfer); |
180 | SR_PRIV int h4032l_start_data_transfers(const struct sr_dev_inst *sdi); | |
5089a143 | 181 | SR_PRIV int h4032l_start(const struct sr_dev_inst *sdi); |
2958315d | 182 | SR_PRIV int h4032l_stop(struct sr_dev_inst *sdi); |
5089a143 | 183 | SR_PRIV int h4032l_dev_open(struct sr_dev_inst *sdi); |
7a7afc00 | 184 | SR_PRIV int h4032l_get_fpga_version(const struct sr_dev_inst *sdi); |
6a25fa42 AZ |
185 | |
186 | #endif |