[libsigrok.git] / src / hardware / hantek-4032l / protocol.h

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2016 Andreas Zschunke <andreas.zschunke@gmx.net>
 * Copyright (C) 2017 Andrej Valek <andy@skyrain.eu>
 * Copyright (C) 2017 Uwe Hermann <uwe@hermann-uwe.de>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef LIBSIGROK_HARDWARE_HANTEK_4032L_PROTOCOL_H
#define LIBSIGROK_HARDWARE_HANTEK_4032L_PROTOCOL_H

#include <stdint.h>
#include <glib.h>
#include <string.h>
#include <libsigrok/libsigrok.h>
#include "libsigrok-internal.h"

#define LOG_PREFIX "hantek-4032l"

#define H4032L_USB_VENDOR 0x04b5
#define H4032L_USB_PRODUCT 0x4032

#define H4032L_DATA_BUFFER_SIZE (2 * 1024)
#define H4032L_DATA_TRANSFER_MAX_NUM 32

#define H4032L_CMD_PKT_MAGIC 0x017f
#define H4032L_STATUS_PACKET_MAGIC 0x2B1A037F
#define H4032L_START_PACKET_MAGIC 0x2B1A027F
#define H4032L_END_PACKET_MAGIC 0x4D3C037F

enum h4032l_trigger_edge_type {
	H4032L_TRIGGER_EDGE_TYPE_RISE,
	H4032L_TRIGGER_EDGE_TYPE_FALL,
	H4032L_TRIGGER_EDGE_TYPE_TOGGLE,
	H4032L_TRIGGER_EDGE_TYPE_DISABLED
};

enum h4032l_trigger_data_range_type {
	H4032L_TRIGGER_DATA_RANGE_TYPE_MAX,
	H4032L_TRIGGER_DATA_RANGE_TYPE_MIN_OR_MAX,
	H4032L_TRIGGER_DATA_RANGE_TYPE_OUT_OF_RANGE,
	H4032L_TRIGGER_DATA_RANGE_TYPE_WITHIN_RANGE
};

enum h4032l_trigger_time_range_type {
	H4032L_TRIGGER_TIME_RANGE_TYPE_MAX,
	H4032L_TRIGGER_TIME_RANGE_TYPE_MIN_OR_MAX,
	H4032L_TRIGGER_TIME_RANGE_TYPE_OUT_OF_RANGE,
	H4032L_TRIGGER_TIME_RANGE_TYPE_WITHIN_RANGE
};

enum h4032l_trigger_data_selection {
	H4032L_TRIGGER_DATA_SELECTION_NEXT,
	H4032L_TRIGGER_DATA_SELECTION_CURRENT,
	H4032L_TRIGGER_DATA_SELECTION_PREV
};

enum h4032l_status {
	H4032L_STATUS_IDLE,
	H4032L_STATUS_CMD_CONFIGURE,
	H4032L_STATUS_CMD_STATUS,
	H4032L_STATUS_RESPONSE_STATUS,
	H4032L_STATUS_RESPONSE_STATUS_RETRY,
	H4032L_STATUS_RESPONSE_STATUS_CONTINUE,
	H4032L_STATUS_CMD_GET,
	H4032L_STATUS_FIRST_TRANSFER,
	H4032L_STATUS_TRANSFER
};

#pragma pack(push,2)
struct h4032l_trigger {
	struct {
		uint32_t edge_signal:5;
		uint32_t edge_type:2;
		uint32_t :1;
		uint32_t data_range_type:2;
		uint32_t time_range_type:2;
		uint32_t data_range_enabled:1;
		uint32_t time_range_enabled:1;
		uint32_t :2;
		uint32_t data_sel:2;
		uint32_t combined_enabled:1;
	} flags;
	uint32_t data_range_min;
	uint32_t data_range_max;
	uint32_t time_range_min;
	uint32_t time_range_max;
	uint32_t data_range_mask;
	uint32_t combine_mask;
	uint32_t combine_data;
};

struct h4032l_cmd_pkt {
	uint16_t magic; /* 0x017f */
	uint8_t sample_rate;
	struct {
		uint8_t enable_trigger1:1;
		uint8_t enable_trigger2:1;
		uint8_t trigger_and_logic:1;
	} trig_flags;
	uint16_t pwm_a;
	uint16_t pwm_b;
	uint16_t reserved;
	uint32_t sample_size; /* Sample depth in bits per channel, 2k-64M, must be multiple of 512. */
	uint32_t pre_trigger_size; /* Pretrigger buffer depth in bits, must be < sample_size. */
	struct h4032l_trigger trigger[2];
	uint16_t cmd;
};
#pragma pack(pop)

struct dev_context {
	enum h4032l_status status;
	int submitted_transfers;
	uint32_t remaining_samples;
	gboolean acq_aborted;
	struct h4032l_cmd_pkt cmd_pkt;
	unsigned int num_transfers;
	struct libusb_transfer **transfers;
	uint8_t buffer[512];
	uint64_t capture_ratio;
	uint32_t fpga_version;
};

SR_PRIV int h4032l_receive_data(int fd, int revents, void *cb_data);
SR_PRIV uint16_t h4032l_voltage2pwm(double voltage);
SR_PRIV void LIBUSB_CALL h4032l_usb_callback(struct libusb_transfer *transfer);
SR_PRIV void LIBUSB_CALL h4032l_data_transfer_callback(struct libusb_transfer *transfer);
SR_PRIV int h4032l_start_data_transfers(const struct sr_dev_inst *sdi);
SR_PRIV int h4032l_start(const struct sr_dev_inst *sdi);
SR_PRIV int h4032l_stop(struct sr_dev_inst *sdi);
SR_PRIV int h4032l_dev_open(struct sr_dev_inst *sdi);
SR_PRIV int h4032l_get_fpga_version(const struct sr_dev_inst *sdi);

#endif
Commit	Line	Data
6a25fa42 AZ	1	/*
	2	* This file is part of the libsigrok project.
	3	*
5089a143 AZ	4	* Copyright (C) 2016 Andreas Zschunke <andreas.zschunke@gmx.net>
	5	* Copyright (C) 2017 Andrej Valek <andy@skyrain.eu>
	6	* Copyright (C) 2017 Uwe Hermann <uwe@hermann-uwe.de>
6a25fa42 AZ	7	*
	8	* This program is free software: you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation, either version 3 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	20	*/
	21
	22	#ifndef LIBSIGROK_HARDWARE_HANTEK_4032L_PROTOCOL_H
	23	#define LIBSIGROK_HARDWARE_HANTEK_4032L_PROTOCOL_H
	24
	25	#include <stdint.h>
	26	#include <glib.h>
5089a143	27	#include <string.h>
6a25fa42 AZ	28	#include <libsigrok/libsigrok.h>
	29	#include "libsigrok-internal.h"
	30
	31	#define LOG_PREFIX "hantek-4032l"
	32
5089a143 AZ	33	#define H4032L_USB_VENDOR 0x04b5
	34	#define H4032L_USB_PRODUCT 0x4032
	35
2958315d AV	36	#define H4032L_DATA_BUFFER_SIZE (2 * 1024)
	37	#define H4032L_DATA_TRANSFER_MAX_NUM 32
	38
5089a143 AZ	39	#define H4032L_CMD_PKT_MAGIC 0x017f
	40	#define H4032L_STATUS_PACKET_MAGIC 0x2B1A037F
	41	#define H4032L_START_PACKET_MAGIC 0x2B1A027F
	42	#define H4032L_END_PACKET_MAGIC 0x4D3C037F
	43
	44	enum h4032l_trigger_edge_type {
28f2d07f	45	H4032L_TRIGGER_EDGE_TYPE_RISE,
5089a143 AZ	46	H4032L_TRIGGER_EDGE_TYPE_FALL,
	47	H4032L_TRIGGER_EDGE_TYPE_TOGGLE,
	48	H4032L_TRIGGER_EDGE_TYPE_DISABLED
	49	};
	50
	51	enum h4032l_trigger_data_range_type {
28f2d07f	52	H4032L_TRIGGER_DATA_RANGE_TYPE_MAX,
5089a143 AZ	53	H4032L_TRIGGER_DATA_RANGE_TYPE_MIN_OR_MAX,
	54	H4032L_TRIGGER_DATA_RANGE_TYPE_OUT_OF_RANGE,
	55	H4032L_TRIGGER_DATA_RANGE_TYPE_WITHIN_RANGE
	56	};
	57
	58	enum h4032l_trigger_time_range_type {
28f2d07f	59	H4032L_TRIGGER_TIME_RANGE_TYPE_MAX,
5089a143 AZ	60	H4032L_TRIGGER_TIME_RANGE_TYPE_MIN_OR_MAX,
	61	H4032L_TRIGGER_TIME_RANGE_TYPE_OUT_OF_RANGE,
	62	H4032L_TRIGGER_TIME_RANGE_TYPE_WITHIN_RANGE
	63	};
6a25fa42	64
5089a143	65	enum h4032l_trigger_data_selection {
28f2d07f	66	H4032L_TRIGGER_DATA_SELECTION_NEXT,
5089a143 AZ	67	H4032L_TRIGGER_DATA_SELECTION_CURRENT,
	68	H4032L_TRIGGER_DATA_SELECTION_PREV
	69	};
6a25fa42	70
5089a143 AZ	71	enum h4032l_status {
	72	H4032L_STATUS_IDLE,
	73	H4032L_STATUS_CMD_CONFIGURE,
	74	H4032L_STATUS_CMD_STATUS,
	75	H4032L_STATUS_RESPONSE_STATUS,
	76	H4032L_STATUS_RESPONSE_STATUS_RETRY,
	77	H4032L_STATUS_RESPONSE_STATUS_CONTINUE,
	78	H4032L_STATUS_CMD_GET,
	79	H4032L_STATUS_FIRST_TRANSFER,
28f2d07f	80	H4032L_STATUS_TRANSFER
5089a143	81	};
6a25fa42	82
e80e1858 AV	83	#pragma pack(push,2)
e80e1858 AV	84	struct h4032l_trigger {
5089a143 AZ	85	struct {
	86	uint32_t edge_signal:5;
	87	uint32_t edge_type:2;
	88	uint32_t :1;
	89	uint32_t data_range_type:2;
	90	uint32_t time_range_type:2;
	91	uint32_t data_range_enabled:1;
	92	uint32_t time_range_enabled:1;
	93	uint32_t :2;
	94	uint32_t data_sel:2;
	95	uint32_t combined_enabled:1;
	96	} flags;
	97	uint32_t data_range_min;
	98	uint32_t data_range_max;
	99	uint32_t time_range_min;
	100	uint32_t time_range_max;
	101	uint32_t data_range_mask;
	102	uint32_t combine_mask;
	103	uint32_t combine_data;
	104	};
6a25fa42	105
e80e1858	106	struct h4032l_cmd_pkt {
5089a143 AZ	107	uint16_t magic; /* 0x017f */
	108	uint8_t sample_rate;
	109	struct {
	110	uint8_t enable_trigger1:1;
	111	uint8_t enable_trigger2:1;
	112	uint8_t trigger_and_logic:1;
	113	} trig_flags;
	114	uint16_t pwm_a;
	115	uint16_t pwm_b;
	116	uint16_t reserved;
	117	uint32_t sample_size; /* Sample depth in bits per channel, 2k-64M, must be multiple of 512. */
	118	uint32_t pre_trigger_size; /* Pretrigger buffer depth in bits, must be < sample_size. */
	119	struct h4032l_trigger trigger[2];
	120	uint16_t cmd;
	121	};
e80e1858	122	#pragma pack(pop)
5089a143 AZ	123
	124	struct dev_context {
	125	enum h4032l_status status;
2958315d	126	int submitted_transfers;
5089a143	127	uint32_t remaining_samples;
a5b9880e	128	gboolean acq_aborted;
5089a143	129	struct h4032l_cmd_pkt cmd_pkt;
2958315d AV	130	unsigned int num_transfers;
2958315d AV	131	struct libusb_transfer **transfers;
5089a143 AZ	132	uint8_t buffer[512];
5089a143 AZ	133	uint64_t capture_ratio;
7a7afc00	134	uint32_t fpga_version;
6a25fa42 AZ	135	};
6a25fa42 AZ	136
5089a143 AZ	137	SR_PRIV int h4032l_receive_data(int fd, int revents, void *cb_data);
	138	SR_PRIV uint16_t h4032l_voltage2pwm(double voltage);
	139	SR_PRIV void LIBUSB_CALL h4032l_usb_callback(struct libusb_transfer *transfer);
43d86035 AV	140	SR_PRIV void LIBUSB_CALL h4032l_data_transfer_callback(struct libusb_transfer *transfer);
43d86035 AV	141	SR_PRIV int h4032l_start_data_transfers(const struct sr_dev_inst *sdi);
5089a143	142	SR_PRIV int h4032l_start(const struct sr_dev_inst *sdi);
2958315d	143	SR_PRIV int h4032l_stop(struct sr_dev_inst *sdi);
5089a143	144	SR_PRIV int h4032l_dev_open(struct sr_dev_inst *sdi);
7a7afc00	145	SR_PRIV int h4032l_get_fpga_version(const struct sr_dev_inst *sdi);
6a25fa42 AZ	146
6a25fa42 AZ	147	#endif