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a1bb33af UH |
1 | /* |
2 | * This file is part of the sigrok project. | |
3 | * | |
4 | * Copyright (C) 2010 Bert Vermeulen <bert@biot.com> | |
5 | * | |
6 | * This program is free software: you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation, either version 3 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include <stdio.h> | |
21 | #include <stdint.h> | |
22 | #include <stdlib.h> | |
23 | #include <sys/types.h> | |
24 | #include <sys/stat.h> | |
25 | #include <fcntl.h> | |
26 | #include <unistd.h> | |
926b866c | 27 | #ifndef _WIN32 |
a1bb33af | 28 | #include <termios.h> |
926b866c | 29 | #endif |
a1bb33af UH |
30 | #include <string.h> |
31 | #include <sys/time.h> | |
32 | #include <inttypes.h> | |
926b866c UH |
33 | #ifdef _WIN32 |
34 | /* TODO */ | |
35 | #else | |
6937bb75 | 36 | #include <arpa/inet.h> |
926b866c | 37 | #endif |
a1bb33af | 38 | #include <glib.h> |
43fc7885 | 39 | #include <sigrok.h> |
1483577e | 40 | #include <sigrok-internal.h> |
a1bb33af | 41 | |
1fdb75e1 UH |
42 | #ifdef _WIN32 |
43 | #define O_NONBLOCK FIONBIO | |
44 | #endif | |
45 | ||
574ce498 BV |
46 | #define NUM_PROBES 32 |
47 | #define NUM_TRIGGER_STAGES 4 | |
48 | #define TRIGGER_TYPES "01" | |
49 | #define SERIAL_SPEED B115200 | |
50 | #define CLOCK_RATE MHZ(100) | |
51 | #define MIN_NUM_SAMPLES 4 | |
a1bb33af | 52 | |
43fc7885 | 53 | /* Command opcodes */ |
574ce498 BV |
54 | #define CMD_RESET 0x00 |
55 | #define CMD_ID 0x02 | |
56 | #define CMD_SET_FLAGS 0x82 | |
57 | #define CMD_SET_DIVIDER 0x80 | |
58 | #define CMD_RUN 0x01 | |
59 | #define CMD_CAPTURE_SIZE 0x81 | |
60 | #define CMD_SET_TRIGGER_MASK_0 0xc0 | |
61 | #define CMD_SET_TRIGGER_MASK_1 0xc4 | |
62 | #define CMD_SET_TRIGGER_MASK_2 0xc8 | |
63 | #define CMD_SET_TRIGGER_MASK_3 0xcc | |
64 | #define CMD_SET_TRIGGER_VALUE_0 0xc1 | |
65 | #define CMD_SET_TRIGGER_VALUE_1 0xc5 | |
66 | #define CMD_SET_TRIGGER_VALUE_2 0xc9 | |
67 | #define CMD_SET_TRIGGER_VALUE_3 0xcd | |
68 | #define CMD_SET_TRIGGER_CONFIG_0 0xc2 | |
69 | #define CMD_SET_TRIGGER_CONFIG_1 0xc6 | |
70 | #define CMD_SET_TRIGGER_CONFIG_2 0xca | |
71 | #define CMD_SET_TRIGGER_CONFIG_3 0xce | |
a1bb33af | 72 | |
43fc7885 | 73 | /* Bitmasks for CMD_FLAGS */ |
574ce498 BV |
74 | #define FLAG_DEMUX 0x01 |
75 | #define FLAG_FILTER 0x02 | |
76 | #define FLAG_CHANNELGROUP_1 0x04 | |
77 | #define FLAG_CHANNELGROUP_2 0x08 | |
78 | #define FLAG_CHANNELGROUP_3 0x10 | |
79 | #define FLAG_CHANNELGROUP_4 0x20 | |
80 | #define FLAG_CLOCK_EXTERNAL 0x40 | |
81 | #define FLAG_CLOCK_INVERTED 0x80 | |
82 | #define FLAG_RLE 0x0100 | |
a1bb33af UH |
83 | |
84 | static int capabilities[] = { | |
85 | HWCAP_LOGIC_ANALYZER, | |
86 | HWCAP_SAMPLERATE, | |
87 | HWCAP_CAPTURE_RATIO, | |
88 | HWCAP_LIMIT_SAMPLES, | |
43fc7885 | 89 | 0, |
a1bb33af UH |
90 | }; |
91 | ||
92 | static struct samplerates samplerates = { | |
6937bb75 | 93 | 10, |
a1bb33af UH |
94 | MHZ(200), |
95 | 1, | |
43fc7885 | 96 | 0, |
a1bb33af UH |
97 | }; |
98 | ||
43fc7885 | 99 | /* List of struct serial_device_instance */ |
a1bb33af UH |
100 | static GSList *device_instances = NULL; |
101 | ||
43fc7885 | 102 | /* Current state of the flag register */ |
6937bb75 | 103 | static uint32_t flag_reg = 0; |
a1bb33af UH |
104 | |
105 | static uint64_t cur_samplerate = 0; | |
106 | static uint64_t limit_samples = 0; | |
43fc7885 UH |
107 | /* |
108 | * Pre/post trigger capture ratio, in percentage. | |
109 | * 0 means no pre-trigger data. | |
110 | */ | |
6937bb75 | 111 | static int capture_ratio = 0; |
a803c0db | 112 | static int trigger_at = -1; |
43fc7885 UH |
113 | static uint32_t probe_mask = 0xffffffff; |
114 | static uint32_t trigger_mask[4] = { 0, 0, 0, 0 }; | |
115 | static uint32_t trigger_value[4] = { 0, 0, 0, 0 }; | |
a803c0db | 116 | static int num_stages = 0; |
a1bb33af | 117 | |
6937bb75 | 118 | static int send_shortcommand(int fd, uint8_t command) |
a1bb33af UH |
119 | { |
120 | char buf[1]; | |
121 | ||
edc508d4 | 122 | g_debug("ols: sending cmd 0x%.2x", command); |
a1bb33af | 123 | buf[0] = command; |
2119ab03 | 124 | if (serial_write(fd, buf, 1) != 1) |
e31b636d | 125 | return SIGROK_ERR; |
a1bb33af UH |
126 | |
127 | return SIGROK_OK; | |
128 | } | |
129 | ||
6937bb75 | 130 | static int send_longcommand(int fd, uint8_t command, uint32_t data) |
a1bb33af UH |
131 | { |
132 | char buf[5]; | |
133 | ||
edc508d4 | 134 | g_debug("ols: sending cmd 0x%.2x data 0x%.8x", command, data); |
a1bb33af | 135 | buf[0] = command; |
6937bb75 BV |
136 | buf[1] = (data & 0xff000000) >> 24; |
137 | buf[2] = (data & 0xff0000) >> 16; | |
138 | buf[3] = (data & 0xff00) >> 8; | |
139 | buf[4] = data & 0xff; | |
2119ab03 | 140 | if (serial_write(fd, buf, 5) != 5) |
e31b636d | 141 | return SIGROK_ERR; |
a1bb33af UH |
142 | |
143 | return SIGROK_OK; | |
144 | } | |
145 | ||
146 | static int configure_probes(GSList *probes) | |
147 | { | |
148 | struct probe *probe; | |
149 | GSList *l; | |
6937bb75 | 150 | int probe_bit, stage, i; |
a1bb33af UH |
151 | char *tc; |
152 | ||
153 | probe_mask = 0; | |
43fc7885 | 154 | for (i = 0; i < NUM_TRIGGER_STAGES; i++) { |
a1bb33af UH |
155 | trigger_mask[i] = 0; |
156 | trigger_value[i] = 0; | |
157 | } | |
158 | ||
a803c0db | 159 | num_stages = 0; |
43fc7885 UH |
160 | for (l = probes; l; l = l->next) { |
161 | probe = (struct probe *)l->data; | |
162 | if (!probe->enabled) | |
6937bb75 BV |
163 | continue; |
164 | ||
43fc7885 UH |
165 | /* |
166 | * Set up the probe mask for later configuration into the | |
167 | * flag register. | |
168 | */ | |
a1bb33af UH |
169 | probe_bit = 1 << (probe->index - 1); |
170 | probe_mask |= probe_bit; | |
6937bb75 | 171 | |
a803c0db | 172 | if (!probe->trigger) |
6937bb75 BV |
173 | continue; |
174 | ||
43fc7885 | 175 | /* Configure trigger mask and value. */ |
6937bb75 | 176 | stage = 0; |
43fc7885 | 177 | for (tc = probe->trigger; tc && *tc; tc++) { |
6937bb75 | 178 | trigger_mask[stage] |= probe_bit; |
43fc7885 | 179 | if (*tc == '1') |
6937bb75 BV |
180 | trigger_value[stage] |= probe_bit; |
181 | stage++; | |
43fc7885 UH |
182 | if (stage > 3) |
183 | /* | |
184 | * TODO: Only supporting parallel mode, with | |
185 | * up to 4 stages. | |
186 | */ | |
54dc4bc7 | 187 | return SIGROK_ERR; |
a1bb33af | 188 | } |
a803c0db BV |
189 | if (stage > num_stages) |
190 | num_stages = stage; | |
a1bb33af UH |
191 | } |
192 | ||
a1bb33af UH |
193 | return SIGROK_OK; |
194 | } | |
195 | ||
a803c0db | 196 | static uint32_t reverse16(uint32_t in) |
6937bb75 BV |
197 | { |
198 | uint32_t out; | |
199 | ||
a803c0db BV |
200 | out = (in & 0xff) << 8; |
201 | out |= (in & 0xff00) >> 8; | |
202 | out |= (in & 0xff0000) << 8; | |
203 | out |= (in & 0xff000000) >> 8; | |
204 | ||
205 | return out; | |
206 | } | |
207 | ||
208 | static uint32_t reverse32(uint32_t in) | |
209 | { | |
210 | uint32_t out; | |
211 | ||
212 | out = (in & 0xff) << 24; | |
213 | out |= (in & 0xff00) << 8; | |
214 | out |= (in & 0xff0000) >> 8; | |
215 | out |= (in & 0xff000000) >> 24; | |
216 | ||
217 | return out; | |
6937bb75 BV |
218 | } |
219 | ||
a1bb33af UH |
220 | static int hw_init(char *deviceinfo) |
221 | { | |
222 | struct sigrok_device_instance *sdi; | |
223 | GSList *ports, *l; | |
224 | GPollFD *fds; | |
6937bb75 | 225 | int devcnt, final_devcnt, num_ports, fd, ret, i; |
d02a535e | 226 | char buf[8], **device_names, **serial_params; |
a1bb33af | 227 | |
43fc7885 | 228 | if (deviceinfo) |
6937bb75 | 229 | ports = g_slist_append(NULL, strdup(deviceinfo)); |
a1bb33af | 230 | else |
43fc7885 | 231 | /* No specific device given, so scan all serial ports. */ |
a1bb33af UH |
232 | ports = list_serial_ports(); |
233 | ||
234 | num_ports = g_slist_length(ports); | |
6937bb75 | 235 | fds = calloc(1, num_ports * sizeof(GPollFD)); |
43fc7885 UH |
236 | device_names = malloc(num_ports * sizeof(char *)); |
237 | serial_params = malloc(num_ports * sizeof(char *)); | |
a1bb33af | 238 | devcnt = 0; |
43fc7885 UH |
239 | for (l = ports; l; l = l->next) { |
240 | /* The discovery procedure is like this: first send the Reset | |
241 | * command (0x00) 5 times, since the device could be anywhere | |
242 | * in a 5-byte command. Then send the ID command (0x02). | |
243 | * If the device responds with 4 bytes ("OLS1" or "SLA1"), we | |
244 | * have a match. | |
245 | * | |
246 | * Since it may take the device a while to respond at 115Kb/s, | |
247 | * we do all the sending first, then wait for all of them to | |
248 | * respond with g_poll(). | |
a1bb33af | 249 | */ |
e6ac9ac8 | 250 | g_message("ols: probing %s...", (char *)l->data); |
d02a535e | 251 | fd = serial_open(l->data, O_RDWR | O_NONBLOCK); |
43fc7885 | 252 | if (fd != -1) { |
d02a535e BV |
253 | serial_params[devcnt] = serial_backup_params(fd); |
254 | serial_set_params(fd, 115200, 8, 0, 1, 2); | |
6937bb75 | 255 | ret = SIGROK_OK; |
43fc7885 UH |
256 | for (i = 0; i < 5; i++) { |
257 | if ((ret = send_shortcommand(fd, | |
258 | CMD_RESET)) != SIGROK_OK) { | |
259 | /* Serial port is not writable. */ | |
6937bb75 BV |
260 | break; |
261 | } | |
a1bb33af | 262 | } |
43fc7885 UH |
263 | if (ret != SIGROK_OK) { |
264 | serial_restore_params(fd, | |
265 | serial_params[devcnt]); | |
d02a535e | 266 | serial_close(fd); |
6937bb75 | 267 | continue; |
d02a535e | 268 | } |
6937bb75 BV |
269 | send_shortcommand(fd, CMD_ID); |
270 | fds[devcnt].fd = fd; | |
271 | fds[devcnt].events = G_IO_IN; | |
272 | device_names[devcnt] = strdup(l->data); | |
273 | devcnt++; | |
a1bb33af | 274 | } |
6937bb75 | 275 | free(l->data); |
a1bb33af UH |
276 | } |
277 | ||
5b15b41e PS |
278 | /* 2ms isn't enough for reliable transfer with pl2303, let's try 10 */ |
279 | usleep(10000); | |
a1bb33af UH |
280 | |
281 | final_devcnt = 0; | |
282 | g_poll(fds, devcnt, 1); | |
43fc7885 UH |
283 | for (i = 0; i < devcnt; i++) { |
284 | if (fds[i].revents == G_IO_IN) { | |
2119ab03 | 285 | if (serial_read(fds[i].fd, buf, 4) == 4) { |
43fc7885 UH |
286 | if (!strncmp(buf, "1SLO", 4) |
287 | || !strncmp(buf, "1ALS", 4)) { | |
288 | if (!strncmp(buf, "1SLO", 4)) | |
289 | sdi = sigrok_device_instance_new | |
290 | (final_devcnt, ST_INACTIVE, | |
291 | "Openbench", | |
292 | "Logic Sniffer", "v1.0"); | |
a1bb33af | 293 | else |
43fc7885 UH |
294 | sdi = sigrok_device_instance_new |
295 | (final_devcnt, ST_INACTIVE, | |
e6ac9ac8 | 296 | "Openbench", "Logic Sniffer", |
43fc7885 UH |
297 | "v1.0"); |
298 | sdi->serial = serial_device_instance_new | |
299 | (device_names[i], -1); | |
300 | device_instances = | |
301 | g_slist_append(device_instances, sdi); | |
a1bb33af | 302 | final_devcnt++; |
d02a535e | 303 | serial_close(fds[i].fd); |
a1bb33af UH |
304 | fds[i].fd = 0; |
305 | } | |
306 | } | |
6937bb75 | 307 | free(device_names[i]); |
a1bb33af UH |
308 | } |
309 | ||
43fc7885 | 310 | if (fds[i].fd != 0) { |
d02a535e BV |
311 | serial_restore_params(fds[i].fd, serial_params[i]); |
312 | serial_close(fds[i].fd); | |
6937bb75 | 313 | } |
d02a535e | 314 | free(serial_params[i]); |
a1bb33af UH |
315 | } |
316 | ||
6937bb75 BV |
317 | free(fds); |
318 | free(device_names); | |
d02a535e | 319 | free(serial_params); |
a1bb33af UH |
320 | g_slist_free(ports); |
321 | ||
6937bb75 BV |
322 | cur_samplerate = samplerates.low; |
323 | ||
a1bb33af UH |
324 | return final_devcnt; |
325 | } | |
326 | ||
a1bb33af UH |
327 | static int hw_opendev(int device_index) |
328 | { | |
329 | struct sigrok_device_instance *sdi; | |
330 | ||
43fc7885 | 331 | if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) |
e31b636d | 332 | return SIGROK_ERR; |
a1bb33af | 333 | |
d02a535e | 334 | sdi->serial->fd = serial_open(sdi->serial->port, O_RDWR); |
43fc7885 | 335 | if (sdi->serial->fd == -1) |
e31b636d | 336 | return SIGROK_ERR; |
a1bb33af UH |
337 | |
338 | sdi->status = ST_ACTIVE; | |
339 | ||
340 | return SIGROK_OK; | |
341 | } | |
342 | ||
a1bb33af UH |
343 | static void hw_closedev(int device_index) |
344 | { | |
345 | struct sigrok_device_instance *sdi; | |
346 | ||
43fc7885 | 347 | if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) |
a1bb33af UH |
348 | return; |
349 | ||
43fc7885 | 350 | if (sdi->serial->fd != -1) { |
d02a535e | 351 | serial_close(sdi->serial->fd); |
a1bb33af UH |
352 | sdi->serial->fd = -1; |
353 | sdi->status = ST_INACTIVE; | |
354 | } | |
a1bb33af UH |
355 | } |
356 | ||
a1bb33af UH |
357 | static void hw_cleanup(void) |
358 | { | |
359 | GSList *l; | |
360 | struct sigrok_device_instance *sdi; | |
361 | ||
43fc7885 UH |
362 | /* Properly close all devices. */ |
363 | for (l = device_instances; l; l = l->next) { | |
a1bb33af | 364 | sdi = l->data; |
43fc7885 | 365 | if (sdi->serial->fd != -1) |
d02a535e | 366 | serial_close(sdi->serial->fd); |
a1bb33af UH |
367 | sigrok_device_instance_free(sdi); |
368 | } | |
369 | g_slist_free(device_instances); | |
370 | device_instances = NULL; | |
a1bb33af UH |
371 | } |
372 | ||
a1bb33af UH |
373 | static void *hw_get_device_info(int device_index, int device_info_id) |
374 | { | |
375 | struct sigrok_device_instance *sdi; | |
376 | void *info; | |
377 | ||
43fc7885 | 378 | if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) |
a1bb33af UH |
379 | return NULL; |
380 | ||
381 | info = NULL; | |
43fc7885 | 382 | switch (device_info_id) { |
a1bb33af UH |
383 | case DI_INSTANCE: |
384 | info = sdi; | |
385 | break; | |
386 | case DI_NUM_PROBES: | |
387 | info = GINT_TO_POINTER(NUM_PROBES); | |
388 | break; | |
389 | case DI_SAMPLERATES: | |
390 | info = &samplerates; | |
391 | break; | |
392 | case DI_TRIGGER_TYPES: | |
43fc7885 | 393 | info = (char *)TRIGGER_TYPES; |
a1bb33af | 394 | break; |
4c100f32 | 395 | case DI_CUR_SAMPLERATE: |
a1bb33af UH |
396 | info = &cur_samplerate; |
397 | break; | |
398 | } | |
399 | ||
400 | return info; | |
401 | } | |
402 | ||
a1bb33af UH |
403 | static int hw_get_status(int device_index) |
404 | { | |
405 | struct sigrok_device_instance *sdi; | |
406 | ||
43fc7885 | 407 | if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) |
a1bb33af UH |
408 | return ST_NOT_FOUND; |
409 | ||
410 | return sdi->status; | |
411 | } | |
412 | ||
a1bb33af UH |
413 | static int *hw_get_capabilities(void) |
414 | { | |
a1bb33af UH |
415 | return capabilities; |
416 | } | |
417 | ||
43fc7885 UH |
418 | static int set_configuration_samplerate(struct sigrok_device_instance *sdi, |
419 | uint64_t samplerate) | |
a1bb33af UH |
420 | { |
421 | uint32_t divider; | |
422 | ||
43fc7885 | 423 | if (samplerate < samplerates.low || samplerate > samplerates.high) |
e31b636d | 424 | return SIGROK_ERR_SAMPLERATE; |
a1bb33af | 425 | |
43fc7885 | 426 | if (samplerate > CLOCK_RATE) { |
a1bb33af | 427 | flag_reg |= FLAG_DEMUX; |
6937bb75 | 428 | divider = (CLOCK_RATE * 2 / samplerate) - 1; |
43fc7885 | 429 | } else { |
6937bb75 BV |
430 | flag_reg &= ~FLAG_DEMUX; |
431 | divider = (CLOCK_RATE / samplerate) - 1; | |
a1bb33af | 432 | } |
a1bb33af | 433 | |
e6ac9ac8 | 434 | g_message("ols: setting samplerate to %" PRIu64 " Hz (divider %u, demux %s)", |
a803c0db | 435 | samplerate, divider, flag_reg & FLAG_DEMUX ? "on" : "off"); |
43fc7885 | 436 | |
a803c0db | 437 | if (send_longcommand(sdi->serial->fd, CMD_SET_DIVIDER, reverse32(divider)) != SIGROK_OK) |
e31b636d | 438 | return SIGROK_ERR; |
a1bb33af UH |
439 | cur_samplerate = samplerate; |
440 | ||
441 | return SIGROK_OK; | |
442 | } | |
443 | ||
a1bb33af UH |
444 | static int hw_set_configuration(int device_index, int capability, void *value) |
445 | { | |
446 | struct sigrok_device_instance *sdi; | |
447 | int ret; | |
448 | uint64_t *tmp_u64; | |
449 | ||
43fc7885 | 450 | if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) |
e31b636d | 451 | return SIGROK_ERR; |
a1bb33af | 452 | |
43fc7885 | 453 | if (sdi->status != ST_ACTIVE) |
e31b636d | 454 | return SIGROK_ERR; |
a1bb33af | 455 | |
a803c0db BV |
456 | switch (capability) { |
457 | case HWCAP_SAMPLERATE: | |
a1bb33af UH |
458 | tmp_u64 = value; |
459 | ret = set_configuration_samplerate(sdi, *tmp_u64); | |
a803c0db BV |
460 | break; |
461 | case HWCAP_PROBECONFIG: | |
43fc7885 | 462 | ret = configure_probes((GSList *) value); |
a803c0db BV |
463 | break; |
464 | case HWCAP_LIMIT_SAMPLES: | |
2458ea65 | 465 | tmp_u64 = value; |
574ce498 BV |
466 | if (*tmp_u64 < MIN_NUM_SAMPLES) |
467 | return SIGROK_ERR; | |
2458ea65 | 468 | limit_samples = *tmp_u64; |
e6ac9ac8 | 469 | g_message("ols: sample limit %" PRIu64, limit_samples); |
a1bb33af | 470 | ret = SIGROK_OK; |
a803c0db BV |
471 | break; |
472 | case HWCAP_CAPTURE_RATIO: | |
473 | tmp_u64 = value; | |
474 | capture_ratio = *tmp_u64; | |
43fc7885 | 475 | if (capture_ratio < 0 || capture_ratio > 100) { |
a1bb33af | 476 | capture_ratio = 0; |
e31b636d | 477 | ret = SIGROK_ERR; |
43fc7885 | 478 | } else |
a1bb33af | 479 | ret = SIGROK_OK; |
a803c0db BV |
480 | break; |
481 | default: | |
e31b636d | 482 | ret = SIGROK_ERR; |
43fc7885 | 483 | } |
a1bb33af UH |
484 | |
485 | return ret; | |
486 | } | |
487 | ||
a1bb33af UH |
488 | static int receive_data(int fd, int revents, void *user_data) |
489 | { | |
afc8e4de | 490 | static unsigned int num_transfers = 0; |
a1bb33af | 491 | static int num_bytes = 0; |
43fc7885 UH |
492 | static char last_sample[4] = { 0xff, 0xff, 0xff, 0xff }; |
493 | static unsigned char sample[4] = { 0, 0, 0, 0 }; | |
494 | static unsigned char tmp_sample[4]; | |
a803c0db BV |
495 | static unsigned char *raw_sample_buf = NULL; |
496 | int count, buflen, num_channels, offset, i, j; | |
a1bb33af UH |
497 | struct datafeed_packet packet; |
498 | unsigned char byte, *buffer; | |
499 | ||
43fc7885 UH |
500 | if (num_transfers++ == 0) { |
501 | /* | |
502 | * First time round, means the device started sending data, | |
503 | * and will not stop until done. If it stops sending for | |
504 | * longer than it takes to send a byte, that means it's | |
505 | * finished. We'll double that to 30ms to be sure... | |
a1bb33af UH |
506 | */ |
507 | source_remove(fd); | |
a803c0db BV |
508 | source_add(fd, G_IO_IN, 30, receive_data, user_data); |
509 | raw_sample_buf = malloc(limit_samples * 4); | |
510 | /* fill with 1010... for debugging */ | |
511 | memset(raw_sample_buf, 0x82, limit_samples * 4); | |
a1bb33af UH |
512 | } |
513 | ||
6937bb75 | 514 | num_channels = 0; |
43fc7885 UH |
515 | for (i = 0x20; i > 0x02; i /= 2) { |
516 | if ((flag_reg & i) == 0) | |
6937bb75 | 517 | num_channels++; |
43fc7885 | 518 | } |
6937bb75 | 519 | |
43fc7885 UH |
520 | if (revents == G_IO_IN |
521 | && num_transfers / num_channels <= limit_samples) { | |
2119ab03 | 522 | if (serial_read(fd, &byte, 1) != 1) |
a1bb33af UH |
523 | return FALSE; |
524 | ||
525 | sample[num_bytes++] = byte; | |
e6ac9ac8 | 526 | g_debug("ols: received byte 0x%.2x", byte); |
43fc7885 | 527 | if (num_bytes == num_channels) { |
e6ac9ac8 | 528 | g_debug("ols: received sample 0x%.*x", num_bytes * 2, (int) *sample); |
43fc7885 UH |
529 | /* Got a full sample. */ |
530 | if (flag_reg & FLAG_RLE) { | |
531 | /* | |
532 | * In RLE mode -1 should never come in as a | |
533 | * sample, because bit 31 is the "count" flag. | |
534 | * TODO: Endianness may be wrong here, could be | |
535 | * sample[3]. | |
536 | */ | |
537 | if (sample[0] & 0x80 | |
538 | && !(last_sample[0] & 0x80)) { | |
539 | count = (int)(*sample) & 0x7fffffff; | |
a1bb33af UH |
540 | buffer = g_malloc(count); |
541 | buflen = 0; | |
43fc7885 | 542 | for (i = 0; i < count; i++) { |
a803c0db | 543 | memcpy(buffer + buflen, last_sample, 4); |
a1bb33af UH |
544 | buflen += 4; |
545 | } | |
43fc7885 UH |
546 | } else { |
547 | /* | |
548 | * Just a single sample, next sample | |
549 | * will probably be a count referring | |
550 | * to this -- but this one is still a | |
551 | * part of the stream. | |
a1bb33af UH |
552 | */ |
553 | buffer = sample; | |
554 | buflen = 4; | |
555 | } | |
43fc7885 UH |
556 | } else { |
557 | /* No compression. */ | |
a1bb33af UH |
558 | buffer = sample; |
559 | buflen = 4; | |
560 | } | |
561 | ||
43fc7885 UH |
562 | if (num_channels < 4) { |
563 | /* | |
564 | * Some channel groups may have been turned | |
565 | * off, to speed up transfer between the | |
566 | * hardware and the PC. Expand that here before | |
567 | * submitting it over the session bus -- | |
568 | * whatever is listening on the bus will be | |
569 | * expecting a full 32-bit sample, based on | |
570 | * the number of probes. | |
6937bb75 BV |
571 | */ |
572 | j = 0; | |
573 | memset(tmp_sample, 0, 4); | |
43fc7885 | 574 | for (i = 0; i < 4; i++) { |
a803c0db | 575 | if (((flag_reg >> 2) & (1 << i)) == 0) { |
43fc7885 UH |
576 | /* |
577 | * This channel group was | |
578 | * enabled, copy from received | |
579 | * sample. | |
580 | */ | |
6937bb75 BV |
581 | tmp_sample[i] = sample[j++]; |
582 | } | |
583 | } | |
584 | memcpy(sample, tmp_sample, 4); | |
e6ac9ac8 | 585 | g_debug("ols: full sample 0x%.8x", (int) *sample); |
6937bb75 BV |
586 | } |
587 | ||
a803c0db BV |
588 | /* the OLS sends its sample buffer backwards. |
589 | * store it in reverse order here, so we can dump | |
590 | * this on the session bus later. | |
591 | */ | |
f0d1b53e | 592 | offset = (limit_samples - num_transfers / num_channels) * 4; |
a803c0db BV |
593 | memcpy(raw_sample_buf + offset, sample, 4); |
594 | ||
43fc7885 | 595 | if (buffer == sample) |
6937bb75 | 596 | memcpy(last_sample, buffer, num_channels); |
a1bb33af UH |
597 | else |
598 | g_free(buffer); | |
599 | ||
6937bb75 | 600 | memset(sample, 0, 4); |
a1bb33af UH |
601 | num_bytes = 0; |
602 | } | |
43fc7885 UH |
603 | } else { |
604 | /* | |
605 | * This is the main loop telling us a timeout was reached, or | |
606 | * we've acquired all the samples we asked for -- we're done. | |
a803c0db | 607 | * Send the (properly-ordered) buffer to the frontend. |
43fc7885 | 608 | */ |
a803c0db BV |
609 | if (trigger_at != -1) { |
610 | /* a trigger was set up, so we need to tell the frontend | |
611 | * about it. | |
612 | */ | |
613 | if (trigger_at > 0) { | |
614 | /* there are pre-trigger samples, send those first */ | |
4c046c6b | 615 | packet.type = DF_LOGIC; |
a803c0db | 616 | packet.length = trigger_at * 4; |
4c046c6b | 617 | packet.unitsize = 4; |
a803c0db BV |
618 | packet.payload = raw_sample_buf; |
619 | session_bus(user_data, &packet); | |
620 | } | |
621 | ||
622 | packet.type = DF_TRIGGER; | |
623 | packet.length = 0; | |
624 | session_bus(user_data, &packet); | |
625 | ||
4c046c6b | 626 | packet.type = DF_LOGIC; |
a803c0db | 627 | packet.length = (limit_samples * 4) - (trigger_at * 4); |
4c046c6b | 628 | packet.unitsize = 4; |
a803c0db BV |
629 | packet.payload = raw_sample_buf + trigger_at * 4; |
630 | session_bus(user_data, &packet); | |
631 | } else { | |
4c046c6b | 632 | packet.type = DF_LOGIC; |
a803c0db | 633 | packet.length = limit_samples * 4; |
4c046c6b | 634 | packet.unitsize = 4; |
a803c0db BV |
635 | packet.payload = raw_sample_buf; |
636 | session_bus(user_data, &packet); | |
637 | } | |
638 | free(raw_sample_buf); | |
639 | ||
06d64eb8 | 640 | serial_flush(fd); |
d02a535e | 641 | serial_close(fd); |
a1bb33af UH |
642 | packet.type = DF_END; |
643 | packet.length = 0; | |
644 | session_bus(user_data, &packet); | |
645 | } | |
646 | ||
647 | return TRUE; | |
648 | } | |
649 | ||
a1bb33af UH |
650 | static int hw_start_acquisition(int device_index, gpointer session_device_id) |
651 | { | |
43fc7885 | 652 | int i; |
a1bb33af UH |
653 | struct datafeed_packet *packet; |
654 | struct datafeed_header *header; | |
655 | struct sigrok_device_instance *sdi; | |
a803c0db | 656 | uint32_t trigger_config[4]; |
a1bb33af | 657 | uint32_t data; |
6937bb75 BV |
658 | uint16_t readcount, delaycount; |
659 | uint8_t changrp_mask; | |
a1bb33af | 660 | |
43fc7885 | 661 | if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) |
e31b636d | 662 | return SIGROK_ERR; |
a1bb33af | 663 | |
43fc7885 | 664 | if (sdi->status != ST_ACTIVE) |
e31b636d | 665 | return SIGROK_ERR; |
a1bb33af | 666 | |
a803c0db BV |
667 | readcount = limit_samples / 4; |
668 | ||
669 | memset(trigger_config, 0, 16); | |
670 | trigger_config[num_stages-1] |= 0x08; | |
43fc7885 | 671 | if (trigger_mask[0]) { |
a803c0db BV |
672 | delaycount = readcount * (1 - capture_ratio / 100.0); |
673 | trigger_at = (readcount - delaycount) * 4 - num_stages; | |
a803c0db | 674 | |
43fc7885 | 675 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_MASK_0, |
a803c0db | 676 | reverse32(trigger_mask[0])) != SIGROK_OK) |
54dc4bc7 | 677 | return SIGROK_ERR; |
a803c0db BV |
678 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_VALUE_0, |
679 | reverse32(trigger_value[0])) != SIGROK_OK) | |
54dc4bc7 | 680 | return SIGROK_ERR; |
a803c0db BV |
681 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_CONFIG_0, |
682 | trigger_config[0]) != SIGROK_OK) | |
54dc4bc7 | 683 | return SIGROK_ERR; |
6937bb75 | 684 | |
a803c0db BV |
685 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_MASK_1, |
686 | reverse32(trigger_mask[1])) != SIGROK_OK) | |
54dc4bc7 | 687 | return SIGROK_ERR; |
43fc7885 | 688 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_VALUE_1, |
a803c0db | 689 | reverse32(trigger_value[1])) != SIGROK_OK) |
54dc4bc7 | 690 | return SIGROK_ERR; |
a803c0db BV |
691 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_CONFIG_1, |
692 | trigger_config[1]) != SIGROK_OK) | |
54dc4bc7 | 693 | return SIGROK_ERR; |
6937bb75 | 694 | |
a803c0db BV |
695 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_MASK_2, |
696 | reverse32(trigger_mask[2])) != SIGROK_OK) | |
54dc4bc7 | 697 | return SIGROK_ERR; |
a803c0db BV |
698 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_VALUE_2, |
699 | reverse32(trigger_value[2])) != SIGROK_OK) | |
54dc4bc7 | 700 | return SIGROK_ERR; |
43fc7885 | 701 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_CONFIG_2, |
a803c0db BV |
702 | trigger_config[2]) != SIGROK_OK) |
703 | return SIGROK_ERR; | |
704 | ||
705 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_MASK_3, | |
706 | reverse32(trigger_mask[3])) != SIGROK_OK) | |
707 | return SIGROK_ERR; | |
708 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_VALUE_3, | |
709 | reverse32(trigger_value[3])) != SIGROK_OK) | |
54dc4bc7 | 710 | return SIGROK_ERR; |
43fc7885 | 711 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_CONFIG_3, |
a803c0db | 712 | trigger_config[3]) != SIGROK_OK) |
54dc4bc7 | 713 | return SIGROK_ERR; |
6937bb75 | 714 | } else { |
43fc7885 UH |
715 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_MASK_0, |
716 | trigger_mask[0]) != SIGROK_OK) | |
54dc4bc7 | 717 | return SIGROK_ERR; |
43fc7885 UH |
718 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_VALUE_0, |
719 | trigger_value[0]) != SIGROK_OK) | |
54dc4bc7 | 720 | return SIGROK_ERR; |
43fc7885 UH |
721 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_CONFIG_0, |
722 | 0x00000008) != SIGROK_OK) | |
54dc4bc7 | 723 | return SIGROK_ERR; |
a803c0db | 724 | delaycount = readcount; |
6937bb75 | 725 | } |
a1bb33af | 726 | |
6937bb75 | 727 | set_configuration_samplerate(sdi, cur_samplerate); |
a1bb33af | 728 | |
43fc7885 | 729 | /* Send sample limit and pre/post-trigger capture ratio. */ |
a803c0db BV |
730 | data = ((readcount - 1) & 0xffff) << 16; |
731 | data |= (delaycount - 1) & 0xffff; | |
732 | if (send_longcommand(sdi->serial->fd, CMD_CAPTURE_SIZE, reverse16(data)) != SIGROK_OK) | |
e31b636d | 733 | return SIGROK_ERR; |
a1bb33af | 734 | |
43fc7885 UH |
735 | /* |
736 | * Enable/disable channel groups in the flag register according to the | |
a803c0db | 737 | * probe mask. |
6937bb75 BV |
738 | */ |
739 | changrp_mask = 0; | |
43fc7885 UH |
740 | for (i = 0; i < 4; i++) { |
741 | if (probe_mask & (0xff << (i * 8))) | |
a803c0db | 742 | changrp_mask |= (1 << i); |
6937bb75 | 743 | } |
43fc7885 UH |
744 | |
745 | /* The flag register wants them here, and 1 means "disable channel". */ | |
6937bb75 | 746 | flag_reg |= ~(changrp_mask << 2) & 0x3c; |
a803c0db | 747 | flag_reg |= FLAG_FILTER; |
6937bb75 | 748 | data = flag_reg << 24; |
43fc7885 | 749 | if (send_longcommand(sdi->serial->fd, CMD_SET_FLAGS, data) != SIGROK_OK) |
54dc4bc7 | 750 | return SIGROK_ERR; |
a1bb33af | 751 | |
43fc7885 UH |
752 | /* Start acquisition on the device. */ |
753 | if (send_shortcommand(sdi->serial->fd, CMD_RUN) != SIGROK_OK) | |
e31b636d | 754 | return SIGROK_ERR; |
a1bb33af | 755 | |
43fc7885 UH |
756 | source_add(sdi->serial->fd, G_IO_IN, -1, receive_data, |
757 | session_device_id); | |
a1bb33af | 758 | |
43fc7885 | 759 | /* Send header packet to the session bus. */ |
a1bb33af UH |
760 | packet = g_malloc(sizeof(struct datafeed_packet)); |
761 | header = g_malloc(sizeof(struct datafeed_header)); | |
43fc7885 | 762 | if (!packet || !header) |
e31b636d | 763 | return SIGROK_ERR; |
a1bb33af UH |
764 | packet->type = DF_HEADER; |
765 | packet->length = sizeof(struct datafeed_header); | |
43fc7885 | 766 | packet->payload = (unsigned char *)header; |
a1bb33af UH |
767 | header->feed_version = 1; |
768 | gettimeofday(&header->starttime, NULL); | |
4c100f32 | 769 | header->samplerate = cur_samplerate; |
a1bb33af | 770 | header->protocol_id = PROTO_RAW; |
c2616fb9 DR |
771 | header->num_logic_probes = NUM_PROBES; |
772 | header->num_analog_probes = 0; | |
a1bb33af UH |
773 | session_bus(session_device_id, packet); |
774 | g_free(header); | |
775 | g_free(packet); | |
776 | ||
777 | return SIGROK_OK; | |
778 | } | |
779 | ||
a1bb33af UH |
780 | static void hw_stop_acquisition(int device_index, gpointer session_device_id) |
781 | { | |
782 | struct datafeed_packet packet; | |
783 | ||
17e1afcb | 784 | /* Avoid compiler warnings. */ |
afc8e4de UH |
785 | device_index = device_index; |
786 | ||
a1bb33af UH |
787 | packet.type = DF_END; |
788 | packet.length = 0; | |
789 | session_bus(session_device_id, &packet); | |
a1bb33af UH |
790 | } |
791 | ||
a1bb33af | 792 | struct device_plugin ols_plugin_info = { |
e6ac9ac8 | 793 | "ols", |
a1bb33af UH |
794 | 1, |
795 | hw_init, | |
796 | hw_cleanup, | |
a1bb33af UH |
797 | hw_opendev, |
798 | hw_closedev, | |
799 | hw_get_device_info, | |
800 | hw_get_status, | |
801 | hw_get_capabilities, | |
802 | hw_set_configuration, | |
803 | hw_start_acquisition, | |
43fc7885 | 804 | hw_stop_acquisition, |
a1bb33af | 805 | }; |