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f96a9602 MP |
1 | ## |
2 | ## This file is part of the libsigrokdecode project. | |
3 | ## | |
4 | ## Copyright (C) 2018 Michalis Pappas <mpappas@fastmail.fm> | |
5 | ## | |
6 | ## This program is free software; you can redistribute it and/or modify | |
7 | ## it under the terms of the GNU General Public License as published by | |
8 | ## the Free Software Foundation; either version 2 of the License, or | |
9 | ## (at your option) any later version. | |
10 | ## | |
11 | ## This program is distributed in the hope that it will be useful, | |
12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | ## GNU General Public License for more details. | |
15 | ## | |
16 | ## You should have received a copy of the GNU General Public License | |
17 | ## along with this program; if not, see <http://www.gnu.org/licenses/>. | |
18 | ## | |
19 | ||
20 | import sigrokdecode as srd | |
21 | ||
22 | WORD_ADDR_RESET = 0x00 | |
23 | WORD_ADDR_SLEEP = 0x01 | |
24 | WORD_ADDR_IDLE = 0x02 | |
25 | WORD_ADDR_COMMAND = 0x03 | |
26 | ||
27 | WORD_ADDR = {0x00: 'RESET', 0x01: 'SLEEP', 0x02: 'IDLE', 0x03: 'COMMAND'} | |
28 | ||
29 | OPCODE_DERIVE_KEY = 0x1c | |
30 | OPCODE_DEV_REV = 0x30 | |
31 | OPCODE_GEN_DIG = 0x15 | |
32 | OPCODE_HMAC = 0x11 | |
33 | OPCODE_CHECK_MAC = 0x28 | |
34 | OPCODE_LOCK = 0x17 | |
35 | OPCODE_MAC = 0x08 | |
36 | OPCODE_NONCE = 0x16 | |
37 | OPCODE_PAUSE = 0x01 | |
38 | OPCODE_RANDOM = 0x1b | |
39 | OPCODE_READ = 0x02 | |
40 | OPCODE_SHA = 0x47 | |
41 | OPCODE_UPDATE_EXTRA = 0x20 | |
42 | OPCODE_WRITE = 0x12 | |
43 | ||
44 | OPCODES = { | |
45 | 0x01: 'Pause', | |
46 | 0x02: 'Read', | |
47 | 0x08: 'MAC', | |
48 | 0x11: 'HMAC', | |
49 | 0x12: 'Write', | |
50 | 0x15: 'GenDig', | |
51 | 0x16: 'Nonce', | |
52 | 0x17: 'Lock', | |
53 | 0x1b: 'Random', | |
54 | 0x1c: 'DeriveKey', | |
55 | 0x20: 'UpdateExtra', | |
56 | 0x28: 'CheckMac', | |
57 | 0x30: 'DevRev', | |
58 | 0x47: 'SHA', | |
59 | } | |
60 | ||
61 | ZONE_CONFIG = 0x00 | |
62 | ZONE_OTP = 0x01 | |
63 | ZONE_DATA = 0x02 | |
64 | ||
65 | ZONES = {0x00: 'CONFIG', 0x01: 'OTP', 0x02: 'DATA'} | |
66 | ||
67 | STATUS_SUCCESS = 0x00 | |
68 | STATUS_CHECKMAC_FAIL = 0x01 | |
69 | STATUS_PARSE_ERROR = 0x03 | |
70 | STATUS_EXECUTION_ERROR = 0x0f | |
71 | STATUS_READY = 0x11 | |
72 | STATUS_CRC_COMM_ERROR = 0xff | |
73 | ||
74 | STATUS = { | |
75 | 0x00: 'Command success', | |
76 | 0x01: 'Checkmac failure', | |
77 | 0x03: 'Parse error', | |
78 | 0x0f: 'Execution error', | |
79 | 0x11: 'Ready', | |
80 | 0xff: 'CRC / communications error', | |
81 | } | |
82 | ||
83 | class Decoder(srd.Decoder): | |
84 | api_version = 3 | |
85 | id = 'atsha204a' | |
86 | name = 'ATSHA204A' | |
87 | longname = 'Microchip ATSHA204A' | |
2787cf2a | 88 | desc = 'Microchip ATSHA204A crypto authentication protocol.' |
f96a9602 MP |
89 | license = 'gplv2+' |
90 | inputs = ['i2c'] | |
6cbba91f | 91 | outputs = [] |
d6d8a8a4 | 92 | tags = ['Security/crypto', 'IC', 'Memory'] |
f96a9602 MP |
93 | annotations = ( |
94 | ('waddr', 'Word address'), | |
95 | ('count', 'Count'), | |
96 | ('opcode', 'Opcode'), | |
97 | ('param1', 'Param1'), | |
98 | ('param2', 'Param2'), | |
99 | ('data', 'Data'), | |
100 | ('crc', 'CRC'), | |
101 | ('status', 'Status'), | |
102 | ('warning', 'Warning'), | |
103 | ) | |
104 | annotation_rows = ( | |
105 | ('frame', 'Frame', (0, 1, 2, 3, 4, 5, 6)), | |
106 | ('status', 'Status', (7,)), | |
107 | ('warnings', 'Warnings', (8,)), | |
108 | ) | |
109 | ||
110 | def __init__(self): | |
719bde9b UH |
111 | self.reset() |
112 | ||
113 | def reset(self): | |
f96a9602 MP |
114 | self.state = 'IDLE' |
115 | self.waddr = self.opcode = -1 | |
116 | self.ss_block = self.es_block = 0 | |
117 | self.bytes = [] | |
118 | ||
119 | def start(self): | |
120 | self.out_ann = self.register(srd.OUTPUT_ANN) | |
121 | ||
122 | def output_tx_bytes(self): | |
d6430dff UH |
123 | b = self.bytes |
124 | if len(b) < 1: # Ignore wakeup. | |
f96a9602 | 125 | return |
d6430dff | 126 | self.waddr = b[0][2] |
26d56154 | 127 | self.put_waddr(b[0]) |
f96a9602 | 128 | if self.waddr == WORD_ADDR_COMMAND: |
d6430dff | 129 | count = b[1][2] |
26d56154 | 130 | self.put_count(b[1]) |
d6430dff | 131 | if len(b) - 1 != count: |
26d56154 | 132 | self.put_warning(b[0][0], b[-1][1], |
f96a9602 | 133 | 'Invalid frame length: Got {}, expecting {} '.format( |
8968f2fe | 134 | len(b) - 1, count)) |
f96a9602 | 135 | return |
d6430dff | 136 | self.opcode = b[2][2] |
26d56154 UH |
137 | self.put_opcode(b[2]) |
138 | self.put_param1(b[3]) | |
139 | self.put_param2([b[4], b[5]]) | |
140 | self.put_data(b[6:-2]) | |
141 | self.put_crc([b[-2], b[-1]]) | |
f96a9602 MP |
142 | |
143 | def output_rx_bytes(self): | |
d6430dff UH |
144 | b = self.bytes |
145 | count = b[0][2] | |
26d56154 | 146 | self.put_count(b[0]) |
f96a9602 | 147 | if self.waddr == WORD_ADDR_RESET: |
26d56154 UH |
148 | self.put_data([b[1]]) |
149 | self.put_crc([b[2], b[3]]) | |
150 | self.put_status(b[0][0], b[-1][1], b[1][2]) | |
f96a9602 MP |
151 | elif self.waddr == WORD_ADDR_COMMAND: |
152 | if count == 4: # Status / Error. | |
26d56154 UH |
153 | self.put_data([b[1]]) |
154 | self.put_crc([b[2], b[3]]) | |
155 | self.put_status(b[0][0], b[-1][1], b[1][2]) | |
f96a9602 | 156 | else: |
26d56154 UH |
157 | self.put_data(b[1:-2]) |
158 | self.put_crc([b[-2], b[-1]]) | |
f96a9602 | 159 | |
8968f2fe UH |
160 | def putx(self, s, data): |
161 | self.put(s[0], s[1], self.out_ann, data) | |
f96a9602 | 162 | |
8968f2fe UH |
163 | def puty(self, s, data): |
164 | self.put(s[0][0], s[1][1], self.out_ann, data) | |
f96a9602 | 165 | |
8968f2fe UH |
166 | def putz(self, ss, es, data): |
167 | self.put(ss, es, self.out_ann, data) | |
f96a9602 | 168 | |
26d56154 | 169 | def put_waddr(self, s): |
8968f2fe UH |
170 | self.putx(s, [0, ['Word addr: %s' % WORD_ADDR[s[2]]]]) |
171 | ||
26d56154 | 172 | def put_count(self, s): |
8968f2fe UH |
173 | self.putx(s, [1, ['Count: %s' % s[2]]]) |
174 | ||
26d56154 | 175 | def put_opcode(self, s): |
8968f2fe UH |
176 | self.putx(s, [2, ['Opcode: %s' % OPCODES[s[2]]]]) |
177 | ||
26d56154 | 178 | def put_param1(self, s): |
88567e4a UH |
179 | op = self.opcode |
180 | if op in (OPCODE_CHECK_MAC, OPCODE_DEV_REV, OPCODE_HMAC, \ | |
d62ee705 | 181 | OPCODE_MAC, OPCODE_NONCE, OPCODE_RANDOM, OPCODE_SHA): |
8968f2fe | 182 | self.putx(s, [3, ['Mode: %02X' % s[2]]]) |
88567e4a | 183 | elif op == OPCODE_DERIVE_KEY: |
8968f2fe | 184 | self.putx(s, [3, ['Random: %s' % s[2]]]) |
88567e4a | 185 | elif op == OPCODE_GEN_DIG: |
8968f2fe | 186 | self.putx(s, [3, ['Zone: %s' % ZONES[s[2]]]]) |
88567e4a | 187 | elif op == OPCODE_LOCK: |
8968f2fe UH |
188 | self.putx(s, [3, ['Zone: {}, Summary: {}'.format( |
189 | 'DATA/OTP' if s[2] else 'CONFIG', | |
190 | 'Ignored' if s[2] & 0x80 else 'Used')]]) | |
88567e4a | 191 | elif op == OPCODE_PAUSE: |
8968f2fe | 192 | self.putx(s, [3, ['Selector: %02X' % s[2]]]) |
88567e4a | 193 | elif op == OPCODE_READ: |
8968f2fe UH |
194 | self.putx(s, [3, ['Zone: {}, Length: {}'.format(ZONES[s[2] & 0x03], |
195 | '32 bytes' if s[2] & 0x90 else '4 bytes')]]) | |
88567e4a | 196 | elif op == OPCODE_WRITE: |
8968f2fe UH |
197 | self.putx(s, [3, ['Zone: {}, Encrypted: {}, Length: {}'.format(ZONES[s[2] & 0x03], |
198 | 'Yes' if s[2] & 0x40 else 'No', '32 bytes' if s[2] & 0x90 else '4 bytes')]]) | |
f96a9602 | 199 | else: |
8968f2fe | 200 | self.putx(s, [3, ['Param1: %02X' % s[2]]]) |
f96a9602 | 201 | |
26d56154 | 202 | def put_param2(self, s): |
88567e4a UH |
203 | op = self.opcode |
204 | if op == OPCODE_DERIVE_KEY: | |
8968f2fe | 205 | self.puty(s, [4, ['TargetKey: {:02x} {:02x}'.format(s[1][2], s[0][2])]]) |
88567e4a | 206 | elif op in (OPCODE_NONCE, OPCODE_PAUSE, OPCODE_RANDOM): |
8968f2fe | 207 | self.puty(s, [4, ['Zero: {:02x} {:02x}'.format(s[1][2], s[0][2])]]) |
88567e4a | 208 | elif op in (OPCODE_HMAC, OPCODE_MAC, OPCODE_CHECK_MAC, OPCODE_GEN_DIG): |
8968f2fe | 209 | self.puty(s, [4, ['SlotID: {:02x} {:02x}'.format(s[1][2], s[0][2])]]) |
88567e4a | 210 | elif op == OPCODE_LOCK: |
8968f2fe | 211 | self.puty(s, [4, ['Summary: {:02x} {:02x}'.format(s[1][2], s[0][2])]]) |
88567e4a | 212 | elif op in (OPCODE_READ, OPCODE_WRITE): |
8968f2fe | 213 | self.puty(s, [4, ['Address: {:02x} {:02x}'.format(s[1][2], s[0][2])]]) |
88567e4a | 214 | elif op == OPCODE_UPDATE_EXTRA: |
8968f2fe | 215 | self.puty(s, [4, ['NewValue: {:02x}'.format(s[0][2])]]) |
f96a9602 | 216 | else: |
8968f2fe | 217 | self.puty(s, [4, ['-']]) |
f96a9602 | 218 | |
26d56154 | 219 | def put_data(self, s): |
8968f2fe | 220 | if len(s) == 0: |
f96a9602 | 221 | return |
88567e4a UH |
222 | op = self.opcode |
223 | if op == OPCODE_CHECK_MAC: | |
8968f2fe UH |
224 | self.putz(s[0][0], s[31][1], [5, ['ClientChal: %s' % ' '.join(format(i[2], '02x') for i in s[0:31])]]) |
225 | self.putz(s[32][0], s[63][1], [5, ['ClientResp: %s' % ' '.join(format(i[2], '02x') for i in s[32:63])]]) | |
226 | self.putz(s[64][0], s[76][1], [5, ['OtherData: %s' % ' '.join(format(i[2], '02x') for i in s[64:76])]]) | |
88567e4a | 227 | elif op == OPCODE_DERIVE_KEY: |
8968f2fe | 228 | self.putz(s[0][0], s[31][1], [5, ['MAC: %s' % ' '.join(format(i[2], '02x') for i in s)]]) |
88567e4a | 229 | elif op == OPCODE_GEN_DIG: |
8968f2fe | 230 | self.putz(s[0][0], s[3][1], [5, ['OtherData: %s' % ' '.join(format(i[2], '02x') for i in s)]]) |
88567e4a | 231 | elif op == OPCODE_MAC: |
8968f2fe | 232 | self.putz(s[0][0], s[31][1], [5, ['Challenge: %s' % ' '.join(format(i[2], '02x') for i in s)]]) |
88567e4a | 233 | elif op == OPCODE_WRITE: |
8968f2fe UH |
234 | if len(s) > 32: # Value + MAC. |
235 | self.putz(s[0][0], s[-31][1], [5, ['Value: %s' % ' '.join(format(i[2], '02x') for i in s)]]) | |
236 | self.putz(s[-32][0], s[-1][1], [5, ['MAC: %s' % ' '.join(format(i[2], '02x') for i in s)]]) | |
f96a9602 | 237 | else: # Just value. |
8968f2fe | 238 | self.putz(s[0][0], s[-1][1], [5, ['Value: %s' % ' '.join(format(i[2], '02x') for i in s)]]) |
f96a9602 | 239 | else: |
8968f2fe | 240 | self.putz(s[0][0], s[-1][1], [5, ['Data: %s' % ' '.join(format(i[2], '02x') for i in s)]]) |
f96a9602 | 241 | |
26d56154 | 242 | def put_crc(self, s): |
8968f2fe | 243 | self.puty(s, [6, ['CRC: {:02X} {:02X}'.format(s[0][2], s[1][2])]]) |
f96a9602 | 244 | |
26d56154 | 245 | def put_status(self, ss, es, status): |
8968f2fe | 246 | self.putz(ss, es, [7, ['Status: %s' % STATUS[status]]]) |
f96a9602 | 247 | |
26d56154 | 248 | def put_warning(self, ss, es, msg): |
8968f2fe | 249 | self.putz(ss, es, [8, ['Warning: %s' % msg]]) |
f96a9602 MP |
250 | |
251 | def decode(self, ss, es, data): | |
252 | cmd, databyte = data | |
253 | ||
254 | # State machine. | |
255 | if self.state == 'IDLE': | |
256 | # Wait for an I²C START condition. | |
257 | if cmd != 'START': | |
258 | return | |
259 | self.state = 'GET SLAVE ADDR' | |
260 | self.ss_block = ss | |
261 | elif self.state == 'GET SLAVE ADDR': | |
262 | # Wait for an address read/write operation. | |
263 | if cmd == 'ADDRESS READ': | |
264 | self.state = 'READ REGS' | |
265 | elif cmd == 'ADDRESS WRITE': | |
266 | self.state = 'WRITE REGS' | |
267 | elif self.state == 'READ REGS': | |
268 | if cmd == 'DATA READ': | |
269 | self.bytes.append([ss, es, databyte]) | |
270 | elif cmd == 'STOP': | |
271 | self.es_block = es | |
272 | # Reset the opcode before received data, as this causes | |
273 | # responses to be displayed incorrectly. | |
274 | self.opcode = -1 | |
275 | self.output_rx_bytes() | |
276 | self.waddr = -1 | |
277 | self.bytes = [] | |
278 | self.state = 'IDLE' | |
279 | elif self.state == 'WRITE REGS': | |
280 | if cmd == 'DATA WRITE': | |
281 | self.bytes.append([ss, es, databyte]) | |
282 | elif cmd == 'STOP': | |
283 | self.es_block = es | |
284 | self.output_tx_bytes() | |
285 | self.bytes = [] | |
286 | self.state = 'IDLE' | |
287 |