[sigrok-firmware-fx2lafw.git] / hantek_6022bl.c

/*
 * This file is part of the sigrok-firmware-fx2lafw project.
 *
 * Copyright (C) 2009 Ubixum, Inc.
 * Copyright (C) 2015 Jochen Hoenicke
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2.1 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */

#include <fx2macros.h>
#include <fx2ints.h>
#include <autovector.h>
#include <delay.h>
#include <setupdat.h>

#define SET_ANALOG_MODE() PA7 = 1

/* Toggle the 1kHz calibration pin, only accurate up to ca. 8MHz. */
#define TOGGLE_CALIBRATION_PIN() PC2 = !PC2

#define LED_CLEAR() PC0 = 1; PC1 = 1;
#define LED_GREEN() PC0 = 1; PC1 = 0;
#define LED_RED()   PC0 = 0; PC1 = 1;

/* Change to support as many interfaces as you need. */
static BYTE altiface = 0;

static volatile WORD ledcounter = 0;

static volatile __bit dosud = FALSE;
static volatile __bit dosuspend = FALSE;

extern __code BYTE highspd_dscr;
extern __code BYTE fullspd_dscr;

void resume_isr(void) __interrupt RESUME_ISR
{
	CLEAR_RESUME();
}

void sudav_isr(void) __interrupt SUDAV_ISR
{
	dosud = TRUE;
	CLEAR_SUDAV();
}

void usbreset_isr(void) __interrupt USBRESET_ISR
{
	handle_hispeed(FALSE);
	CLEAR_USBRESET();
}

void hispeed_isr(void) __interrupt HISPEED_ISR
{
	handle_hispeed(TRUE);
	CLEAR_HISPEED();
}

void suspend_isr(void) __interrupt SUSPEND_ISR
{
	dosuspend = TRUE;
	CLEAR_SUSPEND();
}

void timer2_isr(void) __interrupt TF2_ISR
{
	TOGGLE_CALIBRATION_PIN();

	if (ledcounter && (--ledcounter == 0))
		LED_CLEAR();

	TF2 = 0;
}

/*
 * This sets three bits for each channel, one channel at a time.
 * For channel 0 we want to set bits 1, 2 & 3
 * For channel 1 we want to set bits 4, 5 & 6
 *
 * We convert the input values that are strange due to original
 * firmware code into the value of the three bits as follows:
 *
 * val -> bits
 * 1  -> 010b
 * 2  -> 001b
 * 5  -> 000b
 * 10 -> 011b
 *
 * The third bit is always zero since there are only four outputs connected
 * in the serial selector chip.
 *
 * The multiplication of the converted value by 0x24 sets the relevant bits in
 * both channels and then we mask it out to only affect the channel currently
 * requested.
 */
static BOOL set_voltage(BYTE channel, BYTE val)
{
	BYTE bits, mask;

	switch (val) {
	case 1:
		bits = 0x02;
		break;
	case 2:
		bits = 0x01;
		break;
	case 5:
		bits = 0x00;
		break;
	case 10:
		bits = 0x03;
		break;
	default:
		return FALSE;
	}

	bits = bits << (channel ? 1 : 4);
	mask = (channel) ? 0x70 : 0x0e;
	IOA = (IOA & ~mask) | (bits & mask);

	return TRUE;
}

static BOOL set_numchannels(BYTE numchannels)
{
	if (numchannels == 1 || numchannels == 2) {
		BYTE fifocfg = 7 + numchannels;
		EP2FIFOCFG = fifocfg;
		EP6FIFOCFG = fifocfg;
		return TRUE;
	}

	return FALSE;
}

static void clear_fifo(void)
{
	GPIFABORT = 0xff;
	SYNCDELAY3;
	FIFORESET = 0x80;
	SYNCDELAY3;
	FIFORESET = 0x82;
	SYNCDELAY3;
	FIFORESET = 0x86;
	SYNCDELAY3;
	FIFORESET = 0;
}

static void stop_sampling(void)
{
	GPIFABORT = 0xff;
	SYNCDELAY3;
	INPKTEND = (altiface == 0) ? 6 : 2;
}

static void start_sampling(void)
{
	int i;

	SET_ANALOG_MODE();

	clear_fifo();

	for (i = 0; i < 1000; i++);

	while (!(GPIFTRIG & 0x80))
		;

	SYNCDELAY3;
	GPIFTCB1 = 0x28;
	SYNCDELAY3;
	GPIFTCB0 = 0;
	GPIFTRIG = (altiface == 0) ? 6 : 4;

	/* Set green LED, don't clear LED afterwards (ledcounter = 0). */
	LED_GREEN();
	ledcounter = 0;
}

static void select_interface(BYTE alt)
{
	const BYTE *pPacketSize = \
		((USBCS & bmHSM) ? &highspd_dscr : &fullspd_dscr)
		+ (9 + (16 * alt) + 9 + 4);

	altiface = alt;

	if (alt == 0) {
		/* Bulk on EP6. */
		EP2CFG = 0x00;
		EP6CFG = 0xe0;
		EP6GPIFFLGSEL = 1;
		EP6AUTOINLENL = pPacketSize[0];
		EP6AUTOINLENH = pPacketSize[1];
	} else {
		/* Iso on EP2. */
		EP2CFG = 0xd8;
		EP6CFG = 0x00;
		EP2GPIFFLGSEL = 1;
		EP2AUTOINLENL = pPacketSize[0];
		EP2AUTOINLENH = pPacketSize[1] & 0x7;
		EP2ISOINPKTS = (pPacketSize[1] >> 3) + 1;
	}
}

static const struct samplerate_info {
	BYTE rate;
	BYTE wait0;
	BYTE wait1;
	BYTE opc0;
	BYTE opc1;
	BYTE out0;
	BYTE ifcfg;
} samplerates[] = {
	{ 48, 0x80,   0, 3, 0, 0x00, 0xea },
	{ 30, 0x80,   0, 3, 0, 0x00, 0xaa },
	{ 24,    1,   0, 2, 1, 0x10, 0xca },
	{ 16,    1,   1, 2, 0, 0x10, 0xca },
	{ 12,    2,   1, 2, 0, 0x10, 0xca },
	{  8,    3,   2, 2, 0, 0x10, 0xca },
	{  4,    6,   5, 2, 0, 0x10, 0xca },
	{  2,   12,  11, 2, 0, 0x10, 0xca },
	{  1,   24,  23, 2, 0, 0x10, 0xca },
	{ 50,   48,  47, 2, 0, 0x10, 0xca },
	{ 20,  120, 119, 2, 0, 0x10, 0xca },
	{ 10,  240, 239, 2, 0, 0x10, 0xca },
};

static BOOL set_samplerate(BYTE rate)
{
	BYTE i = 0;

	while (samplerates[i].rate != rate) {
		i++;
		if (i == sizeof(samplerates) / sizeof(samplerates[0]))
			return FALSE;
	}

	IFCONFIG = samplerates[i].ifcfg;

	AUTOPTRSETUP = 7;
	AUTOPTRH2 = 0xE4; /* 0xE400: GPIF waveform descriptor 0. */
	AUTOPTRL2 = 0x00;

	/*
	 * The program for low-speed, e.g. 1 MHz, is:
	 * wait 24, CTLx=0, FIFO
	 * wait 23, CTLx=1
	 * jump 0, CTLx=1
	 *
	 * The program for 24 MHz is:
	 * wait 1, CTLx=0, FIFO
	 * jump 0, CTLx=1
	 *
	 * The program for 30/48 MHz is:
	 * jump 0, CTLx=Z, FIFO, LOOP
	 *
	 * (CTLx is device-dependent, could be e.g. CTL0 or CTL2.)
	 */

	/* LENGTH / BRANCH 0-7 */
	EXTAUTODAT2 = samplerates[i].wait0;
	EXTAUTODAT2 = samplerates[i].wait1;
	EXTAUTODAT2 = 1;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;

	/* OPCODE 0-7 */
	EXTAUTODAT2 = samplerates[i].opc0;
	EXTAUTODAT2 = samplerates[i].opc1;
	EXTAUTODAT2 = 1; /* DATA=0 DP=1 */
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;

	/* OUTPUT 0-7 */
	EXTAUTODAT2 = samplerates[i].out0;
	EXTAUTODAT2 = 0x11; /* OE0=1, CTL0=1 */
	EXTAUTODAT2 = 0x11; /* OE0=1, CTL0=1 */
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;

	/* LOGIC FUNCTION 0-7 */
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;

	for (i = 0; i < 96; i++)
		EXTAUTODAT2 = 0;

	return TRUE;
}

/* Set *alt_ifc to the current alt interface for ifc. */
BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
{
	(void)ifc;

	*alt_ifc = altiface;

	return TRUE;
}

/*
 * Return TRUE if you set the interface requested.
 *
 * Note: This function should reconfigure and reset the endpoints
 * according to the interface descriptors you provided.
 */
BOOL handle_set_interface(BYTE ifc,BYTE alt_ifc)
{
	if (ifc == 0)
		select_interface(alt_ifc);

	return TRUE;
}

BYTE handle_get_configuration(void)
{
	/* We only support configuration 0. */
	return 0;
}

BOOL handle_set_configuration(BYTE cfg)
{
	/* We only support configuration 0. */
	(void)cfg;

	return TRUE;
}

BOOL handle_vendorcommand(BYTE cmd)
{
	stop_sampling();

	/* Set red LED, clear after timeout. */
	LED_RED();
	ledcounter = 1000;

	/* Clear EP0BCH/L for each valid command. */
	if (cmd >= 0xe0 && cmd <= 0xe4) {
		EP0BCH = 0;
		EP0BCL = 0;
		while (EP0CS & bmEPBUSY);
	}

	switch (cmd) {
	case 0xe0:
	case 0xe1:
		set_voltage(cmd - 0xe0, EP0BUF[0]);
		return TRUE;
	case 0xe2:
		set_samplerate(EP0BUF[0]);
		return TRUE;
	case 0xe3:
		if (EP0BUF[0] == 1)
			start_sampling();
		return TRUE;
	case 0xe4:
		set_numchannels(EP0BUF[0]);
		return TRUE;
	}

	return FALSE; /* Not handled by handlers. */
}

static void init(void)
{
	EP4CFG = 0;
	EP8CFG = 0;

	SET_ANALOG_MODE();

	/* In idle mode tristate all outputs. */
	GPIFIDLECTL = 0x00; /* Don't enable CTL0-5 outputs. */
	GPIFCTLCFG = 0x80; /* TRICTL=1. CTL0-2: CMOS outputs, tri-statable. */
	GPIFWFSELECT = 0x00;
	GPIFREADYSTAT = 0x00;

	stop_sampling();

	set_voltage(0, 1);
	set_voltage(1, 1);
	set_samplerate(1);
	set_numchannels(2);
	select_interface(0);
}

static void main(void)
{
	/* Save energy. */
	SETCPUFREQ(CLK_12M);

	init();

	/* Set up interrupts. */
	USE_USB_INTS();

	ENABLE_SUDAV();
	ENABLE_USBRESET();
	ENABLE_HISPEED(); 
	ENABLE_SUSPEND();
	ENABLE_RESUME();

	/* Global (8051) interrupt enable. */
	EA = 1;

	/* Init timer2. */
	RCAP2L = -500 & 0xff;
	RCAP2H = (-500 & 0xff00) >> 8;
	T2CON = 0;
	ET2 = 1;
	TR2 = 1;

	RENUMERATE();

	PORTCCFG = 0;
	PORTACFG = 0;
	OEC = 0xff;
	OEA = 0xff;

	while (TRUE) {
		if (dosud) {
			dosud = FALSE;
			handle_setupdata();
		}

		if (dosuspend) {
			dosuspend = FALSE;
			do {
				/* Make sure ext wakeups are cleared. */
				WAKEUPCS |= bmWU | bmWU2;
				SUSPEND = 1;
				PCON |= 1;
				__asm
				nop
				nop
				nop
				nop
				nop
				nop
				nop
				__endasm;
			} while (!remote_wakeup_allowed && REMOTE_WAKEUP());

			/* Resume (TRM 6.4). */
			if (REMOTE_WAKEUP()) {
				delay(5);
				USBCS |= bmSIGRESUME;
				delay(15);
				USBCS &= ~bmSIGRESUME;
			}
		}
	}
}
Commit	Line	Data
1d203181 STA	1	/*
	2	* This file is part of the sigrok-firmware-fx2lafw project.
	3	*
	4	* Copyright (C) 2009 Ubixum, Inc.
	5	* Copyright (C) 2015 Jochen Hoenicke
	6	*
	7	* This library is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU Lesser General Public
	9	* License as published by the Free Software Foundation; either
	10	* version 2.1 of the License, or (at your option) any later version.
	11	*
	12	* This library is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* Lesser General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU Lesser General Public
	18	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
	19	*/
	20
	21	#include <fx2macros.h>
	22	#include <fx2ints.h>
	23	#include <autovector.h>
	24	#include <delay.h>
	25	#include <setupdat.h>
	26
be6d306d UH	27	#define SET_ANALOG_MODE() PA7 = 1
be6d306d UH	28
e583c3fc UH	29	/* Toggle the 1kHz calibration pin, only accurate up to ca. 8MHz. */
	30	#define TOGGLE_CALIBRATION_PIN() PC2 = !PC2
	31
65b34f7e UH	32	#define LED_CLEAR() PC0 = 1; PC1 = 1;
	33	#define LED_GREEN() PC0 = 1; PC1 = 0;
	34	#define LED_RED() PC0 = 0; PC1 = 1;
	35
1d203181 STA	36	/* Change to support as many interfaces as you need. */
	37	static BYTE altiface = 0;
	38
	39	static volatile WORD ledcounter = 0;
	40
	41	static volatile __bit dosud = FALSE;
	42	static volatile __bit dosuspend = FALSE;
	43
	44	extern __code BYTE highspd_dscr;
	45	extern __code BYTE fullspd_dscr;
	46
	47	void resume_isr(void) __interrupt RESUME_ISR
	48	{
	49	CLEAR_RESUME();
	50	}
	51
	52	void sudav_isr(void) __interrupt SUDAV_ISR
	53	{
	54	dosud = TRUE;
	55	CLEAR_SUDAV();
	56	}
	57
	58	void usbreset_isr(void) __interrupt USBRESET_ISR
	59	{
	60	handle_hispeed(FALSE);
	61	CLEAR_USBRESET();
	62	}
	63
	64	void hispeed_isr(void) __interrupt HISPEED_ISR
	65	{
	66	handle_hispeed(TRUE);
	67	CLEAR_HISPEED();
	68	}
	69
	70	void suspend_isr(void) __interrupt SUSPEND_ISR
	71	{
	72	dosuspend = TRUE;
	73	CLEAR_SUSPEND();
	74	}
	75
	76	void timer2_isr(void) __interrupt TF2_ISR
	77	{
e583c3fc	78	TOGGLE_CALIBRATION_PIN();
cbd1bc65	79
65b34f7e UH	80	if (ledcounter && (--ledcounter == 0))
65b34f7e UH	81	LED_CLEAR();
3968bbfb	82
1d203181 STA	83	TF2 = 0;
	84	}
	85
	86	/*
	87	* This sets three bits for each channel, one channel at a time.
ae56b4f6 JL	88	* For channel 0 we want to set bits 1, 2 & 3
ae56b4f6 JL	89	* For channel 1 we want to set bits 4, 5 & 6
1d203181 STA	90	*
	91	* We convert the input values that are strange due to original
	92	* firmware code into the value of the three bits as follows:
	93	*
	94	* val -> bits
	95	* 1 -> 010b
	96	* 2 -> 001b
	97	* 5 -> 000b
	98	* 10 -> 011b
	99	*
	100	* The third bit is always zero since there are only four outputs connected
	101	* in the serial selector chip.
	102	*
	103	* The multiplication of the converted value by 0x24 sets the relevant bits in
	104	* both channels and then we mask it out to only affect the channel currently
	105	* requested.
	106	*/
	107	static BOOL set_voltage(BYTE channel, BYTE val)
	108	{
	109	BYTE bits, mask;
	110
	111	switch (val) {
	112	case 1:
ae56b4f6	113	bits = 0x02;
1d203181 STA	114	break;
1d203181 STA	115	case 2:
ae56b4f6	116	bits = 0x01;
1d203181 STA	117	break;
1d203181 STA	118	case 5:
ae56b4f6	119	bits = 0x00;
1d203181 STA	120	break;
1d203181 STA	121	case 10:
ae56b4f6	122	bits = 0x03;
1d203181 STA	123	break;
	124	default:
	125	return FALSE;
	126	}
	127
ae56b4f6 JL	128	bits = bits << (channel ? 1 : 4);
	129	mask = (channel) ? 0x70 : 0x0e;
	130	IOA = (IOA & ~mask) \| (bits & mask);
1d203181 STA	131
	132	return TRUE;
	133	}
	134
	135	static BOOL set_numchannels(BYTE numchannels)
	136	{
	137	if (numchannels == 1 \|\| numchannels == 2) {
	138	BYTE fifocfg = 7 + numchannels;
	139	EP2FIFOCFG = fifocfg;
	140	EP6FIFOCFG = fifocfg;
	141	return TRUE;
	142	}
	143
	144	return FALSE;
	145	}
	146
	147	static void clear_fifo(void)
	148	{
	149	GPIFABORT = 0xff;
	150	SYNCDELAY3;
	151	FIFORESET = 0x80;
	152	SYNCDELAY3;
	153	FIFORESET = 0x82;
	154	SYNCDELAY3;
	155	FIFORESET = 0x86;
	156	SYNCDELAY3;
	157	FIFORESET = 0;
	158	}
	159
	160	static void stop_sampling(void)
	161	{
	162	GPIFABORT = 0xff;
	163	SYNCDELAY3;
	164	INPKTEND = (altiface == 0) ? 6 : 2;
	165	}
	166
	167	static void start_sampling(void)
	168	{
	169	int i;
	170
be6d306d	171	SET_ANALOG_MODE();
59562384	172
1d203181 STA	173	clear_fifo();
	174
	175	for (i = 0; i < 1000; i++);
	176
	177	while (!(GPIFTRIG & 0x80))
	178	;
	179
	180	SYNCDELAY3;
	181	GPIFTCB1 = 0x28;
	182	SYNCDELAY3;
	183	GPIFTCB0 = 0;
	184	GPIFTRIG = (altiface == 0) ? 6 : 4;
	185
65b34f7e UH	186	/* Set green LED, don't clear LED afterwards (ledcounter = 0). */
65b34f7e UH	187	LED_GREEN();
1d203181	188	ledcounter = 0;
1d203181 STA	189	}
	190
	191	static void select_interface(BYTE alt)
	192	{
	193	const BYTE *pPacketSize = \
	194	((USBCS & bmHSM) ? &highspd_dscr : &fullspd_dscr)
	195	+ (9 + (16 * alt) + 9 + 4);
	196
	197	altiface = alt;
	198
	199	if (alt == 0) {
	200	/* Bulk on EP6. */
	201	EP2CFG = 0x00;
	202	EP6CFG = 0xe0;
	203	EP6GPIFFLGSEL = 1;
	204	EP6AUTOINLENL = pPacketSize[0];
	205	EP6AUTOINLENH = pPacketSize[1];
	206	} else {
	207	/* Iso on EP2. */
	208	EP2CFG = 0xd8;
	209	EP6CFG = 0x00;
	210	EP2GPIFFLGSEL = 1;
	211	EP2AUTOINLENL = pPacketSize[0];
	212	EP2AUTOINLENH = pPacketSize[1] & 0x7;
	213	EP2ISOINPKTS = (pPacketSize[1] >> 3) + 1;
	214	}
	215	}
	216
	217	static const struct samplerate_info {
	218	BYTE rate;
	219	BYTE wait0;
	220	BYTE wait1;
	221	BYTE opc0;
	222	BYTE opc1;
	223	BYTE out0;
	224	BYTE ifcfg;
	225	} samplerates[] = {
	226	{ 48, 0x80, 0, 3, 0, 0x00, 0xea },
	227	{ 30, 0x80, 0, 3, 0, 0x00, 0xaa },
90fdecb7 JL	228	{ 24, 1, 0, 2, 1, 0x10, 0xca },
	229	{ 16, 1, 1, 2, 0, 0x10, 0xca },
	230	{ 12, 2, 1, 2, 0, 0x10, 0xca },
	231	{ 8, 3, 2, 2, 0, 0x10, 0xca },
	232	{ 4, 6, 5, 2, 0, 0x10, 0xca },
	233	{ 2, 12, 11, 2, 0, 0x10, 0xca },
	234	{ 1, 24, 23, 2, 0, 0x10, 0xca },
	235	{ 50, 48, 47, 2, 0, 0x10, 0xca },
	236	{ 20, 120, 119, 2, 0, 0x10, 0xca },
	237	{ 10, 240, 239, 2, 0, 0x10, 0xca },
1d203181 STA	238	};
	239
	240	static BOOL set_samplerate(BYTE rate)
	241	{
	242	BYTE i = 0;
	243
	244	while (samplerates[i].rate != rate) {
	245	i++;
	246	if (i == sizeof(samplerates) / sizeof(samplerates[0]))
	247	return FALSE;
	248	}
	249
	250	IFCONFIG = samplerates[i].ifcfg;
	251
	252	AUTOPTRSETUP = 7;
	253	AUTOPTRH2 = 0xE4; /* 0xE400: GPIF waveform descriptor 0. */
	254	AUTOPTRL2 = 0x00;
	255
	256	/*
	257	* The program for low-speed, e.g. 1 MHz, is:
3968bbfb UH	258	* wait 24, CTLx=0, FIFO
	259	* wait 23, CTLx=1
	260	* jump 0, CTLx=1
1d203181 STA	261	*
1d203181 STA	262	* The program for 24 MHz is:
3968bbfb UH	263	* wait 1, CTLx=0, FIFO
3968bbfb UH	264	* jump 0, CTLx=1
1d203181 STA	265	*
1d203181 STA	266	* The program for 30/48 MHz is:
3968bbfb UH	267	* jump 0, CTLx=Z, FIFO, LOOP
	268	*
	269	* (CTLx is device-dependent, could be e.g. CTL0 or CTL2.)
1d203181 STA	270	*/
	271
	272	/* LENGTH / BRANCH 0-7 */
	273	EXTAUTODAT2 = samplerates[i].wait0;
	274	EXTAUTODAT2 = samplerates[i].wait1;
	275	EXTAUTODAT2 = 1;
	276	EXTAUTODAT2 = 0;
	277	EXTAUTODAT2 = 0;
	278	EXTAUTODAT2 = 0;
	279	EXTAUTODAT2 = 0;
	280	EXTAUTODAT2 = 0;
	281
	282	/* OPCODE 0-7 */
	283	EXTAUTODAT2 = samplerates[i].opc0;
	284	EXTAUTODAT2 = samplerates[i].opc1;
	285	EXTAUTODAT2 = 1; /* DATA=0 DP=1 */
	286	EXTAUTODAT2 = 0;
	287	EXTAUTODAT2 = 0;
	288	EXTAUTODAT2 = 0;
	289	EXTAUTODAT2 = 0;
	290	EXTAUTODAT2 = 0;
	291
	292	/* OUTPUT 0-7 */
	293	EXTAUTODAT2 = samplerates[i].out0;
a76fd2a9 JL	294	EXTAUTODAT2 = 0x11; /* OE0=1, CTL0=1 */
a76fd2a9 JL	295	EXTAUTODAT2 = 0x11; /* OE0=1, CTL0=1 */
1d203181 STA	296	EXTAUTODAT2 = 0;
	297	EXTAUTODAT2 = 0;
	298	EXTAUTODAT2 = 0;
	299	EXTAUTODAT2 = 0;
	300	EXTAUTODAT2 = 0;
	301
	302	/* LOGIC FUNCTION 0-7 */
	303	EXTAUTODAT2 = 0;
	304	EXTAUTODAT2 = 0;
	305	EXTAUTODAT2 = 0;
	306	EXTAUTODAT2 = 0;
	307	EXTAUTODAT2 = 0;
	308	EXTAUTODAT2 = 0;
	309	EXTAUTODAT2 = 0;
	310	EXTAUTODAT2 = 0;
	311
	312	for (i = 0; i < 96; i++)
	313	EXTAUTODAT2 = 0;
	314
	315	return TRUE;
	316	}
	317
	318	/* Set alt_ifc to the current alt interface for ifc. /
	319	BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
	320	{
	321	(void)ifc;
	322
	323	*alt_ifc = altiface;
	324
	325	return TRUE;
	326	}
	327
	328	/*
	329	* Return TRUE if you set the interface requested.
	330	*
	331	* Note: This function should reconfigure and reset the endpoints
	332	* according to the interface descriptors you provided.
	333	*/
	334	BOOL handle_set_interface(BYTE ifc,BYTE alt_ifc)
	335	{
	336	if (ifc == 0)
	337	select_interface(alt_ifc);
	338
	339	return TRUE;
	340	}
	341
	342	BYTE handle_get_configuration(void)
	343	{
	344	/* We only support configuration 0. */
	345	return 0;
	346	}
	347
	348	BOOL handle_set_configuration(BYTE cfg)
	349	{
	350	/* We only support configuration 0. */
	351	(void)cfg;
	352
	353	return TRUE;
	354	}
	355
	356	BOOL handle_vendorcommand(BYTE cmd)
	357	{
	358	stop_sampling();
	359
65b34f7e UH	360	/* Set red LED, clear after timeout. */
65b34f7e UH	361	LED_RED();
1d203181 STA	362	ledcounter = 1000;
	363
	364	/* Clear EP0BCH/L for each valid command. */
	365	if (cmd >= 0xe0 && cmd <= 0xe4) {
	366	EP0BCH = 0;
	367	EP0BCL = 0;
	368	while (EP0CS & bmEPBUSY);
	369	}
	370
	371	switch (cmd) {
	372	case 0xe0:
	373	case 0xe1:
	374	set_voltage(cmd - 0xe0, EP0BUF[0]);
	375	return TRUE;
	376	case 0xe2:
	377	set_samplerate(EP0BUF[0]);
	378	return TRUE;
	379	case 0xe3:
	380	if (EP0BUF[0] == 1)
	381	start_sampling();
	382	return TRUE;
	383	case 0xe4:
	384	set_numchannels(EP0BUF[0]);
	385	return TRUE;
	386	}
	387
	388	return FALSE; /* Not handled by handlers. */
	389	}
	390
	391	static void init(void)
	392	{
	393	EP4CFG = 0;
	394	EP8CFG = 0;
	395
be6d306d	396	SET_ANALOG_MODE();
eb52aca4	397
1d203181 STA	398	/* In idle mode tristate all outputs. */
	399	GPIFIDLECTL = 0x00; /* Don't enable CTL0-5 outputs. */
	400	GPIFCTLCFG = 0x80; /* TRICTL=1. CTL0-2: CMOS outputs, tri-statable. */
	401	GPIFWFSELECT = 0x00;
	402	GPIFREADYSTAT = 0x00;
	403
	404	stop_sampling();
	405
	406	set_voltage(0, 1);
	407	set_voltage(1, 1);
	408	set_samplerate(1);
	409	set_numchannels(2);
	410	select_interface(0);
	411	}
	412
	413	static void main(void)
	414	{
	415	/* Save energy. */
	416	SETCPUFREQ(CLK_12M);
	417
	418	init();
	419
	420	/* Set up interrupts. */
	421	USE_USB_INTS();
	422
	423	ENABLE_SUDAV();
	424	ENABLE_USBRESET();
	425	ENABLE_HISPEED();
	426	ENABLE_SUSPEND();
	427	ENABLE_RESUME();
	428
	429	/* Global (8051) interrupt enable. */
	430	EA = 1;
	431
	432	/* Init timer2. */
	433	RCAP2L = -500 & 0xff;
	434	RCAP2H = (-500 & 0xff00) >> 8;
	435	T2CON = 0;
	436	ET2 = 1;
	437	TR2 = 1;
	438
	439	RENUMERATE();
	440
	441	PORTCCFG = 0;
	442	PORTACFG = 0;
	443	OEC = 0xff;
f6eb6aec	444	OEA = 0xff;
1d203181 STA	445
	446	while (TRUE) {
	447	if (dosud) {
	448	dosud = FALSE;
	449	handle_setupdata();
	450	}
	451
	452	if (dosuspend) {
	453	dosuspend = FALSE;
	454	do {
	455	/* Make sure ext wakeups are cleared. */
3968bbfb	456	WAKEUPCS \|= bmWU \| bmWU2;
1d203181 STA	457	SUSPEND = 1;
	458	PCON \|= 1;
	459	__asm
	460	nop
	461	nop
	462	nop
	463	nop
	464	nop
	465	nop
	466	nop
	467	__endasm;
	468	} while (!remote_wakeup_allowed && REMOTE_WAKEUP());
	469
	470	/* Resume (TRM 6.4). */
	471	if (REMOTE_WAKEUP()) {
	472	delay(5);
	473	USBCS \|= bmSIGRESUME;
	474	delay(15);
	475	USBCS &= ~bmSIGRESUME;
	476	}
	477	}
	478	}
	479	}