[sigrok-firmware-fx2lafw.git] / hantek_6022bl.c

/*
 * This file is part of the sigrok-firmware-fx2lafw project.
 *
 * Copyright (C) 2009 Ubixum, Inc.
 * Copyright (C) 2015 Jochen Hoenicke
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2.1 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */

#include <fx2macros.h>
#include <fx2ints.h>
#include <autovector.h>
#include <delay.h>
#include <setupdat.h>

/* Change to support as many interfaces as you need. */
static BYTE altiface = 0;

static volatile WORD ledcounter = 0;

static volatile __bit dosud = FALSE;
static volatile __bit dosuspend = FALSE;

extern __code BYTE highspd_dscr;
extern __code BYTE fullspd_dscr;

void resume_isr(void) __interrupt RESUME_ISR
{
	CLEAR_RESUME();
}

void sudav_isr(void) __interrupt SUDAV_ISR
{
	dosud = TRUE;
	CLEAR_SUDAV();
}

void usbreset_isr(void) __interrupt USBRESET_ISR
{
	handle_hispeed(FALSE);
	CLEAR_USBRESET();
}

void hispeed_isr(void) __interrupt HISPEED_ISR
{
	handle_hispeed(TRUE);
	CLEAR_HISPEED();
}

void suspend_isr(void) __interrupt SUSPEND_ISR
{
	dosuspend = TRUE;
	CLEAR_SUSPEND();
}

void timer2_isr(void) __interrupt TF2_ISR
{
	/* Toggle the 1kHz calibration pin, only accurate up to ca. 8MHz. */
	PC2 = !PC2;

	if (ledcounter) {
		if (--ledcounter == 0) {
			/* Clear LED. */
			PC0 = 1;
			PC1 = 1;
		}
	}

	TF2 = 0;
}

/*
 * This sets three bits for each channel, one channel at a time.
 * For channel 0 we want to set bits 1, 2 & 3
 * For channel 1 we want to set bits 4, 5 & 6
 *
 * We convert the input values that are strange due to original
 * firmware code into the value of the three bits as follows:
 *
 * val -> bits
 * 1  -> 010b
 * 2  -> 001b
 * 5  -> 000b
 * 10 -> 011b
 *
 * The third bit is always zero since there are only four outputs connected
 * in the serial selector chip.
 *
 * The multiplication of the converted value by 0x24 sets the relevant bits in
 * both channels and then we mask it out to only affect the channel currently
 * requested.
 */
static BOOL set_voltage(BYTE channel, BYTE val)
{
	BYTE bits, mask;

	switch (val) {
	case 1:
		bits = 0x02;
		break;
	case 2:
		bits = 0x01;
		break;
	case 5:
		bits = 0x00;
		break;
	case 10:
		bits = 0x03;
		break;
	default:
		return FALSE;
	}

	bits = bits << (channel ? 1 : 4);
	mask = (channel) ? 0x70 : 0x0e;
	IOA = (IOA & ~mask) | (bits & mask);

	return TRUE;
}

static BOOL set_numchannels(BYTE numchannels)
{
	if (numchannels == 1 || numchannels == 2) {
		BYTE fifocfg = 7 + numchannels;
		EP2FIFOCFG = fifocfg;
		EP6FIFOCFG = fifocfg;
		return TRUE;
	}

	return FALSE;
}

static void clear_fifo(void)
{
	GPIFABORT = 0xff;
	SYNCDELAY3;
	FIFORESET = 0x80;
	SYNCDELAY3;
	FIFORESET = 0x82;
	SYNCDELAY3;
	FIFORESET = 0x86;
	SYNCDELAY3;
	FIFORESET = 0;
}

static void stop_sampling(void)
{
	GPIFABORT = 0xff;
	SYNCDELAY3;
	INPKTEND = (altiface == 0) ? 6 : 2;
}

static void start_sampling(void)
{
	int i;

	/* Set analog mode. */
	PA7 = 1;

	clear_fifo();

	for (i = 0; i < 1000; i++);

	while (!(GPIFTRIG & 0x80))
		;

	SYNCDELAY3;
	GPIFTCB1 = 0x28;
	SYNCDELAY3;
	GPIFTCB0 = 0;
	GPIFTRIG = (altiface == 0) ? 6 : 4;

	/* Set green LED, don't clear LED. */
	ledcounter = 0;
	PC0 = 1;
	PC1 = 0;
}

static void select_interface(BYTE alt)
{
	const BYTE *pPacketSize = \
		((USBCS & bmHSM) ? &highspd_dscr : &fullspd_dscr)
		+ (9 + (16 * alt) + 9 + 4);

	altiface = alt;

	if (alt == 0) {
		/* Bulk on EP6. */
		EP2CFG = 0x00;
		EP6CFG = 0xe0;
		EP6GPIFFLGSEL = 1;
		EP6AUTOINLENL = pPacketSize[0];
		EP6AUTOINLENH = pPacketSize[1];
	} else {
		/* Iso on EP2. */
		EP2CFG = 0xd8;
		EP6CFG = 0x00;
		EP2GPIFFLGSEL = 1;
		EP2AUTOINLENL = pPacketSize[0];
		EP2AUTOINLENH = pPacketSize[1] & 0x7;
		EP2ISOINPKTS = (pPacketSize[1] >> 3) + 1;
	}
}

static const struct samplerate_info {
	BYTE rate;
	BYTE wait0;
	BYTE wait1;
	BYTE opc0;
	BYTE opc1;
	BYTE out0;
	BYTE ifcfg;
} samplerates[] = {
	{ 48, 0x80,   0, 3, 0, 0x00, 0xea },
	{ 30, 0x80,   0, 3, 0, 0x00, 0xaa },
	{ 24,    1,   0, 2, 1, 0x10, 0xca },
	{ 16,    1,   1, 2, 0, 0x10, 0xca },
	{ 12,    2,   1, 2, 0, 0x10, 0xca },
	{  8,    3,   2, 2, 0, 0x10, 0xca },
	{  4,    6,   5, 2, 0, 0x10, 0xca },
	{  2,   12,  11, 2, 0, 0x10, 0xca },
	{  1,   24,  23, 2, 0, 0x10, 0xca },
	{ 50,   48,  47, 2, 0, 0x10, 0xca },
	{ 20,  120, 119, 2, 0, 0x10, 0xca },
	{ 10,  240, 239, 2, 0, 0x10, 0xca },
};

static BOOL set_samplerate(BYTE rate)
{
	BYTE i = 0;

	while (samplerates[i].rate != rate) {
		i++;
		if (i == sizeof(samplerates) / sizeof(samplerates[0]))
			return FALSE;
	}

	IFCONFIG = samplerates[i].ifcfg;

	AUTOPTRSETUP = 7;
	AUTOPTRH2 = 0xE4; /* 0xE400: GPIF waveform descriptor 0. */
	AUTOPTRL2 = 0x00;

	/*
	 * The program for low-speed, e.g. 1 MHz, is:
	 * wait 24, CTLx=0, FIFO
	 * wait 23, CTLx=1
	 * jump 0, CTLx=1
	 *
	 * The program for 24 MHz is:
	 * wait 1, CTLx=0, FIFO
	 * jump 0, CTLx=1
	 *
	 * The program for 30/48 MHz is:
	 * jump 0, CTLx=Z, FIFO, LOOP
	 *
	 * (CTLx is device-dependent, could be e.g. CTL0 or CTL2.)
	 */

	/* LENGTH / BRANCH 0-7 */
	EXTAUTODAT2 = samplerates[i].wait0;
	EXTAUTODAT2 = samplerates[i].wait1;
	EXTAUTODAT2 = 1;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;

	/* OPCODE 0-7 */
	EXTAUTODAT2 = samplerates[i].opc0;
	EXTAUTODAT2 = samplerates[i].opc1;
	EXTAUTODAT2 = 1; /* DATA=0 DP=1 */
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;

	/* OUTPUT 0-7 */
	EXTAUTODAT2 = samplerates[i].out0;
	EXTAUTODAT2 = 0x11; /* OE0=1, CTL0=1 */
	EXTAUTODAT2 = 0x11; /* OE0=1, CTL0=1 */
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;

	/* LOGIC FUNCTION 0-7 */
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;

	for (i = 0; i < 96; i++)
		EXTAUTODAT2 = 0;

	return TRUE;
}

/* Set *alt_ifc to the current alt interface for ifc. */
BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
{
	(void)ifc;

	*alt_ifc = altiface;

	return TRUE;
}

/*
 * Return TRUE if you set the interface requested.
 *
 * Note: This function should reconfigure and reset the endpoints
 * according to the interface descriptors you provided.
 */
BOOL handle_set_interface(BYTE ifc,BYTE alt_ifc)
{
	if (ifc == 0)
		select_interface(alt_ifc);

	return TRUE;
}

BYTE handle_get_configuration(void)
{
	/* We only support configuration 0. */
	return 0;
}

BOOL handle_set_configuration(BYTE cfg)
{
	/* We only support configuration 0. */
	(void)cfg;

	return TRUE;
}

BOOL handle_vendorcommand(BYTE cmd)
{
	stop_sampling();

	/* Set red LED. */
	PC0 = 0;
	PC1 = 1;
	ledcounter = 1000;

	/* Clear EP0BCH/L for each valid command. */
	if (cmd >= 0xe0 && cmd <= 0xe4) {
		EP0BCH = 0;
		EP0BCL = 0;
		while (EP0CS & bmEPBUSY);
	}

	switch (cmd) {
	case 0xe0:
	case 0xe1:
		set_voltage(cmd - 0xe0, EP0BUF[0]);
		return TRUE;
	case 0xe2:
		set_samplerate(EP0BUF[0]);
		return TRUE;
	case 0xe3:
		if (EP0BUF[0] == 1)
			start_sampling();
		return TRUE;
	case 0xe4:
		set_numchannels(EP0BUF[0]);
		return TRUE;
	}

	return FALSE; /* Not handled by handlers. */
}

static void init(void)
{
	EP4CFG = 0;
	EP8CFG = 0;

	/* Set analog mode. */
	PA7 = 1;

	/* In idle mode tristate all outputs. */
	GPIFIDLECTL = 0x00; /* Don't enable CTL0-5 outputs. */
	GPIFCTLCFG = 0x80; /* TRICTL=1. CTL0-2: CMOS outputs, tri-statable. */
	GPIFWFSELECT = 0x00;
	GPIFREADYSTAT = 0x00;

	stop_sampling();

	set_voltage(0, 1);
	set_voltage(1, 1);
	set_samplerate(1);
	set_numchannels(2);
	select_interface(0);
}

static void main(void)
{
	/* Save energy. */
	SETCPUFREQ(CLK_12M);

	init();

	/* Set up interrupts. */
	USE_USB_INTS();

	ENABLE_SUDAV();
	ENABLE_USBRESET();
	ENABLE_HISPEED(); 
	ENABLE_SUSPEND();
	ENABLE_RESUME();

	/* Global (8051) interrupt enable. */
	EA = 1;

	/* Init timer2. */
	RCAP2L = -500 & 0xff;
	RCAP2H = (-500 & 0xff00) >> 8;
	T2CON = 0;
	ET2 = 1;
	TR2 = 1;

	RENUMERATE();

	PORTCCFG = 0;
	PORTACFG = 0;
	OEC = 0xff;
	OEA = 0xff;

	while (TRUE) {
		if (dosud) {
			dosud = FALSE;
			handle_setupdata();
		}

		if (dosuspend) {
			dosuspend = FALSE;
			do {
				/* Make sure ext wakeups are cleared. */
				WAKEUPCS |= bmWU | bmWU2;
				SUSPEND = 1;
				PCON |= 1;
				__asm
				nop
				nop
				nop
				nop
				nop
				nop
				nop
				__endasm;
			} while (!remote_wakeup_allowed && REMOTE_WAKEUP());

			/* Resume (TRM 6.4). */
			if (REMOTE_WAKEUP()) {
				delay(5);
				USBCS |= bmSIGRESUME;
				delay(15);
				USBCS &= ~bmSIGRESUME;
			}
		}
	}
}
Commit	Line	Data
1d203181 STA	1	/*
	2	* This file is part of the sigrok-firmware-fx2lafw project.
	3	*
	4	* Copyright (C) 2009 Ubixum, Inc.
	5	* Copyright (C) 2015 Jochen Hoenicke
	6	*
	7	* This library is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU Lesser General Public
	9	* License as published by the Free Software Foundation; either
	10	* version 2.1 of the License, or (at your option) any later version.
	11	*
	12	* This library is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* Lesser General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU Lesser General Public
	18	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
	19	*/
	20
	21	#include <fx2macros.h>
	22	#include <fx2ints.h>
	23	#include <autovector.h>
	24	#include <delay.h>
	25	#include <setupdat.h>
	26
	27	/* Change to support as many interfaces as you need. */
	28	static BYTE altiface = 0;
	29
	30	static volatile WORD ledcounter = 0;
	31
	32	static volatile __bit dosud = FALSE;
	33	static volatile __bit dosuspend = FALSE;
	34
	35	extern __code BYTE highspd_dscr;
	36	extern __code BYTE fullspd_dscr;
	37
	38	void resume_isr(void) __interrupt RESUME_ISR
	39	{
	40	CLEAR_RESUME();
	41	}
	42
	43	void sudav_isr(void) __interrupt SUDAV_ISR
	44	{
	45	dosud = TRUE;
	46	CLEAR_SUDAV();
	47	}
	48
	49	void usbreset_isr(void) __interrupt USBRESET_ISR
	50	{
	51	handle_hispeed(FALSE);
	52	CLEAR_USBRESET();
	53	}
	54
	55	void hispeed_isr(void) __interrupt HISPEED_ISR
	56	{
	57	handle_hispeed(TRUE);
	58	CLEAR_HISPEED();
	59	}
	60
	61	void suspend_isr(void) __interrupt SUSPEND_ISR
	62	{
	63	dosuspend = TRUE;
	64	CLEAR_SUSPEND();
65	}
66
67	void timer2_isr(void) __interrupt TF2_ISR
68	{
3968bbfb	69	/* Toggle the 1kHz calibration pin, only accurate up to ca. 8MHz. */
cbd1bc65 JL	70	PC2 = !PC2;
cbd1bc65 JL	71
1d203181 STA	72	if (ledcounter) {
	73	if (--ledcounter == 0) {
	74	/* Clear LED. */
	75	PC0 = 1;
	76	PC1 = 1;
	77	}
	78	}
3968bbfb	79
1d203181 STA	80	TF2 = 0;
	81	}
	82
	83	/*
	84	* This sets three bits for each channel, one channel at a time.
ae56b4f6 JL	85	* For channel 0 we want to set bits 1, 2 & 3
ae56b4f6 JL	86	* For channel 1 we want to set bits 4, 5 & 6
1d203181 STA	87	*
	88	* We convert the input values that are strange due to original
	89	* firmware code into the value of the three bits as follows:
	90	*
	91	* val -> bits
	92	* 1 -> 010b
	93	* 2 -> 001b
	94	* 5 -> 000b
	95	* 10 -> 011b
	96	*
	97	* The third bit is always zero since there are only four outputs connected
	98	* in the serial selector chip.
	99	*
	100	* The multiplication of the converted value by 0x24 sets the relevant bits in
	101	* both channels and then we mask it out to only affect the channel currently
	102	* requested.
	103	*/
	104	static BOOL set_voltage(BYTE channel, BYTE val)
	105	{
	106	BYTE bits, mask;
	107
	108	switch (val) {
	109	case 1:
ae56b4f6	110	bits = 0x02;
1d203181 STA	111	break;
1d203181 STA	112	case 2:
ae56b4f6	113	bits = 0x01;
1d203181 STA	114	break;
1d203181 STA	115	case 5:
ae56b4f6	116	bits = 0x00;
1d203181 STA	117	break;
1d203181 STA	118	case 10:
ae56b4f6	119	bits = 0x03;
1d203181 STA	120	break;
	121	default:
	122	return FALSE;
	123	}
	124
ae56b4f6 JL	125	bits = bits << (channel ? 1 : 4);
	126	mask = (channel) ? 0x70 : 0x0e;
	127	IOA = (IOA & ~mask) \| (bits & mask);
1d203181 STA	128
	129	return TRUE;
	130	}
	131
	132	static BOOL set_numchannels(BYTE numchannels)
	133	{
	134	if (numchannels == 1 \|\| numchannels == 2) {
	135	BYTE fifocfg = 7 + numchannels;
	136	EP2FIFOCFG = fifocfg;
	137	EP6FIFOCFG = fifocfg;
	138	return TRUE;
	139	}
	140
	141	return FALSE;
	142	}
	143
	144	static void clear_fifo(void)
	145	{
	146	GPIFABORT = 0xff;
	147	SYNCDELAY3;
	148	FIFORESET = 0x80;
	149	SYNCDELAY3;
	150	FIFORESET = 0x82;
	151	SYNCDELAY3;
	152	FIFORESET = 0x86;
	153	SYNCDELAY3;
	154	FIFORESET = 0;
	155	}
	156
	157	static void stop_sampling(void)
	158	{
	159	GPIFABORT = 0xff;
	160	SYNCDELAY3;
	161	INPKTEND = (altiface == 0) ? 6 : 2;
	162	}
	163
	164	static void start_sampling(void)
	165	{
	166	int i;
	167
59562384 JL	168	/* Set analog mode. */
	169	PA7 = 1;
	170
1d203181 STA	171	clear_fifo();
	172
	173	for (i = 0; i < 1000; i++);
	174
	175	while (!(GPIFTRIG & 0x80))
	176	;
	177
	178	SYNCDELAY3;
	179	GPIFTCB1 = 0x28;
	180	SYNCDELAY3;
	181	GPIFTCB0 = 0;
	182	GPIFTRIG = (altiface == 0) ? 6 : 4;
	183
	184	/* Set green LED, don't clear LED. */
	185	ledcounter = 0;
	186	PC0 = 1;
	187	PC1 = 0;
	188	}
	189
	190	static void select_interface(BYTE alt)
	191	{
	192	const BYTE *pPacketSize = \
	193	((USBCS & bmHSM) ? &highspd_dscr : &fullspd_dscr)
	194	+ (9 + (16 * alt) + 9 + 4);
	195
	196	altiface = alt;
	197
	198	if (alt == 0) {
	199	/* Bulk on EP6. */
	200	EP2CFG = 0x00;
	201	EP6CFG = 0xe0;
	202	EP6GPIFFLGSEL = 1;
	203	EP6AUTOINLENL = pPacketSize[0];
	204	EP6AUTOINLENH = pPacketSize[1];
	205	} else {
	206	/* Iso on EP2. */
	207	EP2CFG = 0xd8;
	208	EP6CFG = 0x00;
	209	EP2GPIFFLGSEL = 1;
	210	EP2AUTOINLENL = pPacketSize[0];
	211	EP2AUTOINLENH = pPacketSize[1] & 0x7;
	212	EP2ISOINPKTS = (pPacketSize[1] >> 3) + 1;
	213	}
	214	}
	215
	216	static const struct samplerate_info {
	217	BYTE rate;
	218	BYTE wait0;
	219	BYTE wait1;
	220	BYTE opc0;
	221	BYTE opc1;
	222	BYTE out0;
	223	BYTE ifcfg;
	224	} samplerates[] = {
	225	{ 48, 0x80, 0, 3, 0, 0x00, 0xea },
	226	{ 30, 0x80, 0, 3, 0, 0x00, 0xaa },
90fdecb7 JL	227	{ 24, 1, 0, 2, 1, 0x10, 0xca },
	228	{ 16, 1, 1, 2, 0, 0x10, 0xca },
	229	{ 12, 2, 1, 2, 0, 0x10, 0xca },
	230	{ 8, 3, 2, 2, 0, 0x10, 0xca },
	231	{ 4, 6, 5, 2, 0, 0x10, 0xca },
	232	{ 2, 12, 11, 2, 0, 0x10, 0xca },
	233	{ 1, 24, 23, 2, 0, 0x10, 0xca },
	234	{ 50, 48, 47, 2, 0, 0x10, 0xca },
	235	{ 20, 120, 119, 2, 0, 0x10, 0xca },
	236	{ 10, 240, 239, 2, 0, 0x10, 0xca },
1d203181 STA	237	};
	238
	239	static BOOL set_samplerate(BYTE rate)
	240	{
	241	BYTE i = 0;
	242
	243	while (samplerates[i].rate != rate) {
	244	i++;
	245	if (i == sizeof(samplerates) / sizeof(samplerates[0]))
	246	return FALSE;
	247	}
	248
	249	IFCONFIG = samplerates[i].ifcfg;
	250
	251	AUTOPTRSETUP = 7;
	252	AUTOPTRH2 = 0xE4; /* 0xE400: GPIF waveform descriptor 0. */
	253	AUTOPTRL2 = 0x00;
	254
	255	/*
	256	* The program for low-speed, e.g. 1 MHz, is:
3968bbfb UH	257	* wait 24, CTLx=0, FIFO
	258	* wait 23, CTLx=1
	259	* jump 0, CTLx=1
1d203181 STA	260	*
1d203181 STA	261	* The program for 24 MHz is:
3968bbfb UH	262	* wait 1, CTLx=0, FIFO
3968bbfb UH	263	* jump 0, CTLx=1
1d203181 STA	264	*
1d203181 STA	265	* The program for 30/48 MHz is:
3968bbfb UH	266	* jump 0, CTLx=Z, FIFO, LOOP
	267	*
	268	* (CTLx is device-dependent, could be e.g. CTL0 or CTL2.)
1d203181 STA	269	*/
	270
	271	/* LENGTH / BRANCH 0-7 */
	272	EXTAUTODAT2 = samplerates[i].wait0;
	273	EXTAUTODAT2 = samplerates[i].wait1;
	274	EXTAUTODAT2 = 1;
	275	EXTAUTODAT2 = 0;
	276	EXTAUTODAT2 = 0;
	277	EXTAUTODAT2 = 0;
	278	EXTAUTODAT2 = 0;
	279	EXTAUTODAT2 = 0;
	280
	281	/* OPCODE 0-7 */
	282	EXTAUTODAT2 = samplerates[i].opc0;
	283	EXTAUTODAT2 = samplerates[i].opc1;
	284	EXTAUTODAT2 = 1; /* DATA=0 DP=1 */
	285	EXTAUTODAT2 = 0;
	286	EXTAUTODAT2 = 0;
	287	EXTAUTODAT2 = 0;
	288	EXTAUTODAT2 = 0;
	289	EXTAUTODAT2 = 0;
	290
	291	/* OUTPUT 0-7 */
	292	EXTAUTODAT2 = samplerates[i].out0;
a76fd2a9 JL	293	EXTAUTODAT2 = 0x11; /* OE0=1, CTL0=1 */
a76fd2a9 JL	294	EXTAUTODAT2 = 0x11; /* OE0=1, CTL0=1 */
1d203181 STA	295	EXTAUTODAT2 = 0;
	296	EXTAUTODAT2 = 0;
	297	EXTAUTODAT2 = 0;
	298	EXTAUTODAT2 = 0;
	299	EXTAUTODAT2 = 0;
	300
	301	/* LOGIC FUNCTION 0-7 */
	302	EXTAUTODAT2 = 0;
	303	EXTAUTODAT2 = 0;
	304	EXTAUTODAT2 = 0;
	305	EXTAUTODAT2 = 0;
	306	EXTAUTODAT2 = 0;
	307	EXTAUTODAT2 = 0;
	308	EXTAUTODAT2 = 0;
	309	EXTAUTODAT2 = 0;
	310
	311	for (i = 0; i < 96; i++)
	312	EXTAUTODAT2 = 0;
	313
	314	return TRUE;
	315	}
	316
	317	/* Set alt_ifc to the current alt interface for ifc. /
	318	BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
	319	{
	320	(void)ifc;
	321
	322	*alt_ifc = altiface;
	323
	324	return TRUE;
	325	}
	326
	327	/*
	328	* Return TRUE if you set the interface requested.
	329	*
	330	* Note: This function should reconfigure and reset the endpoints
	331	* according to the interface descriptors you provided.
	332	*/
	333	BOOL handle_set_interface(BYTE ifc,BYTE alt_ifc)
	334	{
	335	if (ifc == 0)
	336	select_interface(alt_ifc);
	337
	338	return TRUE;
	339	}
	340
	341	BYTE handle_get_configuration(void)
	342	{
	343	/* We only support configuration 0. */
	344	return 0;
	345	}
	346
	347	BOOL handle_set_configuration(BYTE cfg)
	348	{
	349	/* We only support configuration 0. */
	350	(void)cfg;
	351
	352	return TRUE;
	353	}
	354
	355	BOOL handle_vendorcommand(BYTE cmd)
	356	{
	357	stop_sampling();
	358
359	/* Set red LED. */
360	PC0 = 0;
361	PC1 = 1;
362	ledcounter = 1000;
363
364	/* Clear EP0BCH/L for each valid command. */
365	if (cmd >= 0xe0 && cmd <= 0xe4) {
366	EP0BCH = 0;
367	EP0BCL = 0;
368	while (EP0CS & bmEPBUSY);
369	}
370
371	switch (cmd) {
372	case 0xe0:
373	case 0xe1:
374	set_voltage(cmd - 0xe0, EP0BUF[0]);
375	return TRUE;
376	case 0xe2:
377	set_samplerate(EP0BUF[0]);
378	return TRUE;
379	case 0xe3:
380	if (EP0BUF[0] == 1)
381	start_sampling();
382	return TRUE;
383	case 0xe4:
384	set_numchannels(EP0BUF[0]);
385	return TRUE;
386	}
387
388	return FALSE; /* Not handled by handlers. */
389	}
390
391	static void init(void)
392	{
393	EP4CFG = 0;
394	EP8CFG = 0;
395
59562384	396	/* Set analog mode. */
eb52aca4 JL	397	PA7 = 1;
eb52aca4 JL	398
1d203181 STA	399	/* In idle mode tristate all outputs. */
	400	GPIFIDLECTL = 0x00; /* Don't enable CTL0-5 outputs. */
	401	GPIFCTLCFG = 0x80; /* TRICTL=1. CTL0-2: CMOS outputs, tri-statable. */
	402	GPIFWFSELECT = 0x00;
	403	GPIFREADYSTAT = 0x00;
	404
	405	stop_sampling();
	406
	407	set_voltage(0, 1);
	408	set_voltage(1, 1);
	409	set_samplerate(1);
	410	set_numchannels(2);
	411	select_interface(0);
	412	}
	413
	414	static void main(void)
	415	{
	416	/* Save energy. */
	417	SETCPUFREQ(CLK_12M);
	418
	419	init();
	420
	421	/* Set up interrupts. */
	422	USE_USB_INTS();
	423
	424	ENABLE_SUDAV();
	425	ENABLE_USBRESET();
	426	ENABLE_HISPEED();
	427	ENABLE_SUSPEND();
	428	ENABLE_RESUME();
	429
	430	/* Global (8051) interrupt enable. */
	431	EA = 1;
	432
	433	/* Init timer2. */
	434	RCAP2L = -500 & 0xff;
	435	RCAP2H = (-500 & 0xff00) >> 8;
	436	T2CON = 0;
	437	ET2 = 1;
	438	TR2 = 1;
	439
	440	RENUMERATE();
	441
	442	PORTCCFG = 0;
	443	PORTACFG = 0;
	444	OEC = 0xff;
f6eb6aec	445	OEA = 0xff;
1d203181 STA	446
	447	while (TRUE) {
	448	if (dosud) {
	449	dosud = FALSE;
	450	handle_setupdata();
	451	}
	452
	453	if (dosuspend) {
	454	dosuspend = FALSE;
	455	do {
	456	/* Make sure ext wakeups are cleared. */
3968bbfb	457	WAKEUPCS \|= bmWU \| bmWU2;
1d203181 STA	458	SUSPEND = 1;
	459	PCON \|= 1;
	460	__asm
	461	nop
	462	nop
	463	nop
	464	nop
	465	nop
	466	nop
	467	nop
	468	__endasm;
	469	} while (!remote_wakeup_allowed && REMOTE_WAKEUP());
	470
	471	/* Resume (TRM 6.4). */
	472	if (REMOTE_WAKEUP()) {
	473	delay(5);
	474	USBCS \|= bmSIGRESUME;
	475	delay(15);
	476	USBCS &= ~bmSIGRESUME;
	477	}
	478	}
	479	}
	480	}