[sigrok-firmware-fx2lafw.git] / hantek_6022bl.c

/*
 * This file is part of the sigrok-firmware-fx2lafw project.
 *
 * Copyright (C) 2009 Ubixum, Inc.
 * Copyright (C) 2015 Jochen Hoenicke
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2.1 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */

#include <fx2macros.h>
#include <fx2ints.h>
#include <autovector.h>
#include <delay.h>
#include <setupdat.h>

/* Change to support as many interfaces as you need. */
static BYTE altiface = 0;

static volatile WORD ledcounter = 0;

static volatile __bit dosud = FALSE;
static volatile __bit dosuspend = FALSE;

extern __code BYTE highspd_dscr;
extern __code BYTE fullspd_dscr;

void resume_isr(void) __interrupt RESUME_ISR
{
	CLEAR_RESUME();
}

void sudav_isr(void) __interrupt SUDAV_ISR
{
	dosud = TRUE;
	CLEAR_SUDAV();
}

void usbreset_isr(void) __interrupt USBRESET_ISR
{
	handle_hispeed(FALSE);
	CLEAR_USBRESET();
}

void hispeed_isr(void) __interrupt HISPEED_ISR
{
	handle_hispeed(TRUE);
	CLEAR_HISPEED();
}

void suspend_isr(void) __interrupt SUSPEND_ISR
{
	dosuspend = TRUE;
	CLEAR_SUSPEND();
}

void timer2_isr(void) __interrupt TF2_ISR
{
	/* Toggle the 1kHz calibration pin, only accurate up to ca 8MHz. */
	PC2 = !PC2;

	if (ledcounter) {
		if (--ledcounter == 0) {
			/* Clear LED. */
			PC0 = 1;
			PC1 = 1;
		}
	}
	TF2 = 0;
}

/*
 * This sets three bits for each channel, one channel at a time.
 * For channel 0 we want to set bits 5, 6 & 7
 * For channel 1 we want to set bits 2, 3 & 4
 *
 * We convert the input values that are strange due to original
 * firmware code into the value of the three bits as follows:
 *
 * val -> bits
 * 1  -> 010b
 * 2  -> 001b
 * 5  -> 000b
 * 10 -> 011b
 *
 * The third bit is always zero since there are only four outputs connected
 * in the serial selector chip.
 *
 * The multiplication of the converted value by 0x24 sets the relevant bits in
 * both channels and then we mask it out to only affect the channel currently
 * requested.
 */
static BOOL set_voltage(BYTE channel, BYTE val)
{
	BYTE bits, mask;

	switch (val) {
	case 1:
		bits = 0x24 * 2;
		break;
	case 2:
		bits = 0x24 * 1;
		break;
	case 5:
		bits = 0x24 * 0;
		break;
	case 10:
		bits = 0x24 * 3;
		break;
	default:
		return FALSE;
	}

	mask = (channel) ? 0xe0 : 0x1c;
	IOC = (IOC & ~mask) | (bits & mask);

	return TRUE;
}

static BOOL set_numchannels(BYTE numchannels)
{
	if (numchannels == 1 || numchannels == 2) {
		BYTE fifocfg = 7 + numchannels;
		EP2FIFOCFG = fifocfg;
		EP6FIFOCFG = fifocfg;
		return TRUE;
	}

	return FALSE;
}

static void clear_fifo(void)
{
	GPIFABORT = 0xff;
	SYNCDELAY3;
	FIFORESET = 0x80;
	SYNCDELAY3;
	FIFORESET = 0x82;
	SYNCDELAY3;
	FIFORESET = 0x86;
	SYNCDELAY3;
	FIFORESET = 0;
}

static void stop_sampling(void)
{
	GPIFABORT = 0xff;
	SYNCDELAY3;
	INPKTEND = (altiface == 0) ? 6 : 2;
}

static void start_sampling(void)
{
	int i;

	clear_fifo();

	for (i = 0; i < 1000; i++);

	while (!(GPIFTRIG & 0x80))
		;

	SYNCDELAY3;
	GPIFTCB1 = 0x28;
	SYNCDELAY3;
	GPIFTCB0 = 0;
	GPIFTRIG = (altiface == 0) ? 6 : 4;

	/* Set green LED, don't clear LED. */
	ledcounter = 0;
	PC0 = 1;
	PC1 = 0;
}

static void select_interface(BYTE alt)
{
	const BYTE *pPacketSize = \
		((USBCS & bmHSM) ? &highspd_dscr : &fullspd_dscr)
		+ (9 + (16 * alt) + 9 + 4);

	altiface = alt;

	if (alt == 0) {
		/* Bulk on EP6. */
		EP2CFG = 0x00;
		EP6CFG = 0xe0;
		EP6GPIFFLGSEL = 1;
		EP6AUTOINLENL = pPacketSize[0];
		EP6AUTOINLENH = pPacketSize[1];
	} else {
		/* Iso on EP2. */
		EP2CFG = 0xd8;
		EP6CFG = 0x00;
		EP2GPIFFLGSEL = 1;
		EP2AUTOINLENL = pPacketSize[0];
		EP2AUTOINLENH = pPacketSize[1] & 0x7;
		EP2ISOINPKTS = (pPacketSize[1] >> 3) + 1;
	}
}

static const struct samplerate_info {
	BYTE rate;
	BYTE wait0;
	BYTE wait1;
	BYTE opc0;
	BYTE opc1;
	BYTE out0;
	BYTE ifcfg;
} samplerates[] = {
	{ 48, 0x80,   0, 3, 0, 0x00, 0xea },
	{ 30, 0x80,   0, 3, 0, 0x00, 0xaa },
	{ 24,    1,   0, 2, 1, 0x40, 0xca },
	{ 16,    1,   1, 2, 0, 0x40, 0xca },
	{ 12,    2,   1, 2, 0, 0x40, 0xca },
	{  8,    3,   2, 2, 0, 0x40, 0xca },
	{  4,    6,   5, 2, 0, 0x40, 0xca },
	{  2,   12,  11, 2, 0, 0x40, 0xca },
	{  1,   24,  23, 2, 0, 0x40, 0xca },
	{ 50,   48,  47, 2, 0, 0x40, 0xca },
	{ 20,  120, 119, 2, 0, 0x40, 0xca },
	{ 10,  240, 239, 2, 0, 0x40, 0xca },
};

static BOOL set_samplerate(BYTE rate)
{
	BYTE i = 0;

	while (samplerates[i].rate != rate) {
		i++;
		if (i == sizeof(samplerates) / sizeof(samplerates[0]))
			return FALSE;
	}

	IFCONFIG = samplerates[i].ifcfg;

	AUTOPTRSETUP = 7;
	AUTOPTRH2 = 0xE4; /* 0xE400: GPIF waveform descriptor 0. */
	AUTOPTRL2 = 0x00;

	/*
	 * The program for low-speed, e.g. 1 MHz, is:
	 * wait 24, CTL2=0, FIFO
	 * wait 23, CTL2=1
	 * jump 0, CTL2=1
	 *
	 * The program for 24 MHz is:
	 * wait 1, CTL2=0, FIFO
	 * jump 0, CTL2=1
	 *
	 * The program for 30/48 MHz is:
	 * jump 0, CTL2=Z, FIFO, LOOP
	 */

	/* LENGTH / BRANCH 0-7 */
	EXTAUTODAT2 = samplerates[i].wait0;
	EXTAUTODAT2 = samplerates[i].wait1;
	EXTAUTODAT2 = 1;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;

	/* OPCODE 0-7 */
	EXTAUTODAT2 = samplerates[i].opc0;
	EXTAUTODAT2 = samplerates[i].opc1;
	EXTAUTODAT2 = 1; /* DATA=0 DP=1 */
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;

	/* OUTPUT 0-7 */
	EXTAUTODAT2 = samplerates[i].out0;
	EXTAUTODAT2 = 0x44; /* OE0=1, CTL0=1 */
	EXTAUTODAT2 = 0x44; /* OE0=1, CTL0=1 */
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;

	/* LOGIC FUNCTION 0-7 */
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;

	for (i = 0; i < 96; i++)
		EXTAUTODAT2 = 0;

	return TRUE;
}

/* Set *alt_ifc to the current alt interface for ifc. */
BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
{
	(void)ifc;

	*alt_ifc = altiface;

	return TRUE;
}

/*
 * Return TRUE if you set the interface requested.
 *
 * Note: This function should reconfigure and reset the endpoints
 * according to the interface descriptors you provided.
 */
BOOL handle_set_interface(BYTE ifc,BYTE alt_ifc)
{
	if (ifc == 0)
		select_interface(alt_ifc);

	return TRUE;
}

BYTE handle_get_configuration(void)
{
	/* We only support configuration 0. */
	return 0;
}

BOOL handle_set_configuration(BYTE cfg)
{
	/* We only support configuration 0. */
	(void)cfg;

	return TRUE;
}

BOOL handle_vendorcommand(BYTE cmd)
{
	stop_sampling();

	/* Set red LED. */
	PC0 = 0;
	PC1 = 1;
	ledcounter = 1000;

	/* Clear EP0BCH/L for each valid command. */
	if (cmd >= 0xe0 && cmd <= 0xe4) {
		EP0BCH = 0;
		EP0BCL = 0;
		while (EP0CS & bmEPBUSY);
	}

	switch (cmd) {
	case 0xe0:
	case 0xe1:
		set_voltage(cmd - 0xe0, EP0BUF[0]);
		return TRUE;
	case 0xe2:
		set_samplerate(EP0BUF[0]);
		return TRUE;
	case 0xe3:
		if (EP0BUF[0] == 1)
			start_sampling();
		return TRUE;
	case 0xe4:
		set_numchannels(EP0BUF[0]);
		return TRUE;
	}

	return FALSE; /* Not handled by handlers. */
}

static void init(void)
{
	EP4CFG = 0;
	EP8CFG = 0;

	/* Set analog mode */
	PA7 = 1;

	/* In idle mode tristate all outputs. */
	GPIFIDLECTL = 0x00; /* Don't enable CTL0-5 outputs. */
	GPIFCTLCFG = 0x80; /* TRICTL=1. CTL0-2: CMOS outputs, tri-statable. */
	GPIFWFSELECT = 0x00;
	GPIFREADYSTAT = 0x00;

	stop_sampling();

	set_voltage(0, 1);
	set_voltage(1, 1);
	set_samplerate(1);
	set_numchannels(2);
	select_interface(0);
}

static void main(void)
{
	/* Save energy. */
	SETCPUFREQ(CLK_12M);

	init();

	/* Set up interrupts. */
	USE_USB_INTS();

	ENABLE_SUDAV();
	ENABLE_USBRESET();
	ENABLE_HISPEED(); 
	ENABLE_SUSPEND();
	ENABLE_RESUME();

	/* Global (8051) interrupt enable. */
	EA = 1;

	/* Init timer2. */
	RCAP2L = -500 & 0xff;
	RCAP2H = (-500 & 0xff00) >> 8;
	T2CON = 0;
	ET2 = 1;
	TR2 = 1;

	RENUMERATE();

	PORTCCFG = 0;
	PORTACFG = 0;
	OEC = 0xff;
	OEA = 0x80;

	while (TRUE) {
		if (dosud) {
			dosud = FALSE;
			handle_setupdata();
		}

		if (dosuspend) {
			dosuspend = FALSE;
			do {
				/* Make sure ext wakeups are cleared. */
				WAKEUPCS |= bmWU|bmWU2;
				SUSPEND = 1;
				PCON |= 1;
				__asm
				nop
				nop
				nop
				nop
				nop
				nop
				nop
				__endasm;
			} while (!remote_wakeup_allowed && REMOTE_WAKEUP());

			/* Resume (TRM 6.4). */
			if (REMOTE_WAKEUP()) {
				delay(5);
				USBCS |= bmSIGRESUME;
				delay(15);
				USBCS &= ~bmSIGRESUME;
			}
		}
	}
}
Commit	Line	Data
1d203181 STA	1	/*
	2	* This file is part of the sigrok-firmware-fx2lafw project.
	3	*
	4	* Copyright (C) 2009 Ubixum, Inc.
	5	* Copyright (C) 2015 Jochen Hoenicke
	6	*
	7	* This library is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU Lesser General Public
	9	* License as published by the Free Software Foundation; either
	10	* version 2.1 of the License, or (at your option) any later version.
	11	*
	12	* This library is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* Lesser General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU Lesser General Public
	18	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
	19	*/
	20
	21	#include <fx2macros.h>
	22	#include <fx2ints.h>
	23	#include <autovector.h>
	24	#include <delay.h>
	25	#include <setupdat.h>
	26
	27	/* Change to support as many interfaces as you need. */
	28	static BYTE altiface = 0;
	29
	30	static volatile WORD ledcounter = 0;
	31
	32	static volatile __bit dosud = FALSE;
	33	static volatile __bit dosuspend = FALSE;
	34
	35	extern __code BYTE highspd_dscr;
	36	extern __code BYTE fullspd_dscr;
	37
	38	void resume_isr(void) __interrupt RESUME_ISR
	39	{
	40	CLEAR_RESUME();
	41	}
	42
	43	void sudav_isr(void) __interrupt SUDAV_ISR
	44	{
	45	dosud = TRUE;
	46	CLEAR_SUDAV();
	47	}
	48
	49	void usbreset_isr(void) __interrupt USBRESET_ISR
	50	{
	51	handle_hispeed(FALSE);
	52	CLEAR_USBRESET();
	53	}
	54
	55	void hispeed_isr(void) __interrupt HISPEED_ISR
	56	{
	57	handle_hispeed(TRUE);
	58	CLEAR_HISPEED();
	59	}
	60
	61	void suspend_isr(void) __interrupt SUSPEND_ISR
	62	{
	63	dosuspend = TRUE;
	64	CLEAR_SUSPEND();
65	}
66
67	void timer2_isr(void) __interrupt TF2_ISR
68	{
cbd1bc65 JL	69	/* Toggle the 1kHz calibration pin, only accurate up to ca 8MHz. */
	70	PC2 = !PC2;
	71
1d203181 STA	72	if (ledcounter) {
	73	if (--ledcounter == 0) {
	74	/* Clear LED. */
	75	PC0 = 1;
	76	PC1 = 1;
	77	}
	78	}
	79	TF2 = 0;
	80	}
	81
	82	/*
	83	* This sets three bits for each channel, one channel at a time.
	84	* For channel 0 we want to set bits 5, 6 & 7
	85	* For channel 1 we want to set bits 2, 3 & 4
	86	*
	87	* We convert the input values that are strange due to original
	88	* firmware code into the value of the three bits as follows:
	89	*
	90	* val -> bits
	91	* 1 -> 010b
	92	* 2 -> 001b
	93	* 5 -> 000b
	94	* 10 -> 011b
	95	*
	96	* The third bit is always zero since there are only four outputs connected
	97	* in the serial selector chip.
	98	*
	99	* The multiplication of the converted value by 0x24 sets the relevant bits in
	100	* both channels and then we mask it out to only affect the channel currently
	101	* requested.
	102	*/
	103	static BOOL set_voltage(BYTE channel, BYTE val)
	104	{
	105	BYTE bits, mask;
	106
	107	switch (val) {
	108	case 1:
	109	bits = 0x24 * 2;
	110	break;
	111	case 2:
	112	bits = 0x24 * 1;
	113	break;
	114	case 5:
	115	bits = 0x24 * 0;
	116	break;
	117	case 10:
	118	bits = 0x24 * 3;
	119	break;
	120	default:
	121	return FALSE;
	122	}
	123
	124	mask = (channel) ? 0xe0 : 0x1c;
	125	IOC = (IOC & ~mask) \| (bits & mask);
	126
	127	return TRUE;
	128	}
	129
	130	static BOOL set_numchannels(BYTE numchannels)
	131	{
	132	if (numchannels == 1 \|\| numchannels == 2) {
	133	BYTE fifocfg = 7 + numchannels;
	134	EP2FIFOCFG = fifocfg;
	135	EP6FIFOCFG = fifocfg;
136	return TRUE;
137	}
138
139	return FALSE;
140	}
141
142	static void clear_fifo(void)
143	{
144	GPIFABORT = 0xff;
145	SYNCDELAY3;
146	FIFORESET = 0x80;
147	SYNCDELAY3;
148	FIFORESET = 0x82;
149	SYNCDELAY3;
150	FIFORESET = 0x86;
151	SYNCDELAY3;
152	FIFORESET = 0;
153	}
154
155	static void stop_sampling(void)
156	{
157	GPIFABORT = 0xff;
158	SYNCDELAY3;
159	INPKTEND = (altiface == 0) ? 6 : 2;
160	}
161
162	static void start_sampling(void)
163	{
164	int i;
165
166	clear_fifo();
167
168	for (i = 0; i < 1000; i++);
169
170	while (!(GPIFTRIG & 0x80))
171	;
172
173	SYNCDELAY3;
174	GPIFTCB1 = 0x28;
175	SYNCDELAY3;
176	GPIFTCB0 = 0;
177	GPIFTRIG = (altiface == 0) ? 6 : 4;
178
179	/* Set green LED, don't clear LED. */
180	ledcounter = 0;
181	PC0 = 1;
182	PC1 = 0;
183	}
184
185	static void select_interface(BYTE alt)
186	{
187	const BYTE *pPacketSize = \
188	((USBCS & bmHSM) ? &highspd_dscr : &fullspd_dscr)
189	+ (9 + (16 * alt) + 9 + 4);
190
191	altiface = alt;
192
193	if (alt == 0) {
194	/* Bulk on EP6. */
195	EP2CFG = 0x00;
196	EP6CFG = 0xe0;
197	EP6GPIFFLGSEL = 1;
198	EP6AUTOINLENL = pPacketSize[0];
199	EP6AUTOINLENH = pPacketSize[1];
200	} else {
201	/* Iso on EP2. */
202	EP2CFG = 0xd8;
203	EP6CFG = 0x00;
204	EP2GPIFFLGSEL = 1;
205	EP2AUTOINLENL = pPacketSize[0];
206	EP2AUTOINLENH = pPacketSize[1] & 0x7;
207	EP2ISOINPKTS = (pPacketSize[1] >> 3) + 1;
208	}
209	}
210
211	static const struct samplerate_info {
212	BYTE rate;
213	BYTE wait0;
214	BYTE wait1;
215	BYTE opc0;
216	BYTE opc1;
217	BYTE out0;
218	BYTE ifcfg;
219	} samplerates[] = {
220	{ 48, 0x80, 0, 3, 0, 0x00, 0xea },
221	{ 30, 0x80, 0, 3, 0, 0x00, 0xaa },
222	{ 24, 1, 0, 2, 1, 0x40, 0xca },
223	{ 16, 1, 1, 2, 0, 0x40, 0xca },
224	{ 12, 2, 1, 2, 0, 0x40, 0xca },
225	{ 8, 3, 2, 2, 0, 0x40, 0xca },
226	{ 4, 6, 5, 2, 0, 0x40, 0xca },
227	{ 2, 12, 11, 2, 0, 0x40, 0xca },
228	{ 1, 24, 23, 2, 0, 0x40, 0xca },
229	{ 50, 48, 47, 2, 0, 0x40, 0xca },
230	{ 20, 120, 119, 2, 0, 0x40, 0xca },
231	{ 10, 240, 239, 2, 0, 0x40, 0xca },
232	};
233
234	static BOOL set_samplerate(BYTE rate)
235	{
236	BYTE i = 0;
237
238	while (samplerates[i].rate != rate) {
239	i++;
240	if (i == sizeof(samplerates) / sizeof(samplerates[0]))
241	return FALSE;
242	}
243
244	IFCONFIG = samplerates[i].ifcfg;
245
246	AUTOPTRSETUP = 7;
247	AUTOPTRH2 = 0xE4; /* 0xE400: GPIF waveform descriptor 0. */
248	AUTOPTRL2 = 0x00;
249
250	/*
251	* The program for low-speed, e.g. 1 MHz, is:
252	* wait 24, CTL2=0, FIFO
253	* wait 23, CTL2=1
254	* jump 0, CTL2=1
255	*
256	* The program for 24 MHz is:
257	* wait 1, CTL2=0, FIFO
258	* jump 0, CTL2=1
259	*
260	* The program for 30/48 MHz is:
261	* jump 0, CTL2=Z, FIFO, LOOP
262	*/
263
264	/* LENGTH / BRANCH 0-7 */
265	EXTAUTODAT2 = samplerates[i].wait0;
266	EXTAUTODAT2 = samplerates[i].wait1;
267	EXTAUTODAT2 = 1;
268	EXTAUTODAT2 = 0;
269	EXTAUTODAT2 = 0;
270	EXTAUTODAT2 = 0;
271	EXTAUTODAT2 = 0;
272	EXTAUTODAT2 = 0;
273
274	/* OPCODE 0-7 */
275	EXTAUTODAT2 = samplerates[i].opc0;
276	EXTAUTODAT2 = samplerates[i].opc1;
277	EXTAUTODAT2 = 1; /* DATA=0 DP=1 */
278	EXTAUTODAT2 = 0;
279	EXTAUTODAT2 = 0;
280	EXTAUTODAT2 = 0;
281	EXTAUTODAT2 = 0;
282	EXTAUTODAT2 = 0;
283
284	/* OUTPUT 0-7 */
285	EXTAUTODAT2 = samplerates[i].out0;
286	EXTAUTODAT2 = 0x44; /* OE0=1, CTL0=1 */
287	EXTAUTODAT2 = 0x44; /* OE0=1, CTL0=1 */
288	EXTAUTODAT2 = 0;
289	EXTAUTODAT2 = 0;
290	EXTAUTODAT2 = 0;
291	EXTAUTODAT2 = 0;
292	EXTAUTODAT2 = 0;
293
294	/* LOGIC FUNCTION 0-7 */
295	EXTAUTODAT2 = 0;
296	EXTAUTODAT2 = 0;
297	EXTAUTODAT2 = 0;
298	EXTAUTODAT2 = 0;
299	EXTAUTODAT2 = 0;
300	EXTAUTODAT2 = 0;
301	EXTAUTODAT2 = 0;
302	EXTAUTODAT2 = 0;
303
304	for (i = 0; i < 96; i++)
305	EXTAUTODAT2 = 0;
306
307	return TRUE;
308	}
309
310	/* Set alt_ifc to the current alt interface for ifc. /
311	BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
312	{
313	(void)ifc;
314
315	*alt_ifc = altiface;
316
317	return TRUE;
318	}
319
320	/*
321	* Return TRUE if you set the interface requested.
322	*
323	* Note: This function should reconfigure and reset the endpoints
324	* according to the interface descriptors you provided.
325	*/
326	BOOL handle_set_interface(BYTE ifc,BYTE alt_ifc)
327	{
328	if (ifc == 0)
329	select_interface(alt_ifc);
330
331	return TRUE;
332	}
333
334	BYTE handle_get_configuration(void)
335	{
336	/* We only support configuration 0. */
337	return 0;
338	}
339
340	BOOL handle_set_configuration(BYTE cfg)
341	{
342	/* We only support configuration 0. */
343	(void)cfg;
344
345	return TRUE;
346	}
347
348	BOOL handle_vendorcommand(BYTE cmd)
349	{
350	stop_sampling();
351
352	/* Set red LED. */
353	PC0 = 0;
354	PC1 = 1;
355	ledcounter = 1000;
356
357	/* Clear EP0BCH/L for each valid command. */
358	if (cmd >= 0xe0 && cmd <= 0xe4) {
359	EP0BCH = 0;
360	EP0BCL = 0;
361	while (EP0CS & bmEPBUSY);
362	}
363
364	switch (cmd) {
365	case 0xe0:
366	case 0xe1:
367	set_voltage(cmd - 0xe0, EP0BUF[0]);
368	return TRUE;
369	case 0xe2:
370	set_samplerate(EP0BUF[0]);
371	return TRUE;
372	case 0xe3:
373	if (EP0BUF[0] == 1)
374	start_sampling();
375	return TRUE;
376	case 0xe4:
377	set_numchannels(EP0BUF[0]);
378	return TRUE;
379	}
380
381	return FALSE; /* Not handled by handlers. */
382	}
383
384	static void init(void)
385	{
386	EP4CFG = 0;
387	EP8CFG = 0;
388
eb52aca4 JL	389	/* Set analog mode */
	390	PA7 = 1;
	391
1d203181 STA	392	/* In idle mode tristate all outputs. */
	393	GPIFIDLECTL = 0x00; /* Don't enable CTL0-5 outputs. */
	394	GPIFCTLCFG = 0x80; /* TRICTL=1. CTL0-2: CMOS outputs, tri-statable. */
	395	GPIFWFSELECT = 0x00;
	396	GPIFREADYSTAT = 0x00;
	397
	398	stop_sampling();
	399
	400	set_voltage(0, 1);
	401	set_voltage(1, 1);
	402	set_samplerate(1);
	403	set_numchannels(2);
	404	select_interface(0);
	405	}
	406
	407	static void main(void)
	408	{
	409	/* Save energy. */
	410	SETCPUFREQ(CLK_12M);
	411
	412	init();
	413
	414	/* Set up interrupts. */
	415	USE_USB_INTS();
	416
	417	ENABLE_SUDAV();
	418	ENABLE_USBRESET();
	419	ENABLE_HISPEED();
	420	ENABLE_SUSPEND();
	421	ENABLE_RESUME();
	422
	423	/* Global (8051) interrupt enable. */
	424	EA = 1;
	425
	426	/* Init timer2. */
	427	RCAP2L = -500 & 0xff;
	428	RCAP2H = (-500 & 0xff00) >> 8;
	429	T2CON = 0;
	430	ET2 = 1;
	431	TR2 = 1;
	432
	433	RENUMERATE();
	434
	435	PORTCCFG = 0;
	436	PORTACFG = 0;
	437	OEC = 0xff;
	438	OEA = 0x80;
	439
	440	while (TRUE) {
	441	if (dosud) {
	442	dosud = FALSE;
	443	handle_setupdata();
	444	}
	445
	446	if (dosuspend) {
	447	dosuspend = FALSE;
	448	do {
	449	/* Make sure ext wakeups are cleared. */
	450	WAKEUPCS \|= bmWU\|bmWU2;
	451	SUSPEND = 1;
	452	PCON \|= 1;
	453	__asm
	454	nop
	455	nop
456	nop
457	nop
458	nop
459	nop
460	nop
461	__endasm;
462	} while (!remote_wakeup_allowed && REMOTE_WAKEUP());
463
464	/* Resume (TRM 6.4). */
465	if (REMOTE_WAKEUP()) {
466	delay(5);
467	USBCS \|= bmSIGRESUME;
468	delay(15);
469	USBCS &= ~bmSIGRESUME;
470	}
471	}
472	}
473	}