[sigrok-firmware-fx2lafw.git] / hantek_6022bl.c

/*
 * This file is part of the sigrok-firmware-fx2lafw project.
 *
 * Copyright (C) 2009 Ubixum, Inc.
 * Copyright (C) 2015 Jochen Hoenicke
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2.1 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */

#include <fx2macros.h>
#include <fx2ints.h>
#include <autovector.h>
#include <delay.h>
#include <setupdat.h>

#define SET_ANALOG_MODE() PA7 = 1

/* Toggle the 1kHz calibration pin, only accurate up to ca. 8MHz. */
#define TOGGLE_CALIBRATION_PIN() PC2 = !PC2

/* Change to support as many interfaces as you need. */
static BYTE altiface = 0;

static volatile WORD ledcounter = 0;

static volatile __bit dosud = FALSE;
static volatile __bit dosuspend = FALSE;

extern __code BYTE highspd_dscr;
extern __code BYTE fullspd_dscr;

void resume_isr(void) __interrupt RESUME_ISR
{
	CLEAR_RESUME();
}

void sudav_isr(void) __interrupt SUDAV_ISR
{
	dosud = TRUE;
	CLEAR_SUDAV();
}

void usbreset_isr(void) __interrupt USBRESET_ISR
{
	handle_hispeed(FALSE);
	CLEAR_USBRESET();
}

void hispeed_isr(void) __interrupt HISPEED_ISR
{
	handle_hispeed(TRUE);
	CLEAR_HISPEED();
}

void suspend_isr(void) __interrupt SUSPEND_ISR
{
	dosuspend = TRUE;
	CLEAR_SUSPEND();
}

void timer2_isr(void) __interrupt TF2_ISR
{
	TOGGLE_CALIBRATION_PIN();

	if (ledcounter) {
		if (--ledcounter == 0) {
			/* Clear LED. */
			PC0 = 1;
			PC1 = 1;
		}
	}

	TF2 = 0;
}

/*
 * This sets three bits for each channel, one channel at a time.
 * For channel 0 we want to set bits 1, 2 & 3
 * For channel 1 we want to set bits 4, 5 & 6
 *
 * We convert the input values that are strange due to original
 * firmware code into the value of the three bits as follows:
 *
 * val -> bits
 * 1  -> 010b
 * 2  -> 001b
 * 5  -> 000b
 * 10 -> 011b
 *
 * The third bit is always zero since there are only four outputs connected
 * in the serial selector chip.
 *
 * The multiplication of the converted value by 0x24 sets the relevant bits in
 * both channels and then we mask it out to only affect the channel currently
 * requested.
 */
static BOOL set_voltage(BYTE channel, BYTE val)
{
	BYTE bits, mask;

	switch (val) {
	case 1:
		bits = 0x02;
		break;
	case 2:
		bits = 0x01;
		break;
	case 5:
		bits = 0x00;
		break;
	case 10:
		bits = 0x03;
		break;
	default:
		return FALSE;
	}

	bits = bits << (channel ? 1 : 4);
	mask = (channel) ? 0x70 : 0x0e;
	IOA = (IOA & ~mask) | (bits & mask);

	return TRUE;
}

static BOOL set_numchannels(BYTE numchannels)
{
	if (numchannels == 1 || numchannels == 2) {
		BYTE fifocfg = 7 + numchannels;
		EP2FIFOCFG = fifocfg;
		EP6FIFOCFG = fifocfg;
		return TRUE;
	}

	return FALSE;
}

static void clear_fifo(void)
{
	GPIFABORT = 0xff;
	SYNCDELAY3;
	FIFORESET = 0x80;
	SYNCDELAY3;
	FIFORESET = 0x82;
	SYNCDELAY3;
	FIFORESET = 0x86;
	SYNCDELAY3;
	FIFORESET = 0;
}

static void stop_sampling(void)
{
	GPIFABORT = 0xff;
	SYNCDELAY3;
	INPKTEND = (altiface == 0) ? 6 : 2;
}

static void start_sampling(void)
{
	int i;

	SET_ANALOG_MODE();

	clear_fifo();

	for (i = 0; i < 1000; i++);

	while (!(GPIFTRIG & 0x80))
		;

	SYNCDELAY3;
	GPIFTCB1 = 0x28;
	SYNCDELAY3;
	GPIFTCB0 = 0;
	GPIFTRIG = (altiface == 0) ? 6 : 4;

	/* Set green LED, don't clear LED. */
	ledcounter = 0;
	PC0 = 1;
	PC1 = 0;
}

static void select_interface(BYTE alt)
{
	const BYTE *pPacketSize = \
		((USBCS & bmHSM) ? &highspd_dscr : &fullspd_dscr)
		+ (9 + (16 * alt) + 9 + 4);

	altiface = alt;

	if (alt == 0) {
		/* Bulk on EP6. */
		EP2CFG = 0x00;
		EP6CFG = 0xe0;
		EP6GPIFFLGSEL = 1;
		EP6AUTOINLENL = pPacketSize[0];
		EP6AUTOINLENH = pPacketSize[1];
	} else {
		/* Iso on EP2. */
		EP2CFG = 0xd8;
		EP6CFG = 0x00;
		EP2GPIFFLGSEL = 1;
		EP2AUTOINLENL = pPacketSize[0];
		EP2AUTOINLENH = pPacketSize[1] & 0x7;
		EP2ISOINPKTS = (pPacketSize[1] >> 3) + 1;
	}
}

static const struct samplerate_info {
	BYTE rate;
	BYTE wait0;
	BYTE wait1;
	BYTE opc0;
	BYTE opc1;
	BYTE out0;
	BYTE ifcfg;
} samplerates[] = {
	{ 48, 0x80,   0, 3, 0, 0x00, 0xea },
	{ 30, 0x80,   0, 3, 0, 0x00, 0xaa },
	{ 24,    1,   0, 2, 1, 0x10, 0xca },
	{ 16,    1,   1, 2, 0, 0x10, 0xca },
	{ 12,    2,   1, 2, 0, 0x10, 0xca },
	{  8,    3,   2, 2, 0, 0x10, 0xca },
	{  4,    6,   5, 2, 0, 0x10, 0xca },
	{  2,   12,  11, 2, 0, 0x10, 0xca },
	{  1,   24,  23, 2, 0, 0x10, 0xca },
	{ 50,   48,  47, 2, 0, 0x10, 0xca },
	{ 20,  120, 119, 2, 0, 0x10, 0xca },
	{ 10,  240, 239, 2, 0, 0x10, 0xca },
};

static BOOL set_samplerate(BYTE rate)
{
	BYTE i = 0;

	while (samplerates[i].rate != rate) {
		i++;
		if (i == sizeof(samplerates) / sizeof(samplerates[0]))
			return FALSE;
	}

	IFCONFIG = samplerates[i].ifcfg;

	AUTOPTRSETUP = 7;
	AUTOPTRH2 = 0xE4; /* 0xE400: GPIF waveform descriptor 0. */
	AUTOPTRL2 = 0x00;

	/*
	 * The program for low-speed, e.g. 1 MHz, is:
	 * wait 24, CTLx=0, FIFO
	 * wait 23, CTLx=1
	 * jump 0, CTLx=1
	 *
	 * The program for 24 MHz is:
	 * wait 1, CTLx=0, FIFO
	 * jump 0, CTLx=1
	 *
	 * The program for 30/48 MHz is:
	 * jump 0, CTLx=Z, FIFO, LOOP
	 *
	 * (CTLx is device-dependent, could be e.g. CTL0 or CTL2.)
	 */

	/* LENGTH / BRANCH 0-7 */
	EXTAUTODAT2 = samplerates[i].wait0;
	EXTAUTODAT2 = samplerates[i].wait1;
	EXTAUTODAT2 = 1;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;

	/* OPCODE 0-7 */
	EXTAUTODAT2 = samplerates[i].opc0;
	EXTAUTODAT2 = samplerates[i].opc1;
	EXTAUTODAT2 = 1; /* DATA=0 DP=1 */
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;

	/* OUTPUT 0-7 */
	EXTAUTODAT2 = samplerates[i].out0;
	EXTAUTODAT2 = 0x11; /* OE0=1, CTL0=1 */
	EXTAUTODAT2 = 0x11; /* OE0=1, CTL0=1 */
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;

	/* LOGIC FUNCTION 0-7 */
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;
	EXTAUTODAT2 = 0;

	for (i = 0; i < 96; i++)
		EXTAUTODAT2 = 0;

	return TRUE;
}

/* Set *alt_ifc to the current alt interface for ifc. */
BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
{
	(void)ifc;

	*alt_ifc = altiface;

	return TRUE;
}

/*
 * Return TRUE if you set the interface requested.
 *
 * Note: This function should reconfigure and reset the endpoints
 * according to the interface descriptors you provided.
 */
BOOL handle_set_interface(BYTE ifc,BYTE alt_ifc)
{
	if (ifc == 0)
		select_interface(alt_ifc);

	return TRUE;
}

BYTE handle_get_configuration(void)
{
	/* We only support configuration 0. */
	return 0;
}

BOOL handle_set_configuration(BYTE cfg)
{
	/* We only support configuration 0. */
	(void)cfg;

	return TRUE;
}

BOOL handle_vendorcommand(BYTE cmd)
{
	stop_sampling();

	/* Set red LED. */
	PC0 = 0;
	PC1 = 1;
	ledcounter = 1000;

	/* Clear EP0BCH/L for each valid command. */
	if (cmd >= 0xe0 && cmd <= 0xe4) {
		EP0BCH = 0;
		EP0BCL = 0;
		while (EP0CS & bmEPBUSY);
	}

	switch (cmd) {
	case 0xe0:
	case 0xe1:
		set_voltage(cmd - 0xe0, EP0BUF[0]);
		return TRUE;
	case 0xe2:
		set_samplerate(EP0BUF[0]);
		return TRUE;
	case 0xe3:
		if (EP0BUF[0] == 1)
			start_sampling();
		return TRUE;
	case 0xe4:
		set_numchannels(EP0BUF[0]);
		return TRUE;
	}

	return FALSE; /* Not handled by handlers. */
}

static void init(void)
{
	EP4CFG = 0;
	EP8CFG = 0;

	SET_ANALOG_MODE();

	/* In idle mode tristate all outputs. */
	GPIFIDLECTL = 0x00; /* Don't enable CTL0-5 outputs. */
	GPIFCTLCFG = 0x80; /* TRICTL=1. CTL0-2: CMOS outputs, tri-statable. */
	GPIFWFSELECT = 0x00;
	GPIFREADYSTAT = 0x00;

	stop_sampling();

	set_voltage(0, 1);
	set_voltage(1, 1);
	set_samplerate(1);
	set_numchannels(2);
	select_interface(0);
}

static void main(void)
{
	/* Save energy. */
	SETCPUFREQ(CLK_12M);

	init();

	/* Set up interrupts. */
	USE_USB_INTS();

	ENABLE_SUDAV();
	ENABLE_USBRESET();
	ENABLE_HISPEED(); 
	ENABLE_SUSPEND();
	ENABLE_RESUME();

	/* Global (8051) interrupt enable. */
	EA = 1;

	/* Init timer2. */
	RCAP2L = -500 & 0xff;
	RCAP2H = (-500 & 0xff00) >> 8;
	T2CON = 0;
	ET2 = 1;
	TR2 = 1;

	RENUMERATE();

	PORTCCFG = 0;
	PORTACFG = 0;
	OEC = 0xff;
	OEA = 0xff;

	while (TRUE) {
		if (dosud) {
			dosud = FALSE;
			handle_setupdata();
		}

		if (dosuspend) {
			dosuspend = FALSE;
			do {
				/* Make sure ext wakeups are cleared. */
				WAKEUPCS |= bmWU | bmWU2;
				SUSPEND = 1;
				PCON |= 1;
				__asm
				nop
				nop
				nop
				nop
				nop
				nop
				nop
				__endasm;
			} while (!remote_wakeup_allowed && REMOTE_WAKEUP());

			/* Resume (TRM 6.4). */
			if (REMOTE_WAKEUP()) {
				delay(5);
				USBCS |= bmSIGRESUME;
				delay(15);
				USBCS &= ~bmSIGRESUME;
			}
		}
	}
}
Commit	Line	Data
1d203181 STA	1	/*
	2	* This file is part of the sigrok-firmware-fx2lafw project.
	3	*
	4	* Copyright (C) 2009 Ubixum, Inc.
	5	* Copyright (C) 2015 Jochen Hoenicke
	6	*
	7	* This library is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU Lesser General Public
	9	* License as published by the Free Software Foundation; either
	10	* version 2.1 of the License, or (at your option) any later version.
	11	*
	12	* This library is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* Lesser General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU Lesser General Public
	18	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
	19	*/
	20
	21	#include <fx2macros.h>
	22	#include <fx2ints.h>
	23	#include <autovector.h>
	24	#include <delay.h>
	25	#include <setupdat.h>
	26
be6d306d UH	27	#define SET_ANALOG_MODE() PA7 = 1
be6d306d UH	28
e583c3fc UH	29	/* Toggle the 1kHz calibration pin, only accurate up to ca. 8MHz. */
	30	#define TOGGLE_CALIBRATION_PIN() PC2 = !PC2
	31
1d203181 STA	32	/* Change to support as many interfaces as you need. */
	33	static BYTE altiface = 0;
	34
	35	static volatile WORD ledcounter = 0;
	36
	37	static volatile __bit dosud = FALSE;
	38	static volatile __bit dosuspend = FALSE;
	39
	40	extern __code BYTE highspd_dscr;
	41	extern __code BYTE fullspd_dscr;
	42
	43	void resume_isr(void) __interrupt RESUME_ISR
	44	{
	45	CLEAR_RESUME();
	46	}
	47
	48	void sudav_isr(void) __interrupt SUDAV_ISR
	49	{
	50	dosud = TRUE;
	51	CLEAR_SUDAV();
	52	}
	53
	54	void usbreset_isr(void) __interrupt USBRESET_ISR
	55	{
	56	handle_hispeed(FALSE);
	57	CLEAR_USBRESET();
	58	}
	59
	60	void hispeed_isr(void) __interrupt HISPEED_ISR
	61	{
	62	handle_hispeed(TRUE);
	63	CLEAR_HISPEED();
	64	}
	65
	66	void suspend_isr(void) __interrupt SUSPEND_ISR
	67	{
	68	dosuspend = TRUE;
	69	CLEAR_SUSPEND();
	70	}
	71
	72	void timer2_isr(void) __interrupt TF2_ISR
	73	{
e583c3fc	74	TOGGLE_CALIBRATION_PIN();
cbd1bc65	75
1d203181 STA	76	if (ledcounter) {
	77	if (--ledcounter == 0) {
	78	/* Clear LED. */
	79	PC0 = 1;
	80	PC1 = 1;
	81	}
	82	}
3968bbfb	83
1d203181 STA	84	TF2 = 0;
	85	}
	86
	87	/*
	88	* This sets three bits for each channel, one channel at a time.
ae56b4f6 JL	89	* For channel 0 we want to set bits 1, 2 & 3
ae56b4f6 JL	90	* For channel 1 we want to set bits 4, 5 & 6
1d203181 STA	91	*
	92	* We convert the input values that are strange due to original
	93	* firmware code into the value of the three bits as follows:
	94	*
	95	* val -> bits
	96	* 1 -> 010b
	97	* 2 -> 001b
	98	* 5 -> 000b
	99	* 10 -> 011b
	100	*
	101	* The third bit is always zero since there are only four outputs connected
	102	* in the serial selector chip.
	103	*
	104	* The multiplication of the converted value by 0x24 sets the relevant bits in
	105	* both channels and then we mask it out to only affect the channel currently
	106	* requested.
	107	*/
	108	static BOOL set_voltage(BYTE channel, BYTE val)
	109	{
	110	BYTE bits, mask;
	111
	112	switch (val) {
	113	case 1:
ae56b4f6	114	bits = 0x02;
1d203181 STA	115	break;
1d203181 STA	116	case 2:
ae56b4f6	117	bits = 0x01;
1d203181 STA	118	break;
1d203181 STA	119	case 5:
ae56b4f6	120	bits = 0x00;
1d203181 STA	121	break;
1d203181 STA	122	case 10:
ae56b4f6	123	bits = 0x03;
1d203181 STA	124	break;
	125	default:
	126	return FALSE;
	127	}
	128
ae56b4f6 JL	129	bits = bits << (channel ? 1 : 4);
	130	mask = (channel) ? 0x70 : 0x0e;
	131	IOA = (IOA & ~mask) \| (bits & mask);
1d203181 STA	132
	133	return TRUE;
	134	}
	135
	136	static BOOL set_numchannels(BYTE numchannels)
	137	{
	138	if (numchannels == 1 \|\| numchannels == 2) {
	139	BYTE fifocfg = 7 + numchannels;
	140	EP2FIFOCFG = fifocfg;
	141	EP6FIFOCFG = fifocfg;
	142	return TRUE;
	143	}
	144
	145	return FALSE;
	146	}
	147
	148	static void clear_fifo(void)
	149	{
	150	GPIFABORT = 0xff;
	151	SYNCDELAY3;
	152	FIFORESET = 0x80;
	153	SYNCDELAY3;
	154	FIFORESET = 0x82;
	155	SYNCDELAY3;
	156	FIFORESET = 0x86;
	157	SYNCDELAY3;
	158	FIFORESET = 0;
	159	}
	160
	161	static void stop_sampling(void)
	162	{
	163	GPIFABORT = 0xff;
	164	SYNCDELAY3;
	165	INPKTEND = (altiface == 0) ? 6 : 2;
	166	}
	167
	168	static void start_sampling(void)
	169	{
	170	int i;
	171
be6d306d	172	SET_ANALOG_MODE();
59562384	173
1d203181 STA	174	clear_fifo();
	175
	176	for (i = 0; i < 1000; i++);
	177
	178	while (!(GPIFTRIG & 0x80))
	179	;
	180
	181	SYNCDELAY3;
	182	GPIFTCB1 = 0x28;
	183	SYNCDELAY3;
	184	GPIFTCB0 = 0;
	185	GPIFTRIG = (altiface == 0) ? 6 : 4;
	186
	187	/* Set green LED, don't clear LED. */
	188	ledcounter = 0;
	189	PC0 = 1;
	190	PC1 = 0;
	191	}
	192
	193	static void select_interface(BYTE alt)
	194	{
	195	const BYTE *pPacketSize = \
	196	((USBCS & bmHSM) ? &highspd_dscr : &fullspd_dscr)
	197	+ (9 + (16 * alt) + 9 + 4);
	198
	199	altiface = alt;
	200
	201	if (alt == 0) {
	202	/* Bulk on EP6. */
	203	EP2CFG = 0x00;
	204	EP6CFG = 0xe0;
	205	EP6GPIFFLGSEL = 1;
	206	EP6AUTOINLENL = pPacketSize[0];
	207	EP6AUTOINLENH = pPacketSize[1];
	208	} else {
	209	/* Iso on EP2. */
	210	EP2CFG = 0xd8;
	211	EP6CFG = 0x00;
	212	EP2GPIFFLGSEL = 1;
	213	EP2AUTOINLENL = pPacketSize[0];
	214	EP2AUTOINLENH = pPacketSize[1] & 0x7;
	215	EP2ISOINPKTS = (pPacketSize[1] >> 3) + 1;
	216	}
	217	}
	218
	219	static const struct samplerate_info {
	220	BYTE rate;
	221	BYTE wait0;
	222	BYTE wait1;
	223	BYTE opc0;
	224	BYTE opc1;
	225	BYTE out0;
	226	BYTE ifcfg;
	227	} samplerates[] = {
	228	{ 48, 0x80, 0, 3, 0, 0x00, 0xea },
	229	{ 30, 0x80, 0, 3, 0, 0x00, 0xaa },
90fdecb7 JL	230	{ 24, 1, 0, 2, 1, 0x10, 0xca },
	231	{ 16, 1, 1, 2, 0, 0x10, 0xca },
	232	{ 12, 2, 1, 2, 0, 0x10, 0xca },
	233	{ 8, 3, 2, 2, 0, 0x10, 0xca },
	234	{ 4, 6, 5, 2, 0, 0x10, 0xca },
	235	{ 2, 12, 11, 2, 0, 0x10, 0xca },
	236	{ 1, 24, 23, 2, 0, 0x10, 0xca },
	237	{ 50, 48, 47, 2, 0, 0x10, 0xca },
	238	{ 20, 120, 119, 2, 0, 0x10, 0xca },
	239	{ 10, 240, 239, 2, 0, 0x10, 0xca },
1d203181 STA	240	};
	241
	242	static BOOL set_samplerate(BYTE rate)
	243	{
	244	BYTE i = 0;
	245
	246	while (samplerates[i].rate != rate) {
	247	i++;
	248	if (i == sizeof(samplerates) / sizeof(samplerates[0]))
	249	return FALSE;
	250	}
	251
	252	IFCONFIG = samplerates[i].ifcfg;
	253
	254	AUTOPTRSETUP = 7;
	255	AUTOPTRH2 = 0xE4; /* 0xE400: GPIF waveform descriptor 0. */
	256	AUTOPTRL2 = 0x00;
	257
	258	/*
	259	* The program for low-speed, e.g. 1 MHz, is:
3968bbfb UH	260	* wait 24, CTLx=0, FIFO
	261	* wait 23, CTLx=1
	262	* jump 0, CTLx=1
1d203181 STA	263	*
1d203181 STA	264	* The program for 24 MHz is:
3968bbfb UH	265	* wait 1, CTLx=0, FIFO
3968bbfb UH	266	* jump 0, CTLx=1
1d203181 STA	267	*
1d203181 STA	268	* The program for 30/48 MHz is:
3968bbfb UH	269	* jump 0, CTLx=Z, FIFO, LOOP
	270	*
	271	* (CTLx is device-dependent, could be e.g. CTL0 or CTL2.)
1d203181 STA	272	*/
	273
	274	/* LENGTH / BRANCH 0-7 */
	275	EXTAUTODAT2 = samplerates[i].wait0;
	276	EXTAUTODAT2 = samplerates[i].wait1;
	277	EXTAUTODAT2 = 1;
	278	EXTAUTODAT2 = 0;
	279	EXTAUTODAT2 = 0;
	280	EXTAUTODAT2 = 0;
	281	EXTAUTODAT2 = 0;
	282	EXTAUTODAT2 = 0;
	283
	284	/* OPCODE 0-7 */
	285	EXTAUTODAT2 = samplerates[i].opc0;
	286	EXTAUTODAT2 = samplerates[i].opc1;
	287	EXTAUTODAT2 = 1; /* DATA=0 DP=1 */
	288	EXTAUTODAT2 = 0;
	289	EXTAUTODAT2 = 0;
	290	EXTAUTODAT2 = 0;
	291	EXTAUTODAT2 = 0;
	292	EXTAUTODAT2 = 0;
	293
	294	/* OUTPUT 0-7 */
	295	EXTAUTODAT2 = samplerates[i].out0;
a76fd2a9 JL	296	EXTAUTODAT2 = 0x11; /* OE0=1, CTL0=1 */
a76fd2a9 JL	297	EXTAUTODAT2 = 0x11; /* OE0=1, CTL0=1 */
1d203181 STA	298	EXTAUTODAT2 = 0;
	299	EXTAUTODAT2 = 0;
	300	EXTAUTODAT2 = 0;
	301	EXTAUTODAT2 = 0;
	302	EXTAUTODAT2 = 0;
	303
	304	/* LOGIC FUNCTION 0-7 */
	305	EXTAUTODAT2 = 0;
	306	EXTAUTODAT2 = 0;
	307	EXTAUTODAT2 = 0;
	308	EXTAUTODAT2 = 0;
	309	EXTAUTODAT2 = 0;
	310	EXTAUTODAT2 = 0;
	311	EXTAUTODAT2 = 0;
	312	EXTAUTODAT2 = 0;
	313
	314	for (i = 0; i < 96; i++)
	315	EXTAUTODAT2 = 0;
	316
	317	return TRUE;
	318	}
	319
	320	/* Set alt_ifc to the current alt interface for ifc. /
	321	BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
	322	{
	323	(void)ifc;
	324
	325	*alt_ifc = altiface;
	326
	327	return TRUE;
	328	}
	329
	330	/*
	331	* Return TRUE if you set the interface requested.
	332	*
	333	* Note: This function should reconfigure and reset the endpoints
	334	* according to the interface descriptors you provided.
	335	*/
	336	BOOL handle_set_interface(BYTE ifc,BYTE alt_ifc)
	337	{
	338	if (ifc == 0)
	339	select_interface(alt_ifc);
	340
	341	return TRUE;
	342	}
	343
	344	BYTE handle_get_configuration(void)
	345	{
	346	/* We only support configuration 0. */
	347	return 0;
	348	}
	349
	350	BOOL handle_set_configuration(BYTE cfg)
	351	{
	352	/* We only support configuration 0. */
	353	(void)cfg;
	354
	355	return TRUE;
	356	}
	357
	358	BOOL handle_vendorcommand(BYTE cmd)
	359	{
	360	stop_sampling();
	361
362	/* Set red LED. */
363	PC0 = 0;
364	PC1 = 1;
365	ledcounter = 1000;
366
367	/* Clear EP0BCH/L for each valid command. */
368	if (cmd >= 0xe0 && cmd <= 0xe4) {
369	EP0BCH = 0;
370	EP0BCL = 0;
371	while (EP0CS & bmEPBUSY);
372	}
373
374	switch (cmd) {
375	case 0xe0:
376	case 0xe1:
377	set_voltage(cmd - 0xe0, EP0BUF[0]);
378	return TRUE;
379	case 0xe2:
380	set_samplerate(EP0BUF[0]);
381	return TRUE;
382	case 0xe3:
383	if (EP0BUF[0] == 1)
384	start_sampling();
385	return TRUE;
386	case 0xe4:
387	set_numchannels(EP0BUF[0]);
388	return TRUE;
389	}
390
391	return FALSE; /* Not handled by handlers. */
392	}
393
394	static void init(void)
395	{
396	EP4CFG = 0;
397	EP8CFG = 0;
398
be6d306d	399	SET_ANALOG_MODE();
eb52aca4	400
1d203181 STA	401	/* In idle mode tristate all outputs. */
	402	GPIFIDLECTL = 0x00; /* Don't enable CTL0-5 outputs. */
	403	GPIFCTLCFG = 0x80; /* TRICTL=1. CTL0-2: CMOS outputs, tri-statable. */
	404	GPIFWFSELECT = 0x00;
	405	GPIFREADYSTAT = 0x00;
	406
	407	stop_sampling();
	408
	409	set_voltage(0, 1);
	410	set_voltage(1, 1);
	411	set_samplerate(1);
	412	set_numchannels(2);
	413	select_interface(0);
	414	}
	415
	416	static void main(void)
	417	{
	418	/* Save energy. */
	419	SETCPUFREQ(CLK_12M);
	420
	421	init();
	422
	423	/* Set up interrupts. */
	424	USE_USB_INTS();
	425
	426	ENABLE_SUDAV();
	427	ENABLE_USBRESET();
	428	ENABLE_HISPEED();
	429	ENABLE_SUSPEND();
	430	ENABLE_RESUME();
	431
	432	/* Global (8051) interrupt enable. */
	433	EA = 1;
	434
	435	/* Init timer2. */
	436	RCAP2L = -500 & 0xff;
	437	RCAP2H = (-500 & 0xff00) >> 8;
	438	T2CON = 0;
	439	ET2 = 1;
	440	TR2 = 1;
	441
	442	RENUMERATE();
	443
	444	PORTCCFG = 0;
	445	PORTACFG = 0;
	446	OEC = 0xff;
f6eb6aec	447	OEA = 0xff;
1d203181 STA	448
	449	while (TRUE) {
	450	if (dosud) {
	451	dosud = FALSE;
	452	handle_setupdata();
	453	}
	454
	455	if (dosuspend) {
	456	dosuspend = FALSE;
	457	do {
	458	/* Make sure ext wakeups are cleared. */
3968bbfb	459	WAKEUPCS \|= bmWU \| bmWU2;
1d203181 STA	460	SUSPEND = 1;
	461	PCON \|= 1;
	462	__asm
	463	nop
	464	nop
	465	nop
	466	nop
	467	nop
	468	nop
	469	nop
	470	__endasm;
	471	} while (!remote_wakeup_allowed && REMOTE_WAKEUP());
	472
	473	/* Resume (TRM 6.4). */
	474	if (REMOTE_WAKEUP()) {
	475	delay(5);
	476	USBCS \|= bmSIGRESUME;
	477	delay(15);
	478	USBCS &= ~bmSIGRESUME;
	479	}
	480	}
	481	}
	482	}