Digilent Analog Discovery/Info
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lsusb
$ lsusb -vvv
Bus 001 Device 003: ID 0403:6014 Future Technology Devices International, Ltd FT232H Single HS USB-UART/FIFO IC
Device Descriptor:
bLength 18
bDescriptorType 1
bcdUSB 2.00
bDeviceClass 0 (Defined at Interface level)
bDeviceSubClass 0
bDeviceProtocol 0
bMaxPacketSize0 64
idVendor 0x0403 Future Technology Devices International, Ltd
idProduct 0x6014 FT232H Single HS USB-UART/FIFO IC
bcdDevice 9.00
iManufacturer 1 Digilent
iProduct 2 Digilent USB Device
iSerial 3 210244449192
bNumConfigurations 1
Configuration Descriptor:
bLength 9
bDescriptorType 2
wTotalLength 32
bNumInterfaces 1
bConfigurationValue 1
iConfiguration 0
bmAttributes 0x80
(Bus Powered)
MaxPower 500mA
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 0
bAlternateSetting 0
bNumEndpoints 2
bInterfaceClass 255 Vendor Specific Class
bInterfaceSubClass 255 Vendor Specific Subclass
bInterfaceProtocol 255 Vendor Specific Protocol
iInterface 2 Digilent USB Device
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x81 EP 1 IN
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x02 EP 2 OUT
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0
Device Qualifier (for other device speed):
bLength 10
bDescriptorType 6
bcdUSB 2.00
bDeviceClass 0 (Defined at Interface level)
bDeviceSubClass 0
bDeviceProtocol 0
bMaxPacketSize0 64
bNumConfigurations 1
Device Status: 0x0000
(Bus Powered)
FPGA I/O map
Miscellaneous
- Red LED on N5, active high
Clocks
- 12 MHz clock on P7
Clock Generator
| Signal | FPGA pad |
|---|---|
| CS_CLKD_N | M14 |
| SCLK_CLKD | L14 |
| SDIO_CLKD | L13 |
| LD_CLKD | M13 |
Digital I/O
| External pin name | FPGA pad |
|---|---|
| T1 | D2 |
| T2 | D1 |
| 0 | E2 |
| 1 | F2 |
| 2 | G2 |
| 3 | H2 |
| 4 | J2 |
| 5 | K2 |
| 6 | L2 |
| 7 | M2 |
| 8 | E1 |
| 9 | F1 |
| 10 | G1 |
| 11 | H1 |
| 12 | J1 |
| 13 | K1 |
| 14 | L1 |
| 15 | M1 |
Scope
ADC
| ADC pin | FPGA pad |
|---|---|
| D13B | K14 |
| D12B | J13 |
| D11B | J14 |
| D10B | H13 |
| D9B | H14 |
| D8B | G13 |
| D7B | G14 |
| D6B | F13 |
| D5B | F14 |
| D4B | E13 |
| D3B | E14 |
| D2B | D13 |
| D1B | D14 |
| D0B | C13 |
| DCOB | H12 |
| SDIO | B12 |
| SCLK | A12 |
| CSB | B11 |
| PDWN | A11 |
Gain Selection
| Signal | FPGA pad |
|---|---|
| EN_HG_SC1 | J4 |
| EN_LG_SC1 | F3 |
| EN_HG_SC2 | C1 |
| EN_LG_SC2 | B1 |
Voltage Reference and Offset
| Signal | FPGA pad |
|---|---|
| SYNC_SC_OFF_N | F11 |
| SCLK_OFF | F12 |
| SDIN_OFF | C12 |
Arbitrary Waveform Generator
DAC
| DAC pin | FPGA pad |
|---|---|
| DB13 | B8 |
| DB12 | A7 |
| DB11 | B7 |
| DB10 | A6 |
| DB9 | B6 |
| DB8 | A5 |
| DB7 | B5 |
| DB6 | A4 |
| DB5 | A3 |
| DB4 | A8 |
| DB3 | B9 |
| DB2 | A9 |
| DB1 | B10 |
| DB0 | A10 |
| DCLKIO | C8 |
| SCLK | B4 |
| SDIO | B3 |
| CSN | A2 |
| RESET | D8 |
Gain Setting
| Signal | FPGA pad |
|---|---|
| SET_FS_AWG1 | D11 |
| SET_FS_AWG2 | C11 |
Voltage Reference and Offset
| Signal | FPGA pad |
|---|---|
| SCL_AWG_OFF | J3 |
| SDA_AWG_OFF | N3 |
Power Supplies and Control
USB Power Control
| Signal | FPGA pad |
|---|---|
| SCL_PWR | J11 |
| SDA_PWR | K13 |
| EN_AVCC | L4 |
User Supplies Control
| Signal | FPGA pad |
|---|---|
| SCL_PWR_TEMP | N4 |
| SDA_PWR_TEMP | M4 |
| EN_PWR_USR | P2 |
User Voltage Supplies
| Signal | FPGA pad |
|---|---|
| EN_5V0_USR | D4 |
| EN_-5V0_USR | D3 |
Internal Digital Supply
| Signal | FPGA pad |
|---|---|
| EN_DVCC1V8 | J12 |