Difference between revisions of "Saleae Logic Pro 16"
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| source_code_dir = | | source_code_dir = | ||
| channels = 16 | | channels = 16 | ||
| samplerate = 500/ | | samplerate = 500/100MHz (4ch/16ch) | ||
| samplerate_state = — | | samplerate_state = — | ||
| triggers = none (SW-only) | | triggers = none (SW-only) | ||
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The '''Saleae Logic Pro 16''' is a USB 3.0-based, 16-channel logic analyzer with | The '''Saleae Logic Pro 16''' is a USB 3.0-based, 16-channel logic analyzer with 500/100MHz sampling rate (at 4/16 enabled channels). It supports analog sampling on all 16 channels. | ||
It is part of the second-generation Saleae Logic series, which consists of the Logic 4 and 8, and the Pro 8 and 16. | It is part of the second-generation Saleae Logic series, which consists of the Logic 4 and 8, and the Pro 8 and 16. | ||
Revision as of 00:03, 5 November 2014
 | |
| Status | planned |
|---|---|
| Channels | 16 |
| Samplerate | 500/100MHz (4ch/16ch) |
| Samplerate (state) | — |
| Triggers | none (SW-only) |
| Min/max voltage | -50 — 50V tolerant |
| Threshold voltage | 1.2V to 5.5V digital, 0 to 10V analog |
| Memory | none |
| Compression | yes |
| Website | saleae.com |
The Saleae Logic Pro 16 is a USB 3.0-based, 16-channel logic analyzer with 500/100MHz sampling rate (at 4/16 enabled channels). It supports analog sampling on all 16 channels.
It is part of the second-generation Saleae Logic series, which consists of the Logic 4 and 8, and the Pro 8 and 16.
The case requires a Torx T9 screwdriver to open.
See Saleae Logic Pro 16/Info for more details (such as lsusb -v output) about the device.
See Saleae Logic and Saleae Logic16 for the predecessor products of the Saleae Logic Pro16.
Hardware
- FPGA: Xilinx Spartan-6 XC6SLX16, 14,579 logic elements (family overview) (datasheet)
- USB interface chip: Cypress CYUSB3014-BZXI (FX3) (datasheet)
- ADCs: 2x Hittite Microwave HMCAD1100 (datasheet)
- 32Kbit I2C EEPROM: 24C32A (datasheet)
- 12x amplifiers: Analog Devices ADA4891-4 (datasheet)
- This list is not yet complete.
There are several testpoints on the underside of the PCB. It is not yet certain what these are for. There is no visible JTAG header.
Photos
Device, front
Device, top
Device, bottom
PCB, top
PCB, bottom
