Difference between revisions of "RockyLogic Ant18e"
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Support for this device is currently being worked on. | Support for this device is currently being worked on. | ||
== Protocol == | |||
Since the device uses an FTDI chip for USB communcation with the host, the common endpoint configuration for devices like this is used: endpoint 1 for device-to-host communication, and endpoint 2 for host-to-device. | |||
=== Quick sample mode === | |||
This mode lets the host receive the status of all probes immediately. It's used by the original software to animate the "pins" display when a proper acquisition is not running. | |||
The host sends the two-byte command '''0x19 0x92''', and receives in return 18 bytes containing the state of all probes. Each byte has the information for one probe, encoded as follows: | |||
* bits 7-3: the probe ID, from 0 to 17 (shift right 3 bits) | |||
* bits 2-0: ''change count -- number of logic state changes on the probe since last sampling'' | |||
Revision as of 20:10, 15 December 2011
The RockyLogic Ant18e is a 1GHz logic analyzer. It has 18 probes and is powered via USB.
See RockyLogic_Ant18e/Info for more details (such as lsusb -vvv output) about the device.
Components
- Xilinx XC3S200 FPGA
- Xilinx XC9572XL CPLD
- FTDI FT245RL
- IDT 501MLF clock multiplier
- 25MHz clock
Status
Support for this device is currently being worked on.
Protocol
Since the device uses an FTDI chip for USB communcation with the host, the common endpoint configuration for devices like this is used: endpoint 1 for device-to-host communication, and endpoint 2 for host-to-device.
Quick sample mode
This mode lets the host receive the status of all probes immediately. It's used by the original software to animate the "pins" display when a proper acquisition is not running.
The host sends the two-byte command 0x19 0x92, and receives in return 18 bytes containing the state of all probes. Each byte has the information for one probe, encoded as follows:
- bits 7-3: the probe ID, from 0 to 17 (shift right 3 bits)
- bits 2-0: change count -- number of logic state changes on the probe since last sampling