KingST KQS3506-LA16100

From sigrok
Revision as of 20:30, 25 July 2013 by Uwe Hermann (talk | contribs) (→‎Hardware: Start the CLPD pinout.)
Jump to navigation Jump to search
KingST KQS3506-LA16100
Kingst kqs3506 la16100.png
Status planned
Channels 2/4/8/16
Samplerate 100/50/25/12.5MHz
Samplerate (state)
Triggers none (SW-only)
Min/max voltage -0.9V — 6V
Threshold voltage configurable:
for 1.8V to 3.6V systems: VIH=1.4V, VIL=0.7V
for 5V systems: VIH=3.6V, VIL=1.4V
Memory none
Compression yes
Website taobao.com

The KingST KQS3506-LA16100 is a USB-based, 16-channel logic analyzer with 100/50/25/12.5MHz sampling rate (at 2/4/8/16 enabled channels).

This is a clone of the Saleae Logic16.

See KingST KQS3506-LA16100/Info for more details (such as lsusb -vvv output) about the device.

Hardware


Pinouts and connections:


I2C EEPROM:

The Microchip 24LC02B is connected to the Cypress FX2. The WP pin of the EEPROM can be jumpered to low or high, in order to write-protect it (or not). The address pins (A0-A2) are all connected to GND, which makes the I2C EEPROM address of the EEPROM 0x50.

A0 (GND) 1-   O -8 VCC (3.3V)
A1 (GND) 2- -7 WP (jumper W2)
A2 (GND) 3- -6 SCL (FX2 SCL)
GND 4- -5 SDA (FX2 SDA)


CLPD:

The Altera EPM3032A JTAG pins are available on the J3 pin header.

1 2 3 4 5 6 7 8 9 10 11
JTAG TDI GND JTAG TMS VCC GND
12 13 14 15 16 17 18 19 20 21 22
GND VCC
23 24 25 26 27 28 29 30 31 32 33
GND JTAG TCK VCC GND JTAG TDO
34 35 36 37 38 39 40 41 42 43 44
GND VCC

Photos

TODO.

Protocol

See Saleae_Logic16#Protocol.

Resources