Rigol DS1052E
Revision as of 18:58, 14 February 2015 by Uwe Hermann (talk | contribs)
 | |
| Status | supported |
|---|---|
| Source code | rigol-ds |
| Channels | 2 |
| Samplerate | 1GSa/s (1ch), 500MSa/s (2ch) |
| Samplerate (eq. time) | 10GSa/s |
| Analog bandwidth | 50MHz |
| Vertical resolution | 8bits |
| Triggers | edge, pulse width, slope, video, pattern, continuous time, alternate |
| Input impedance | 1MΩ‖15pF 300V RMS CAT I |
| Memory | 1Mpts (mode/ch-dependent) |
| Display | 5.7" QVGA (320x240), 64K colors |
| Connectivity | USB host/device, RS232, pass/fail out |
| Features | math: + / — / x / FFT, vertical sensitivity: 2mV/div - 10V/div |
| Website | rigolna.com |
The Rigol DS1052E is a 50MHz, 1GSa/s, 2-channel digital storage oscilloscope.
See Rigol DS1052E/Info for more details (such as lsusb -v output) about the device.
See Rigol DS1000 series for information common to all devices in this series.
Hardware
(based on this wiki page)
- CPU: Analog ADSP-BF531
- Flash EPROM: Spansion S29GL064N90TFI04 - 8MB, 16Bit
- Sample RAM: ISSI IS61LPS25636A-200 - 256kx36, 200MHz @ 250MHz
- Config FRAM: Ramtron FM24CL04B - 4kb non volatile ferroelectric memory
- SDRAM: Hynix H57V1262GTR - 4x2x16 Mb (16 MB)
- A/D converter: 5x Analog AD9288-40 - 8-Bit, 40MHz MSPS Dual A/D Converter @100MHz
- A/D driver: National LMH6552 or LMH6553
- FPGA: Altera Cyclone III EP3C5F256C8N
- CPLD: Lattice Mach XO LCMXO256C-3TN100C
- USB interface: NXP ISP1362BD
- LCD controller: UPS051 or Himax HX8802-C
Photos
Device, front
Protocol
See Rigol DS1000 series#Protocol.
Resources
- Rigol: DS1052E related documents (datasheet, user guide, ...)
- EEVblog forums: The Rigol DS1052E
- EEVblog #37 – Rigol DS1052E Oscilloscope Teardown
- DS1000E Programming Guide (link dead)
- Rigol Homebrew wiki (lots of useful info)