Difference between revisions of "Braintechnology USB-LPS"
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| samplerate_state = — | | samplerate_state = — | ||
| triggers = none (SW-only) | | triggers = none (SW-only) | ||
| voltages = | | voltages = -0.5V — 5.25V | ||
| threshold = Fixed: VIH=2.0V—5.25V, VIL=-0.5V—0.8V | |||
| memory = none | | memory = none | ||
| compression = none | | compression = none | ||
Revision as of 12:09, 28 July 2013
 | |
| Status | supported |
|---|---|
| Source code | fx2lafw |
| Channels | 8/16 |
| Samplerate | 24MHz |
| Samplerate (state) | — |
| Triggers | none (SW-only) |
| Min/max voltage | -0.5V — 5.25V |
| Threshold voltage | Fixed: VIH=2.0V—5.25V, VIL=-0.5V—0.8V |
| Memory | none |
| Compression | none |
| Website | braintechnology.de |
The Braintechnology USB-LPS is a Cypress FX2 based 16-channel, 24MHz, USB-based logic analyzer and signal/pattern generator.
In sigrok, the open-source fx2lafw firmware and driver is used for this device.
See Braintechnology USB-LPS/Info for some more details (such as lsusb -vvv output) on the device.
Hardware
- Main chip: Cypress CY7C68013A-56PVXC (FX2LP)
- I2C EEPROM: Atmel ATTiny13-20SU
- 3.3V voltage regulator: LD33
- Crystal: 24MHz
Photos
Device, front
PCB, front
PCB, front, details
PCB, back
Protocol
Since we use the open-source fx2lafw firmware for this device, we don't need to know the protocol.
However, for those interested in this, see our old vendor protocol docs.