Difference between revisions of "Ideofy LA-08"

From sigrok
Jump to navigation Jump to search
m
Line 5: Line 5:
== Hardware ==
== Hardware ==


TODO.
* CMOS EEPROM-based programmable logic device (CPLD): [http://www.altera.com/devices/cpld/max3k/m3k-index.html Altera EPM3032A TC44-10N], MAX 3000A family ([http://www.altera.com/literature/ds/m3000a.pdf datasheet])
* USB high-speed USB peripheral controller: [http://www.cypress.com/?rID=38801 Cypress CY7C68013A-56LFXC (FX2)] ([http://www.cypress.com/?docID=34060 datasheet])
* 2K I2C EEPROM: Microchip 24LC02B ([http://ww1.microchip.com/downloads/en/devicedoc/21709c.pdf datasheet])
* 600mA low-dropout voltage regulator: [http://www.idesyn.com/en/products/products.aspx?id=LinearRegulator iDESYN iD9302] ([http://www.idesyn.com/pdf/iD9302.pdf datasheet])
* 24MHz crystal: TXC 24.0


== Photos ==
== Photos ==

Revision as of 18:17, 19 May 2012

The Ideofy LA-08 is a USB-based, 8-channel logic analyzer with a max. samplerate of 96Msps@2ch (or 60msps@4ch, or 30msps@8ch).

See Ideofy LA-08/Info for more details (such as lsusb -vvv output) about the device.

Hardware

Photos

TODO.

Protocol

Starting an acquisition

TODO.

Sample format

The probes (on the device housing) are numbered 1-8. They seem to have internal pull-ups, i.e. if you don't connect them to the target, their value will be high (1).

  • 8 probes: Bit 7 is the value of probe 8, bit 0 is the value of probe 1.
  • 4 probes: Bit 3 is the value of probe 4, bit 0 is the value of probe 1. Bits[7:4] are probes 4..1 respectively.
  • 2 probes: Bit 1 is the value of probe 2, bit 0 is the value of probe 1. Bits[7:6], bits[5:4], and bits[3:2] are probes 2..1 respectively.

Triggers

TODO.

Retrieved from "https://sigrok.org/w/index.php?title=Ideofy_LA-08&oldid=1848"