Difference between revisions of "Hantek DSO3254A"
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{{Infobox logic analyzer | {{Infobox logic analyzer | ||
| image = [[File: | | image = [[File:DSO325.jpg|180px]] | ||
| name = DSO3254A | | name = DSO3254A | ||
| status = planned | | status = planned | ||
| Line 37: | Line 37: | ||
== Photo == | == Photo == | ||
<gallery> | <gallery> | ||
</gallery> | </gallery> | ||
== Resources == | == Resources == | ||
Revision as of 09:35, 1 November 2018
| File:DSO325.jpg | |
| Status | planned |
|---|---|
| Source code | dso3254a |
| Channels | 4 analog, 16 digital |
| Samplerate | 250MHz |
| Samplerate (state) | — |
| Triggers | Edge, Pulse, Video, Slope, Timeout, External |
| Min/max voltage | -0.5V — 400V |
| Memory | 128M |
| Compression | none |
| Website | hantek.com |
Hantek DSO3254A
The Hantek DSO3254A is a USB-based signal acquisition device. It has 4 analog channel with 250MHz bandwidth and sampling rate of 1GSa/s. It comes with 16 channel logic analyzer with a maximum sampling rate of 250MHz and an arbritary waveform generator 200MSa/s.
Hardware
- S3C2416XH-40 System Controller (400 MHz ARM926EJ with 48 MHz and 12 MHz oscillators with 32.768 kHz RTC oscillator)
- D9SBJ System Memory (MT47H32M16NF-25E - 400 MHz 32MB x 16 DDR2-800)
- D9RZH Acquisition Memory (MT47H64M16NF-25E - 400 MHz 64MB x 16 DDR2-800)
- K9F1G08U0E 128MB x 8 NAND Flash
- 24L64 I2C EEPROM
- DM9000AEP LAN Controller
- USB Wi-Fi Module (optional)
- USB Hub (optional)
- XC6SLX16FTG256 Control FPGA (under heatsink - has JTAG)
- 1 GSPS 8-bit Quad ADC (under heatsink - Analog Devices?)
- ADF4905 Timebase Generator PLL (with 10 MHz reference oscillator)
- LTC2601 x2 (?) 12 Bit Offset DAC
- DAC902E 165 MSPS 12 Bit Waveform Generator DAC
- 74HC595 Channel Relay Switching (1 per channel)
- 74HC595 Offset Voltage Switching
- 74HC595 Trigger Source Selection
- 74HC4051 Offset Voltage Switching