Difference between revisions of "DreamSourceLab DSLogic"

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| image            = [[File:DSLogic.png|180px]]
| image            = [[File:DSLogic.png|180px]]
| name            = DreamSourceLab DSLogic
| name            = DreamSourceLab DSLogic
| status          = planned
| status          = in progress
| source_code_dir  =  
| source_code_dir  = fx2lafw
| channels        = 1-16
| channels        = 1-16
| samplerate      = 400MHz(4ch), 200MHz(8ch), 100MHz(16ch)
| samplerate      = 400MHz(4ch), 200MHz(8ch), 100MHz(16ch)
Line 45: Line 45:
[[Category:Device]]
[[Category:Device]]
[[Category:Logic analyzer]]
[[Category:Logic analyzer]]
[[Category:Planned]]
[[Category:In progress]]

Revision as of 17:16, 21 March 2015

DreamSourceLab DSLogic
DSLogic.png
Status in progress
Source code fx2lafw
Channels 1-16
Samplerate 400MHz(4ch), 200MHz(8ch), 100MHz(16ch)
Samplerate (state) 50MHz
Triggers high, low, rising, falling, edge, multi-stage triggers
Min/max voltage -0.6V — 6V
Threshold voltage configurable: 3.3V, 5V
Memory 32MByte (2MByte/ch)
Compression no
Website dreamsourcelab.com

The DreamSourceLab DSLogic is a 16-channel USB-based logic analyzer, with sampling rates up to 400MHz (when using only 4 channels).

See DreamSourceLab DSLogic/Info for more details (such as lsusb -v output) about the device.

Hardware

Photos

Resources