Difference between revisions of "Input output formats"
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| [http://www.linear.com/solutions/1814 PWL] | | [http://www.linear.com/solutions/1814 PWL] | ||
| Trivial file format that can be used to define the signal of voltage/current sources in a LTspice simulation. | | Trivial file format that can be used to define the signal of voltage/current sources in a LTspice simulation. More info [http://ltwiki.org/?title=Undocumented_LTspice#Piecewise_Linear_Sources_.28PWL.29 here] | ||
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Revision as of 22:38, 6 December 2014
libsigrok supports a number of different input modules (a.k.a. file formats) and output modules, and has a generic API which allows easily adding more input/output modules.
Supported input/output formats
| Name | Input | Output | Description |
|---|---|---|---|
| Analog | — | supported | Text output of analog data and types. |
| ASCII | — | supported | ASCII art. |
| Binary | supported | supported | Raw binary data output without any metadata attached. |
| Bits | — | supported | 0/1 digits. |
| ChronoVu LA8 | supported | supported | ChronoVu LA8 software file format (usually with .kdt file extension). |
| CSV | supported | supported | Comma-separated values. |
| gnuplot | — | supported | Gnuplot data file format (tab-separated columns of '1' and '0' characters). You need another gnuplot input file such as this one in addition. |
| hex | — | supported | Hexadecimal digits. |
| ols | — | supported | The file format used by the "Alternative" Java client for the Openbench Logic Sniffer. |
| srzip | supported | supported | The current (v2) sigrok session file format (*.sr). |
| VCD | supported | supported | The Value Change Dump format (can also be visualized in gtkwave, for instance). |
| WAV | supported | supported | The waveform audio (WAV) file format. |
Possible candidates for future input/output formats
| Name | Description |
|---|---|
| Scanalogic | Used by the IKALOGIC Scanalogic-2 and IKALOGIC ScanaPLUS logic analyzers. |
| Rigol ROF | Used by the Rigol DP800 series power supplies. |
| Rigol RAF | Used by the Rigol DG1000Z, DG4000, and DG5000 series signal generators. See DG1000Z User Guide page 2-75, also this post at eevblog. |
| Vector MDF (v3.3) / ASAM MDF (v4.x) | Automotive industry standard format. Docs can be found here and here. Validator is here. Some code is here and here. |
| COMTRADE | File format used by devices in power engineering (e.g. protective relays, fault recorders). Can contain digital and analog data with constant or variable sample rate. |
| PWL | Trivial file format that can be used to define the signal of voltage/current sources in a LTspice simulation. More info here |