Difference between revisions of "ZEROPLUS LAP-16128U"
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Uwe Hermann (talk | contribs) (Teardown.) |
(Make note of SRAM used and link to LAP-C series page) |
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See [[ZEROPLUS LAP-16128U/Info]] for more details (such as '''lsusb -vvv''' output) about the device. | See [[ZEROPLUS LAP-16128U/Info]] for more details (such as '''lsusb -vvv''' output) about the device. | ||
See also [[ZEROPLUS Logic Cube LAP-C series]] for an overview of all devices in the LAP-C series. | |||
== Hardware == | == Hardware == | ||
* Cypress CY7C1347G-250AXC (4Mbit pipelined sync SRAM, 250MHz) | |||
== Photos == | == Photos == |
Revision as of 18:27, 30 December 2013
Status | supported |
---|---|
Source code | zeroplus-logic-cube |
Channels | 16 |
Samplerate | 200MHz |
Samplerate (state) | 100MHz |
Triggers | pattern, edge |
Min/max voltage | -6V — +6V |
Memory | 128Kbits/channel |
Compression | yes ("max 32Mbits") |
Website | zeroplus.com.tw |
The ZEROPLUS LAP-16128U is a USB-based, 16-channel logic analyzer with up to 200MHz sampling rate.
See ZEROPLUS LAP-16128U/Info for more details (such as lsusb -vvv output) about the device.
See also ZEROPLUS Logic Cube LAP-C series for an overview of all devices in the LAP-C series.
Hardware
- Cypress CY7C1347G-250AXC (4Mbit pipelined sync SRAM, 250MHz)
Photos
Protocol
TODO.
Resources
TODO.