Difference between revisions of "ASIX SIGMA / SIGMA2"
Uwe Hermann (talk | contribs) (Fix obsolete entries.) |
Uwe Hermann (talk | contribs) m |
||
| Line 1: | Line 1: | ||
[[File:Sigma2_2.png|thumb|right|ASIX SIGMA2]] | |||
[[File:Sigma2_2. | |||
The [http://tools.asix.net/dbg_sigma.htm ASIX SIGMA] is a 16 channel logic analyzer with sample rate support up to 200 MHz and with 256 Mbit on-board memory. | The [http://tools.asix.net/dbg_sigma.htm ASIX SIGMA] is a 16 channel logic analyzer with sample rate support up to 200 MHz and with 256 Mbit on-board memory. | ||
| Line 12: | Line 10: | ||
Many thanks to the vendor ([http://www.asix.net/ ASIX]) for providing information on the protocol used to communicate with the device and for releasing the device's firmware / FPGA bitstreams under a [http://sigrok.git.sourceforge.net/git/gitweb.cgi?p=sigrok/sigrok-firmwares;a=blob;f=asix-sigma/LICENSE.Sigma license which allows us to distribute the files]. | Many thanks to the vendor ([http://www.asix.net/ ASIX]) for providing information on the protocol used to communicate with the device and for releasing the device's firmware / FPGA bitstreams under a [http://sigrok.git.sourceforge.net/git/gitweb.cgi?p=sigrok/sigrok-firmwares;a=blob;f=asix-sigma/LICENSE.Sigma license which allows us to distribute the files]. | ||
</div> | </div> | ||
== Hardware == | |||
* Xilinx Spartan XC3S50 | |||
* FTDI FT245RL | |||
* 2x TI SN74LVC245AN | |||
* MT 48LCI6MI6A2 | |||
* ... | |||
== Photos == | |||
<gallery> | |||
File:ASIX SIGMA.jpg|<small>ASIX SIGMA</small> | |||
File:Sigma.jpg|<small>ASIX SIGMA internals</small> | |||
File:Sigma2_2.jpg|<small>ASIX SIGMA2</small> | |||
</gallery> | |||
== Documentation == | == Documentation == | ||
The ASIX SIGMA/SIGMA2 firmware files are generously provided by the vendor for distribution. As a result, the device works out of the box with sigrok. Trigger support has been implemented in 100 MHz and 200 MHz modes for rising/falling edges. In other modes, users can specify additional trigger values, listed in the table below. | |||
{| border="0" style="font-size: smaller" | {| border="0" style="font-size: smaller" | ||
Revision as of 13:50, 20 April 2013
The ASIX SIGMA is a 16 channel logic analyzer with sample rate support up to 200 MHz and with 256 Mbit on-board memory.
See ASIX SIGMA/Info for more detailed information on the device.
Thanks!
Many thanks to the vendor (ASIX) for providing information on the protocol used to communicate with the device and for releasing the device's firmware / FPGA bitstreams under a license which allows us to distribute the files.
Hardware
- Xilinx Spartan XC3S50
- FTDI FT245RL
- 2x TI SN74LVC245AN
- MT 48LCI6MI6A2
- ...
Photos
ASIX SIGMA
ASIX SIGMA internals
ASIX SIGMA2
Documentation
The ASIX SIGMA/SIGMA2 firmware files are generously provided by the vendor for distribution. As a result, the device works out of the box with sigrok. Trigger support has been implemented in 100 MHz and 200 MHz modes for rising/falling edges. In other modes, users can specify additional trigger values, listed in the table below.
| Samplerate | Number of probes | Trigger support |
|---|---|---|
| 200 kHz | 16 | Edge of two probes, state, boolean expression1 |
| 250 kHz | 16 | Edge of two probes, state, boolean expression1 |
| 500 kHz | 16 | Edge of two probes, state, boolean expression1 |
| 1 MHz | 16 | Edge of two probes, state, boolean expression1 |
| 5 MHz | 16 | Edge of two probes, state, boolean expression1 |
| 10 MHz | 16 | Edge of two probes, state, boolean expression1 |
| 25 MHz | 16 | Edge of two probes, state, boolean expression1 |
| 50 MHz | 16 | Edge of two probes, state, boolean expression1 |
| 100 MHz | 8 | Edge of one probe |
| 200 MHz | 4 | Edge of one probe |
1 Boolean expression feature not implemented in sigrok yet.
Example usage
An example that captures from 4 probes, for 100ms at 10 MHz, with trigger condition 1:high, 2:rising, 3:low, 4:high.
$ sigrok-cli --driver asix-sigma --device samplerate=10m --wait-trigger --triggers 1=1,2=r,3=0,4=1 --samples 5000000 --time 100 -O bits -p 1-4
Firmware
The firmware files (FPGA bitstreams) for the ASIX SIGMA/SIGMA2 have been provided by the vendor under a license which allows redistribution, and are available from the sigrok-firmware repository. See Firmware for installation instructions.
Differences between SIGMA and SIGMA2
Hardware of SIGMA and SIGMA2 is almost identical, up to few exceptions:
- Seven one-color LEDs were replaced with two two-color LEDs.
- Added button. It can be used to start, stop, trigger.
- SIGMA has input TTLs in DIL sockets, SIGMA2 is has input TTLs in SMD package.
New hardware revision requires new firmware to support button and different LED wiring. The new firmware is for both SIGMA and SIGMA2. New hardware revision cannot work with old firmware.
Resources
- Initial support for Asix Sigma in Sigrok
- PING Labs: Sampi – A Logic Analyzer
- flickr: ASIX SIGMA in chlunde's photostream (photos and more information about the device)