Difference between revisions of "Hantek 4032L/Info"
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Uwe Hermann (talk | contribs) (lsusb) |
(Added USBXI connector pinout) |
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Line 159: | Line 159: | ||
5 - nCS | 5 - nCS | ||
6 - GND | 6 - GND | ||
=== USBXI === | |||
USB, external trigger | |||
Top: | |||
1 - n/c | |||
2 - n/c | |||
3 - n/c | |||
4 - n/c | |||
5 - n/c | |||
6 - n/c | |||
7 - n/c | |||
KEY | |||
8 - GND | |||
9 - n/c | |||
10 - n/c | |||
11 - n/c | |||
12 - GND | |||
13 - n/c | |||
14 - GND | |||
15 - USB D+ | |||
16 - USB D- | |||
17 - USB VBUS | |||
18 - USB VBUS | |||
Bottom: | |||
1 - n/c | |||
2 - n/c | |||
3 - n/c | |||
4 - n/c | |||
5 - n/c | |||
6 - n/c | |||
7 - n/c | |||
KEY | |||
8 - n/c | |||
9 - n/c | |||
10 - n/c | |||
11 - ExtTrigOut LVCMOS3V3 | |||
12 - ExtTrigIn LVCMOS3V3 | |||
13 - GND | |||
14 - n/c | |||
15 - n/c | |||
16 - GND | |||
17 - n/c | |||
18 - n/c | |||
== Modding == | == Modding == |
Revision as of 15:45, 30 July 2018
lsusb
$ lsusb -v Bus 002 Device 008: ID 04b5:4032 ROHM LSI Systems USA, LLC Device Descriptor: bLength 18 bDescriptorType 1 bcdUSB 2.00 bDeviceClass 0 (Defined at Interface level) bDeviceSubClass 0 bDeviceProtocol 0 bMaxPacketSize0 64 idVendor 0x04b5 ROHM LSI Systems USA, LLC idProduct 0x4032 bcdDevice 0.00 iManufacturer 1 ODM iProduct 2 LA-4032 iSerial 0 bNumConfigurations 1 Configuration Descriptor: bLength 9 bDescriptorType 2 wTotalLength 32 bNumInterfaces 1 bConfigurationValue 1 iConfiguration 0 bmAttributes 0xa0 (Bus Powered) Remote Wakeup MaxPower 500mA Interface Descriptor: bLength 9 bDescriptorType 4 bInterfaceNumber 0 bAlternateSetting 0 bNumEndpoints 2 bInterfaceClass 255 Vendor Specific Class bInterfaceSubClass 0 bInterfaceProtocol 0 iInterface 0 Endpoint Descriptor: bLength 7 bDescriptorType 5 bEndpointAddress 0x02 EP 2 OUT bmAttributes 2 Transfer Type Bulk Synch Type None Usage Type Data wMaxPacketSize 0x0200 1x 512 bytes bInterval 0 Endpoint Descriptor: bLength 7 bDescriptorType 5 bEndpointAddress 0x86 EP 6 IN bmAttributes 2 Transfer Type Bulk Synch Type None Usage Type Data wMaxPacketSize 0x0200 1x 512 bytes bInterval 0 Device Qualifier (for other device speed): bLength 10 bDescriptorType 6 bcdUSB 2.00 bDeviceClass 0 (Defined at Interface level) bDeviceSubClass 0 bDeviceProtocol 0 bMaxPacketSize0 64 bNumConfigurations 1 Device Status: 0x0000 (Bus Powered)
Another set of USB info (Windows?):
Device Descriptor: bcdUSB: 0x0200 bDeviceClass: 0x00 bDeviceSubClass: 0x00 bDeviceProtocol: 0x00 bMaxPacketSize0: 0x40 (64) idVendor: 0x04B5 (ROHM LSI Systems USA, LLC) idProduct: 0x4032 bcdDevice: 0x0000 iManufacturer: 0x01 0x0409: "ODM " iProduct: 0x02 0x0409: "LA-4032" iSerialNumber: 0x00 bNumConfigurations: 0x01 Configuration Descriptor: wTotalLength: 0x0020 bNumInterfaces: 0x01 bConfigurationValue: 0x01 iConfiguration: 0x00 bmAttributes: 0xA0 (Bus Powered Remote Wakeup) MaxPower: 0xFA (500 Ma) Interface Descriptor: bInterfaceNumber: 0x00 bAlternateSetting: 0x00 bNumEndpoints: 0x02 bInterfaceClass: 0xFF bInterfaceSubClass: 0x00 bInterfaceProtocol: 0x00 iInterface: 0x00 Endpoint Descriptor: bEndpointAddress: 0x02 Transfer Type: Bulk wMaxPacketSize: 0x0200 (512) bInterval: 0x00 Endpoint Descriptor: bEndpointAddress: 0x86 Transfer Type: Bulk wMaxPacketSize: 0x0200 (512) bInterval: 0x00
Pinouts
JP2 JTAG
XC6SLX16 JTAG port 1 - GND 2 - TMS 3 - TDO 4 - TDI 5 - TCK 6 - +3.3V
JP5 WRITE
MX25L4005 write protect disable 1 - nWP 2 - +3.3V
JP6 RST
XC6SLX16 configuration reset 1 - PROGRAM_B 2 - GND
JP7 FLASH_SPI
MX25L4005 ISP 1 - +3.3V 2 - CK 3 - DIN 4 - DOUT 5 - nCS 6 - GND
USBXI
USB, external trigger
Top: 1 - n/c 2 - n/c 3 - n/c 4 - n/c 5 - n/c 6 - n/c 7 - n/c KEY 8 - GND 9 - n/c 10 - n/c 11 - n/c 12 - GND 13 - n/c 14 - GND 15 - USB D+ 16 - USB D- 17 - USB VBUS 18 - USB VBUS
Bottom: 1 - n/c 2 - n/c 3 - n/c 4 - n/c 5 - n/c 6 - n/c 7 - n/c KEY 8 - n/c 9 - n/c 10 - n/c 11 - ExtTrigOut LVCMOS3V3 12 - ExtTrigIn LVCMOS3V3 13 - GND 14 - n/c 15 - n/c 16 - GND 17 - n/c 18 - n/c
Modding
In stock configuration both FX2LP and FPGA boots from their serial EEPROMs, but with a small hw patch it is possible to boot both parts from PC:
- lift U3 pin 5 to disable FX2LP EEPROM boot
- remove R102 and solder it between R102's left pad (this is FPGA's M1 pin) and C135's left pad (this is Vcc) to switch FPGA config mode to Slave Serial. FX2LP's PC5 is FPGA's PROGRAM_B, PC3 is DATA, PC1 is CLOCK, PC0 must be driven high (this is SPI FLASH nCS)