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* '''Scriptable'''. Extendable with protocol decoders and analyzers written in Lua or Python. | * '''Scriptable'''. Extendable with protocol decoders and analyzers written in Lua or Python. | ||
* '''Format support'''. Supports various input and output formats (raw, CSV, gnuplot, [ VCD], others). | * '''Format support'''. Supports various input and output formats (raw, CSV, gnuplot, [ VCD], others). | ||
== Supported hardware == | == Supported hardware == | ||
Revision as of 17:44, 18 March 2010
The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source logic analyzer software that supports various (usually USB-based) logic analyzer hardware products. The code is licensed under the terms of the GNU GPL.
Design goals
- Hardware support. Supports a wide variety of logic analyzer hardware from various vendors with different capabilities.
- Cross-platform. Works on Linux/Mac OS X/Windows/etc. and on x86/ARM/Sparc/PowerPC/etc.
- Scriptable. Extendable with protocol decoders and analyzers written in Lua or Python.
- Format support. Supports various input and output formats (raw, CSV, gnuplot, [ VCD], others).
Supported hardware
CWAV USBee SX
(coming up)
Saleae Logic
(supported)- Open workbench logic sniffer.jpg
Openbench Logic Sniffer
(work in progress) 
Braintechnology USB-LPS
(partially supported)
Zeroplus Logic Cube
(coming up)
Documentation |
Frontends |
Getting in touch
|
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