Difference between revisions of "EE Electronics ESLA100"

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| samplerate_state = —
| samplerate_state = —
| triggers        = none (SW-only)
| triggers        = none (SW-only)
| voltages        = ?
| voltages        = -0.5V — 5.25V
| threshold        = Fixed: VIH=2.0V—5.25V, VIL=-0.5V—0.8V
| memory          = none
| memory          = none
| compression      = none
| compression      = none
| price            = <$50
| website          = [http://eeelec.com/xla/ eeelec.com]
| website          = [http://eeelec.com/xla/ eeelec.com]
}}
}}

Latest revision as of 15:14, 30 June 2019

EE Electronics ESLA100
Eeelec xla esla100.png
Status supported
Source code fx2lafw
Channels 8
Samplerate 24MHz
Samplerate (state)
Triggers none (SW-only)
Min/max voltage -0.5V — 5.25V
Threshold voltage Fixed: VIH=2.0V—5.25V, VIL=-0.5V—0.8V
Memory none
Compression none
Price range <$50
Website eeelec.com

The EE Electronics ESLA100 is a USB-based, 8-channel logic analyzer with up to 24MHz sampling rate.

It is a clone of the Saleae Logic.

In sigrok, we use the open-source fx2lafw firmware for this logic analyzer.

See EE Electronics ESLA100/Info for some more details (such as lsusb -vvv output) on the device.

Hardware

  • Main chip: Cypress CY7C68013A-56LFXC (FX2LP)
  • I2C EEPROM: Atmel ATMLH911 02B 1
  • Octal tristate bus transceiver: NXP 74HC245D
  • Crystal: 24MHz

Photos

See also this flickr set for more PCB photos of the device.

Protocol

Since we use the open-source fx2lafw firmware for this device, we don't need to know the protocol.

Resources