Difference between revisions of "Protocol decoder:Spiflash"
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{{Infobox protocol decoder | {{Infobox protocol decoder | ||
| id = | | id = spiflash | ||
| name = | | name = SPI flash | ||
| description = SPI | | description = xx25 series SPI (NOR) flash chip protocol | ||
| status = | | status = supported | ||
| license = GPLv2+ | | license = GPLv2+ | ||
| source_code_dir = | | source_code_dir = spiflash | ||
| image = [[File:Macronix mx25l1605d device top.jpg|250px]] | | image = [[File:Macronix mx25l1605d device top.jpg|250px]] | ||
| input = [[Protocol Decoder:spi|spi]] | | input = [[Protocol Decoder:spi|spi]] | ||
| output = | | output = spiflash | ||
| probes = — | | probes = — | ||
| optional_probes = | | optional_probes = — | ||
| options = — | | options = — | ||
}} | }} | ||
The ''' | The '''spiflash''' protocol decoder supports the industry standard xx25 series SPI (NOR) flash chip protocol. | ||
It is used (for example) in the [http://www.macronix.com/en-us/Product/Pages/ProductDetail.aspx?PartNo=MX25L1605D Macronix MX25L1605D] chip, and many others. | |||
== Hardware == | == Hardware == | ||
| Line 25: | Line 22: | ||
=== Chip pinout === | === Chip pinout === | ||
The Macronix MX25L''xx''05D chips have the following pinout: | The Macronix MX25L''xx''05D chips (and almost all SPI flash chips of the xx25 series) have the following pinout: | ||
{{chip_8pin|1=CS#|2=SO|3=WP#|4=GND|5=SI|6=SCLK|7=HOLD#|8=VCC}} | {{chip_8pin|1=CS#|2=SO|3=WP#|4=GND|5=SI|6=SCLK|7=HOLD#|8=VCC}} | ||
| Line 43: | Line 40: | ||
|- | |- | ||
| 0 (green) | | 0 (green) || CS# | ||
| CS# | |||
|- | |- | ||
| 1 (orange) | | 1 (orange) || SO/SIO1 (a.k.a MISO) | ||
| SO/SIO1 (a.k.a MISO) | |||
|- | |- | ||
| 2 (white) | | 2 (white) || SCLK | ||
| SCLK | |||
|- | |- | ||
| 3 (red) | | 3 (red) || SI/SIO0 (a.k.a MOSI) | ||
| SI/SIO0 (a.k.a MOSI) | |||
|- | |- | ||
| 4 (gray) | | 4 (gray) || WP#/ACC | ||
| WP#/ACC | |||
|- | |- | ||
| 5 (brown) | | 5 (brown) || HOLD# | ||
| HOLD# | |||
|} | |} | ||
| Line 79: | Line 65: | ||
== Protocol == | == Protocol == | ||
The | The xx25 series chips uses the standard SPI protocol and pins (MISO, MOSI, SCLK, CS#), with the additional (optional) HOLD# and WP#/ACC pins. | ||
The host can send a large number of commands to the SPI chip (such as WREN, RDID, READ, SE, CE, PP, and many more). The commands have various length, and usually consist of one command ID byte, optional address bytes, one or more data/payload bytes, and so on (depending on the command). | The host can send a large number of commands to the SPI chip (such as WREN, RDID, READ, SE, CE, PP, and many more). The commands have various length, and usually consist of one command ID byte, optional address bytes, one or more data/payload bytes, and so on (depending on the command). | ||
See the chip datasheet for a detailed protocol/register/command description. | |||
== Resources == | == Resources == | ||
* [http://www.macronix.com/ | * [http://www.macronix.com/en-us/Product/Pages/ProductDetail.aspx?PartNo=MX25L1605D Macronix MX25L1605D (dead link)] ([https://www.mxic.com.tw/Lists/Datasheet/Attachments/8554/MX25L1605D,%203V,%2016Mb,%20v1.5.pdf datasheet]) | ||
* [https://www.mxic.com.tw/Lists/Datasheet/Attachments/8384/MX25L8006E,%203V,%208Mb,%20v1.2.pdf MX25L8006E datasheet] | |||
[[Category:Protocol decoder]] | [[Category:Protocol decoder]] | ||
[[Category:SPI]] | |||
Latest revision as of 17:16, 26 April 2023
 | |
| Name | SPI flash |
|---|---|
| Description | xx25 series SPI (NOR) flash chip protocol |
| Status | supported |
| License | GPLv2+ |
| Source code | decoders/spiflash |
| Input | spi |
| Output | spiflash |
| Probes | — |
| Optional probes | — |
| Options | — |
The spiflash protocol decoder supports the industry standard xx25 series SPI (NOR) flash chip protocol.
It is used (for example) in the Macronix MX25L1605D chip, and many others.
Hardware
Chip pinout
The Macronix MX25Lxx05D chips (and almost all SPI flash chips of the xx25 series) have the following pinout:
| CS# | 1- | O | -8 | VCC |
| SO | 2- | -7 | HOLD# | |
| WP# | 3- | -6 | SCLK | |
| GND | 4- | -5 | SI |
Macronix MX25L1605D in openbiosprog-spi
The spi/mx25l1605d directory in sigrok-dumps contains a set of example captures of a Macronix MX25L1605D (MX25L1605DPI-12G) SPI flash chip (16Mbit == 2Mbyte; NOR flash) that is probed, being written to, read, or erased.
The logic analyzer used was a ChronoVu LA8 (at 25MHz). It is probing the SPI chip in the openbiosprog-spi Open Hardware USB-based SPI chip programmer. The host software used is flashrom.
Probe setup:
| Probe | MX25L1605D pin |
|---|---|
| 0 (green) | CS# |
| 1 (orange) | SO/SIO1 (a.k.a MISO) |
| 2 (white) | SCLK |
| 3 (red) | SI/SIO0 (a.k.a MOSI) |
| 4 (gray) | WP#/ACC |
| 5 (brown) | HOLD# |
Photos:
openbiosprog-spi with chip
Macronix MX25L1605D
Chip, probed
Protocol
The xx25 series chips uses the standard SPI protocol and pins (MISO, MOSI, SCLK, CS#), with the additional (optional) HOLD# and WP#/ACC pins.
The host can send a large number of commands to the SPI chip (such as WREN, RDID, READ, SE, CE, PP, and many more). The commands have various length, and usually consist of one command ID byte, optional address bytes, one or more data/payload bytes, and so on (depending on the command).
See the chip datasheet for a detailed protocol/register/command description.