Difference between revisions of "Braintechnology USB-LPS"
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[[File:Braintechnology usb lps. | {{Infobox logic analyzer | ||
| image = [[File:Braintechnology usb lps.png|180px]] | |||
| name = Braintechnology USB-LPS | |||
| status = supported | |||
| source_code_dir = fx2lafw | |||
| channels = 8/16 | |||
| samplerate = 24MHz | |||
| samplerate_state = — | |||
| triggers = none (SW-only) | |||
| voltages = -0.5V — 5.25V | |||
| threshold = Fixed: VIH=2.0V—5.25V, VIL=-0.5V—0.8V | |||
| memory = none | |||
| compression = none | |||
| website = [http://www.braintechnology.de/webshop/catalog/product_info.php?&products_id=105 braintechnology.de] | |||
}} | |||
The | The '''Braintechnology USB-LPS''' is a Cypress FX2 based 16-channel, 24MHz, USB-based logic analyzer and signal/pattern generator. | ||
See [[Braintechnology USB-LPS/Info]] for some more details (such as '''lsusb - | In sigrok, the open-source [[fx2lafw]] firmware and driver is used for this device. | ||
See [[Braintechnology USB-LPS/Info]] for some more details (such as '''lsusb -v''' output) on the device. | |||
== Hardware == | |||
* '''Main chip:''' Cypress CY7C68013A-56PVXC (FX2LP) | |||
* '''I²C EEPROM''': Atmel ATtiny13-20SU | |||
* '''3.3V voltage regulator''': LD33 | |||
* '''Crystal''': 24MHz | |||
== Photos == | |||
<gallery> | |||
File:Braintechnology usb lps.jpg|<small>Device, front</small> | |||
File:Braintechnology usb lps pcb front.jpg|<small>PCB, front</small> | |||
File:Braintechnology usb lps pcb front details.jpg|<small>PCB, front, details</small> | |||
File:Braintechnology usb lps pcb back.jpg|<small>PCB, back</small> | |||
</gallery> | |||
== Protocol == | |||
Since we use the open-source [[fx2lafw]] firmware for this device, we don't need to know the protocol. | |||
However, for those interested in this, see our old [[Braintechnology_USB-LPS/Info#Vendor_USB_protocol|vendor protocol docs]]. | |||
== Resources == | |||
* [http://www.braintechnology.de/downstat18/download.php?file=lps_doc.pdf Manual] | |||
* [http://www.braintechnology.de/downstat18/download.php?file=lpssetup10723.exe Vendor software] | |||
* [http://www.braintechnology.de/downstat18/download.php?file=lpsdriver_32_64bit.zip Driver] | |||
[[Category:Device]] | |||
[[Category:Logic analyzer]] | |||
[[Category:Supported]] | |||
Latest revision as of 18:05, 28 May 2017
 | |
| Status | supported |
|---|---|
| Source code | fx2lafw |
| Channels | 8/16 |
| Samplerate | 24MHz |
| Samplerate (state) | — |
| Triggers | none (SW-only) |
| Min/max voltage | -0.5V — 5.25V |
| Threshold voltage | Fixed: VIH=2.0V—5.25V, VIL=-0.5V—0.8V |
| Memory | none |
| Compression | none |
| Website | braintechnology.de |
The Braintechnology USB-LPS is a Cypress FX2 based 16-channel, 24MHz, USB-based logic analyzer and signal/pattern generator.
In sigrok, the open-source fx2lafw firmware and driver is used for this device.
See Braintechnology USB-LPS/Info for some more details (such as lsusb -v output) on the device.
Hardware
- Main chip: Cypress CY7C68013A-56PVXC (FX2LP)
- I²C EEPROM: Atmel ATtiny13-20SU
- 3.3V voltage regulator: LD33
- Crystal: 24MHz
Photos
Device, front
PCB, front
PCB, front, details
PCB, back
Protocol
Since we use the open-source fx2lafw firmware for this device, we don't need to know the protocol.
However, for those interested in this, see our old vendor protocol docs.