Difference between revisions of "DreamSourceLab DSLogic U2Basic"
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== Hardware == | == Hardware == | ||
* '''FPGA''': Xilinx Spartan-6 XC6SLX9 | |||
* '''USB''': Cypress CY7C68013A (FX2) | |||
* '''I²C EEPROM''': ST 4128BRP | |||
* '''SDRAM''': Winbond W9864G6KH-6 | |||
* '''Crystal''': 24MHz | |||
== Photos == | == Photos == | ||
<gallery> | |||
File:Dreamsourcelab dslogic u2basic package.jpg|<small>Package</small> | |||
File:Dreamsourcelab dslogic u2basic device top.jpg|<small>Device, top</small> | |||
File:Dreamsourcelab dslogic u2basic device bottom.jpg|<small>Device, bottom</small> | |||
File:Dreamsourcelab dslogic u2basic usb connector.jpg|<small>USB connector</small> | |||
File:Dreamsourcelab dslogic u2basic probe connector.jpg|<small>Probe connector</small> | |||
File:Dreamsourcelab dslogic u2basic usb cable.jpg|<small>USB cable</small> | |||
File:Dreamsourcelab dslogic u2basic probe cables.jpg|<small>Probe cables</small> | |||
File:Dreamsourcelab dslogic u2basic probes.jpg|<small>Probes</small> | |||
File:Dreamsourcelab dslogic u2basic pcb top.jpg|<small>PCB, top</small> | |||
File:Dreamsourcelab dslogic u2basic pcb bottom.jpg|<small>PCB, bottom</small> | |||
File:Dreamsourcelab dslogic u2basic xilinx xc6slx9.jpg|<small>Xilinx XC6SLX9</small> | |||
File:Dreamsourcelab dslogic u2basic cypress fx2.jpg|<small>Cypress FX2</small> | |||
File:Dreamsourcelab dslogic u2basic winbond w9864g6kh-6.jpg|<small>Winbond W9864G6KH-6</small> | |||
File:Dreamsourcelab dslogic u2basic usb.jpg|<small>USB area</small> | |||
File:Dreamsourcelab dslogic u2basic input stage.jpg|<small>Input stage</small> | |||
File:Dreamsourcelab dslogic u2basic 24mhz crystal.jpg|<small>24MHz crystal</small> | |||
</gallery> | |||
== Firmware == | == Firmware == | ||
Latest revision as of 01:26, 16 April 2020
| Status | planned |
|---|---|
| Source code | dreamsourcelab-dslogic |
| Channels | 1-16 |
| Samplerate | Stream mode: 100MHz(3ch), 50MHz(6ch), 25MHz(12ch), 20MHz(16ch) |
| Website | dreamsourcelab.com |
The DreamSourceLab DSLogic U2Basic is a 16-channel USB-based logic analyzer, with sampling rates up to 400MHz (when using only 4 channels).
See DreamSourceLab DSLogic U2Basic/Info for more details (such as lsusb -v output) about the device.
Hardware
- FPGA: Xilinx Spartan-6 XC6SLX9
- USB: Cypress CY7C68013A (FX2)
- I²C EEPROM: ST 4128BRP
- SDRAM: Winbond W9864G6KH-6
- Crystal: 24MHz
Photos
Package
Device, top
Device, bottom
USB connector
Probe connector
USB cable
Probe cables
Probes
PCB, top
PCB, bottom
Xilinx XC6SLX9
Cypress FX2
Winbond W9864G6KH-6
USB area
Input stage
24MHz crystal
Firmware
See DreamSourceLab DSLogic#Firmware.
Note: The FX2 firmware is loaded at powerup from the I²C EEPROM on the PCB.
EEPROM layout
The device has an I²C EEPROM with the following layout:
c2 0e 2a 29 00 00 00 04 XX XX XX XX XX XX .. ..
Description:
| Bytes | Description |
|---|---|
| 0 | 0xc2: FX2 "c2 load" mode, i.e. VID/PID/DID are loaded from EEPROM as the firmware. |
| 1-2 | 0x2a0e: USB vendor ID (VID before firmware renumerate). |
| 3-4 | 0x0029: USB product ID (PID before firmware renumerate). |
| 5-6 | 0x0000: USB device ID (DID before firmware renumerate). |
| 7 | 0x04: FX2 configuration byte (see FX2 TRM for details). |
| 8 - 6977 | Firmware (6970 bytes, sha1sum: 47975f295711cf0208bbd963bbfeaf5b36e87b8724cad1e67c0de1a86065b389) |
| Rest | Unknown, probably all-0xff. |