Difference between revisions of "Braintechnology USB-LPS"

From sigrok
Jump to navigation Jump to search
(Start documenting the USB-LPS protocol.)
m
 
(12 intermediate revisions by 3 users not shown)
Line 1: Line 1:
[[File:Braintechnology usb lps.jpg|thumb|right|Braintechnology USB-LPS]]
{{Infobox logic analyzer
[[File:Braintechnology usb lps pcb front.jpg|thumb|right|Braintechnology USB-LPS, PCB front]]
| image            = [[File:Braintechnology usb lps.png|180px]]
[[File:Braintechnology usb lps pcb front details.jpg|thumb|right|Braintechnology USB-LPS, PCB front details]]
| name            = Braintechnology USB-LPS
[[File:Braintechnology usb lps pcb back.jpg|thumb|right|Braintechnology USB-LPS, PCB back]]
| status          = supported
| source_code_dir  = fx2lafw
| channels        = 8/16
| samplerate      = 24MHz
| samplerate_state = —
| triggers        = none (SW-only)
| voltages        = -0.5V — 5.25V
| threshold        = Fixed: VIH=2.0V—5.25V, VIL=-0.5V—0.8V
| memory          = none
| compression      = none
| website          = [http://www.braintechnology.de/webshop/catalog/product_info.php?&products_id=105 braintechnology.de]
}}


The [http://www.braintechnology.de/webshop/catalog/product_info.php?&products_id=105 Braintechnology USB-LPS] is a Cypress FX2 based 16-channel, 24MHz, USB-based logic analyzer and signal/pattern generator.
The '''Braintechnology USB-LPS''' is a Cypress FX2 based 16-channel, 24MHz, USB-based logic analyzer and signal/pattern generator.


See [[Braintechnology USB-LPS/Info]] for some more details (such as '''lsusb -vvv''' output) on the device.
In sigrok, the open-source [[fx2lafw]] firmware and driver is used for this device.


== Components ==
See [[Braintechnology USB-LPS/Info]] for some more details (such as '''lsusb -v''' output) on the device.


* Cypress CY7C68013A-56PVXC (FX2)
== Hardware ==
* Atmel ATTiny13-20SU
* LD33 (3.3V voltage regulator)
* 24MHz crystal


== Protocol ==
* '''Main chip:''' Cypress CY7C68013A-56PVXC (FX2LP)
* '''I²C EEPROM''': Atmel ATtiny13-20SU
* '''3.3V voltage regulator''': LD33
* '''Crystal''': 24MHz


=== Firmware upload ===
== Photos ==


The FX2 firmware (3072 bytes in size) is uploaded before every sampling run. Certain bytes in the firmware differ depending on the selected sampling rate.
<gallery>
File:Braintechnology usb lps.jpg|<small>Device, front</small>
File:Braintechnology usb lps pcb front.jpg|<small>PCB, front</small>
File:Braintechnology usb lps pcb front details.jpg|<small>PCB, front, details</small>
File:Braintechnology usb lps pcb back.jpg|<small>PCB, back</small>
</gallery>


=== Starting a sampling run ===
== Protocol ==
 
TODO.
 
=== Sample rates ===
 
Sampling with 8 probes:


{| border="0" style="font-size: smaller"
Since we use the open-source [[fx2lafw]] firmware for this device, we don't need to know the protocol.
|- bgcolor="#6699ff"
!Samplerate
!Divider
|- bgcolor="#eeeeee"
| 24 MHz
| 0x01
|- bgcolor="#dddddd"
| 16 MHz
| 0x02
|- bgcolor="#eeeeee"
| ...
| ...
|}


Sampling with 16 probes:
However, for those interested in this, see our old [[Braintechnology_USB-LPS/Info#Vendor_USB_protocol|vendor protocol docs]].


{| border="0" style="font-size: smaller"
== Resources ==
|- bgcolor="#6699ff"
!Samplerate
!Divider
!Other byte
|- bgcolor="#eeeeee"
| 12 MHz
| 0x03
| 0xee
|- bgcolor="#dddddd"
| 10 MHz
| 0x02
| 0xae
|- bgcolor="#eeeeee"
| 8 MHz
| 0x05
| 0xee
|- bgcolor="#dddddd"
| 6 MHz
| 0x07
| 0xee
|- bgcolor="#eeeeee"
| 5 MHz
| 0x05
| 0xae
|- bgcolor="#dddddd"
| 4 MHz
| 0x0b
| 0xee
|- bgcolor="#eeeeee"
| ...
| ...
| ...
|}


=== Sample format ===
* [http://www.braintechnology.de/downstat18/download.php?file=lps_doc.pdf Manual]
* [http://www.braintechnology.de/downstat18/download.php?file=lpssetup10723.exe Vendor software]
* [http://www.braintechnology.de/downstat18/download.php?file=lpsdriver_32_64bit.zip Driver]


TODO.
[[Category:Device]]
[[Category:Logic analyzer]]
[[Category:Supported]]

Latest revision as of 18:05, 28 May 2017

Braintechnology USB-LPS
Braintechnology usb lps.png
Status supported
Source code fx2lafw
Channels 8/16
Samplerate 24MHz
Samplerate (state)
Triggers none (SW-only)
Min/max voltage -0.5V — 5.25V
Threshold voltage Fixed: VIH=2.0V—5.25V, VIL=-0.5V—0.8V
Memory none
Compression none
Website braintechnology.de

The Braintechnology USB-LPS is a Cypress FX2 based 16-channel, 24MHz, USB-based logic analyzer and signal/pattern generator.

In sigrok, the open-source fx2lafw firmware and driver is used for this device.

See Braintechnology USB-LPS/Info for some more details (such as lsusb -v output) on the device.

Hardware

  • Main chip: Cypress CY7C68013A-56PVXC (FX2LP)
  • I²C EEPROM: Atmel ATtiny13-20SU
  • 3.3V voltage regulator: LD33
  • Crystal: 24MHz

Photos

Protocol

Since we use the open-source fx2lafw firmware for this device, we don't need to know the protocol.

However, for those interested in this, see our old vendor protocol docs.

Resources