Difference between revisions of "Hantek 6022BE"

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* '''USB''': [http://www.cypress.com/documentation/datasheets/cy7c68013a-cy7c68014a-cy7c68015a-cy7c68016a-ez-usb-fx2lp-usb Cypress CY7C68013A-100AXC] (FX2LP) ([http://www.cypress.com/file/138911/download datasheet])
* '''USB''': [http://www.cypress.com/documentation/datasheets/cy7c68013a-cy7c68014a-cy7c68015a-cy7c68016a-ez-usb-fx2lp-usb Cypress CY7C68013A-100AXC] (FX2LP) ([http://www.cypress.com/file/138911/download datasheet])
* '''256-byte I²C EEPROM''': [http://www.microchip.com/wwwproducts/en/24LC02B Microchip 24LC02BI] ([http://ww1.microchip.com/downloads/en/DeviceDoc/21709J.pdf datasheet])
* '''256-byte I²C EEPROM''': [http://www.microchip.com/wwwproducts/en/24LC02B Microchip 24LC02BI] ([http://ww1.microchip.com/downloads/en/DeviceDoc/21709J.pdf datasheet])
* '''16-Bit bus transceiver with 3-state outputs''': [http://www.ti.com/product/sn74lvc16245a TI SN74LVC16245A] ([http://www.ti.com/lit/ds/symlink/sn74lvc16245a.pdf datasheet])
* 2x '''8-channel analog multiplexer/demultiplexer''': [http://www.nexperia.com/products/logic/switches-multiplexers-de-multiplexers/digital-switches/74HC4051D.html NXP 74HC4051D] ([http://assets.nexperia.com/documents/data-sheet/74HC_HCT4051.pdf datasheet])
* '''1A low-dropout voltage regulator (3.3V):''' [http://www.advanced-monolithic.com/products/voltreg.html#1117 Advanced Monolithic Systems AMS1117-3.3] ([http://www.advanced-monolithic.com/pdf/ds1117.pdf datasheet])
* '''1A low-dropout voltage regulator (3.3V):''' [http://www.advanced-monolithic.com/products/voltreg.html#1117 Advanced Monolithic Systems AMS1117-3.3] ([http://www.advanced-monolithic.com/pdf/ds1117.pdf datasheet])
* '''2W, fixed input, isolated & unregulated dual/single output DC/DC converter''': [http://www.mornsun.cn/html/product/content/A_S-2WR2.html Mornsun A_S-2WR2 (A0505S-2WR2)] ([http://www.mornsun.cn/uploads/pdf/A_S-2WR2.pdf datasheet])
* '''2W, fixed input, isolated & unregulated dual/single output DC/DC converter''': [http://www.mornsun.cn/html/product/content/A_S-2WR2.html Mornsun A_S-2WR2 (A0505S-2WR2)] ([http://www.mornsun.cn/uploads/pdf/A_S-2WR2.pdf datasheet])
* '''ADC''': ?
* '''8-bit, 40/80/100MHz, dual ADC''': [http://www.analog.com/en/products/analog-to-digital-converters/ad-converters/ad9288.html Analog Devices AD9288] ([http://www.analog.com/media/en/technical-documentation/data-sheets/AD9288.pdf datasheet])
* 4x '''145 MHz FastFET Op Amp''': [http://www.analog.com/en/products/amplifiers/operational-amplifiers/jfet-input-amplifiers/ad8065.html Analog Devices AD8065] ([http://www.analog.com/media/en/technical-documentation/data-sheets/AD8065-KGD-CHIP.pdf datasheet])
* '''Crystal''': 24MHz
* '''Crystal''': 24MHz
* '''Probes''': ?
 
'''NXP 74HC4051D (upper/lower, CH1/CH2) pinout''':
<small>
<table><tr><td>
{{chip_16pin
|1=<span style="color:orange">(GND)</span> Y4
|2=<span style="color:orange">(GND)</span> Y6
|3=Z
|4=<span style="color:orange">(GND)</span> Y7
|5=<span style="color:orange">(GND)</span> Y5
|6=<span style="color:orange">(GND)</span> E#
|7=VEE
|8=GND
|9=S2 <span style="color:green">(FX2 PC4)</span>
|10=S1 <span style="color:green">(FX2 PC3)</span>
|11=S0 <span style="color:green">(FX2 PC2)</span>
|12=Y3
|13=Y0
|14=Y1
|15=Y2
|16=VCC
}}
</td><td>
{{chip_16pin
|1=<span style="color:orange">(GND)</span> Y4
|2=<span style="color:orange">(GND)</span> Y6
|3=Z
|4=<span style="color:orange">(GND)</span> Y7
|5=<span style="color:orange">(GND)</span> Y5
|6=<span style="color:orange">(GND)</span> E#
|7=VEE
|8=GND
|9=S2 <span style="color:darkcyan">(FX2 PC7)</span>
|10=S1 <span style="color:darkcyan">(FX2 PC6)</span>
|11=S0 <span style="color:darkcyan">(FX2 PC5)</span>
|12=Y3
|13=Y0
|14=Y1
|15=Y2
|16=VCC
}}
</td></tr></table>
</small>
 
{| border="0" style="font-size: smaller" class="alternategrey sortable sigroktable"
|-
!S2
!S1
!S0
!74HC4051D Mux
!VDIVs (vendor software)
|-
| 0 || 0 || 0 || Y0 to Z || 200mV
|-
| 0 || 0 || 1 || Y1 to Z || 500mV
|-
| 0 || 1 || 0 || Y2 to Z || 5V, 2V, 1V
|-
| 0 || 1 || 1 || Y3 to Z || 100mV, 50mV, 20mV
|}
 
'''Microchip 24LC02BI pinout''':
<small>
{{chip_8pin
|1=<span style="color:orange">(Low, but not GND)</span> A0
|2=<span style="color:orange">(GND)</span> A1
|3=<span style="color:orange">(GND)</span> A2
|4=VSS
|5=SDA <span style="color:purple">(FX2 SDA)</span>
|6=SCL <span style="color:purple">(FX2 SCL)</span>
|7=WP <span style="color:orange">(GND)</span>
|8=VCC
}}
</small>
 
'''Analog Devices ADS9288 pinout''':
{| border="0" style="font-size: smaller" class="alternategrey sortable sigroktable"
|-
!AD9288 pins
!Description
 
|-
| S1, S2
| S1=VCC, S2=GND. "Normal operation, data align disabled".
|-
| DFS
| Tied to GND. Data format select = "offset binary" (not "twos complement").
|-
| A<sub>IN</sub>A, A<sub>IN</sub>B
| Analog input channels.
 
|}
 
'''Cypress FX2 pinout''':
{| border="0" style="font-size: smaller" class="alternategrey sortable sigroktable"
|-
!FX2 pins
!Description
 
|-
| CTL2
| Connected to AD9288 ENC<sub>A</sub> and ENC<sub>B</sub> and FX2 IFCLK.
|-
| PB0-PB7
| Connected to AD9288 D0<sub>A</sub>-D7<sub>A</sub>.
|-
| PD0-PD7
| Connected to AD9288 D0<sub>B</sub>-D7<sub>B</sub>.
|-
| PA7
| 1kHz probe calibration pin.
|-
| PC0/PC1
| Dual-color (red/green) LED.
 
{| border="0" style="font-size: smaller" class="alternategrey sortable sigroktable"
|-
!PC1
!PC0
!LED
|-
| 0 || 0 || ?
|-
| 0 || 1 || green
|-
| 1 || 0 || red
|-
| 1 || 1 || off
|}
 
|}


== Photos ==
== Photos ==
Line 71: Line 202:
!Notes
!Notes
|-
|-
|Set CH0 voltage range ||0xE0 ||Possible values: 1,2,5,10 (5V, 2.5V, 1V, 500mV).
|Set CH0 voltage range || 0xE0 || Possible values: 1, 2, 5, 10 (5V, 2.5V, 1V, 500mV).
|-
|-
|Set CH1 voltage range ||0xE1 ||Possible values: 1,2,5,10 (5V, 2.5V, 1V, 500mV).
|Set CH1 voltage range || 0xE1 || Possible values: 1, 2, 5, 10 (5V, 2.5V, 1V, 500mV).
|-
|-
|Set sampling rate ||0xE2 ||Possible values: 48, 30, 24, 16, 8, 4, 1 (MHz) and 50,20,10 (*10kHz).
|Set sampling rate || 0xE2 || Possible values: 48, 30, 24, 16, 8, 4, 1 (MHz) and 50, 20, 10 (*10kHz).
|-
|-
|Trigger oscilloscope ||0xE3 ||Possible values: 1 == start sampling.
|Trigger oscilloscope || 0xE3 || Possible values: 1 == start sampling. 0 == ignored currently.
|-
|-
|Set number of channels ||0xE4 ||Possible values: 1, 2.
|Set number of channels || 0xE4 || Possible values: 1, 2.
|-
|-
|}
|}
Line 90: Line 221:


'''Note''': The firmware is '''not''' flashed into the device permanently! You only need to make it available in the usual place where [[libsigrok]] looks for firmware files, it will be used automatically (and "uploaded" to the Cypress FX2's SRAM every time you attach the device to a USB port).
'''Note''': The firmware is '''not''' flashed into the device permanently! You only need to make it available in the usual place where [[libsigrok]] looks for firmware files, it will be used automatically (and "uploaded" to the Cypress FX2's SRAM every time you attach the device to a USB port).
'''Note''': On Windows, you will have to [[Windows#Device_specific_USB_driver|assign the WinUSB driver via Zadig]] '''twice''': the first time for the initial USB VID/PID the device has when attaching it via USB (04b4:6022 or 04b5:6022, depending on which vendor driver is currently being used by the device), and a second time after the firmware has been uploaded to the device and the device has "renumerated" with a different VID/PID pair (1d50:608e).


== Resources ==
== Resources ==

Latest revision as of 13:48, 5 April 2020

Hantek 6022BE
Hantek 6022be mugshot.png
Status supported
Source code hantek-6xxx
Channels 2
Samplerate 48MHz
Analog bandwidth 20MHz
Vertical resolution 8bit
Triggers none (SW-only)
Input impedance 1MΩ‖25pF
Memory none
Display none
Connectivity USB
Website hantek.com

The Hantek 6022BE is a USB-based, 2-channel oscilloscope with an analog bandwidth of 20MS/s and 48MS/s sampling rate.

See Hantek 6022BE/Info for more details (such as lsusb -v output) about the device.

Hardware

NXP 74HC4051D (upper/lower, CH1/CH2) pinout:

(GND) Y4 1-   O -16 VCC
(GND) Y6 2- -15 Y2
Z 3- -14 Y1
(GND) Y7 4- -13 Y0
(GND) Y5 5- -12 Y3
(GND) E# 6- -11 S0 (FX2 PC2)
VEE 7- -10 S1 (FX2 PC3)
GND 8- -9 S2 (FX2 PC4)
(GND) Y4 1-   O -16 VCC
(GND) Y6 2- -15 Y2
Z 3- -14 Y1
(GND) Y7 4- -13 Y0
(GND) Y5 5- -12 Y3
(GND) E# 6- -11 S0 (FX2 PC5)
VEE 7- -10 S1 (FX2 PC6)
GND 8- -9 S2 (FX2 PC7)

S2 S1 S0 74HC4051D Mux VDIVs (vendor software)
0 0 0 Y0 to Z 200mV
0 0 1 Y1 to Z 500mV
0 1 0 Y2 to Z 5V, 2V, 1V
0 1 1 Y3 to Z 100mV, 50mV, 20mV

Microchip 24LC02BI pinout:

(Low, but not GND) A0 1-   O -8 VCC
(GND) A1 2- -7 WP (GND)
(GND) A2 3- -6 SCL (FX2 SCL)
VSS 4- -5 SDA (FX2 SDA)

Analog Devices ADS9288 pinout:

AD9288 pins Description
S1, S2 S1=VCC, S2=GND. "Normal operation, data align disabled".
DFS Tied to GND. Data format select = "offset binary" (not "twos complement").
AINA, AINB Analog input channels.

Cypress FX2 pinout:

FX2 pins Description
CTL2 Connected to AD9288 ENCA and ENCB and FX2 IFCLK.
PB0-PB7 Connected to AD9288 D0A-D7A.
PD0-PD7 Connected to AD9288 D0B-D7B.
PA7 1kHz probe calibration pin.
PC0/PC1 Dual-color (red/green) LED.
PC1 PC0 LED
0 0 ?
0 1 green
1 0 red
1 1 off

Photos

  • Box

  • Accessories

  • Probes

  • Device, top

  • Device, bottom

  • Device, connectors

  • Device, USB

  • PCB, top

  • PCB, bottom

  • Input stage

  • Cypress FX2LP

  • Microchip 24LC02BI

  • NXP 74HC4051D

  • AMS AMS1117

  • Mornsun A0505S-2WR

Another teardown:

  • Device, top

  • PCB, top

  • PCB, bottom

  • Feedback resistor selector

  • Cypress FX2LP

Protocol

Oscilloscope command bRequest value Notes
Set CH0 voltage range 0xE0 Possible values: 1, 2, 5, 10 (5V, 2.5V, 1V, 500mV).
Set CH1 voltage range 0xE1 Possible values: 1, 2, 5, 10 (5V, 2.5V, 1V, 500mV).
Set sampling rate 0xE2 Possible values: 48, 30, 24, 16, 8, 4, 1 (MHz) and 50, 20, 10 (*10kHz).
Trigger oscilloscope 0xE3 Possible values: 1 == start sampling. 0 == ignored currently.
Set number of channels 0xE4 Possible values: 1, 2.

Firmware

In order to use this device, the sigrok-firmware-fx2lafw (>= 0.1.4) firmware is required.

The firmware was originally written by Jochen Hoenicke (see README for details), thanks a lot!

Note: The firmware is not flashed into the device permanently! You only need to make it available in the usual place where libsigrok looks for firmware files, it will be used automatically (and "uploaded" to the Cypress FX2's SRAM every time you attach the device to a USB port).

Note: On Windows, you will have to assign the WinUSB driver via Zadig twice: the first time for the initial USB VID/PID the device has when attaching it via USB (04b4:6022 or 04b5:6022, depending on which vendor driver is currently being used by the device), and a second time after the firmware has been uploaded to the device and the device has "renumerated" with a different VID/PID pair (1d50:608e).

Resources

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