Difference between revisions of "Sysclk LWLA1016"
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== Protocol == | == Protocol == | ||
Reverse engineering of the vendor's custom protocol has begun. See [[Sysclk LWLA1016/Protocol]] for the findings gathered so far. | |||
== Resources == | == Resources == | ||
Revision as of 00:15, 17 January 2014
 | |
| Status | planned |
|---|---|
| Channels | 16 |
| Samplerate | 100MHz |
| Samplerate (state) | ? |
| Triggers | ? |
| Min/max voltage | ? |
| Threshold voltage | ? |
| Memory | 256Kbit/channel |
| Compression | ? |
| Website | taobao.com |
The Sysclk LWLA1016 is a USB-based, 16-channel logic analyzer with up to 100MHz sampling rate.
See Sysclk LWLA1016/Info for more details (such as lsusb -v output) about the device.
Hardware
TODO.
Photos
Device, front
Device, back
Device, open
PCB, top
PCB, bottom
Cypress FX2
ISSI 1
ISSI 2
ATMLH105
STC
LDOs
Input stage
Crystal
Protocol
Reverse engineering of the vendor's custom protocol has begun. See Sysclk LWLA1016/Protocol for the findings gathered so far.
Resources
TODO.