Difference between revisions of "Protocol decoder:Parallel"
Jump to navigation
Jump to search
Uwe Hermann (talk | contribs) (Created page with "{{Infobox protocol decoder | id = parallel | name = Parallel | description = Generic parallel synchronous bus | status = <span style="back...") |
(No difference)
|
Revision as of 13:14, 24 October 2013
![]() | |
Name | Parallel |
---|---|
Description | Generic parallel synchronous bus |
Status | supported |
License | GPLv2+ |
Source code | decoders/parallel |
Input | logic |
Output | parallel |
Probes | CLK |
Optional probes | D0-D63 |
Options | clock_edge, wordsize, endianness, format |
The parallel protocol decoder can decode synchronous parallel buses with various number of data bits/probes and one clock line.
Hardware
TODO.
Protocol
On either the falling or rising clock edge one or more data lines (D0 up to possibly D63, for example) are sampled, and the individual probe values are combined to a number that is shown.