Difference between revisions of "Protocol decoder:Spiflash"
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== Resources == | == Resources == | ||
* [http://www.macronix.com/en-us/Product/Pages/ProductDetail.aspx?PartNo=MX25L1605D Macronix MX25L1605D] ([ | * [http://www.macronix.com/en-us/Product/Pages/ProductDetail.aspx?PartNo=MX25L1605D Macronix MX25L1605D (dead link)] ([https://www.mxic.com.tw/Lists/Datasheet/Attachments/8554/MX25L1605D,%203V,%2016Mb,%20v1.5.pdf datasheet]) | ||
[[Category:Protocol decoder]] | [[Category:Protocol decoder]] | ||
[[Category:SPI]] | [[Category:SPI]] |
Revision as of 17:15, 26 April 2023
Name | SPI flash |
---|---|
Description | xx25 series SPI (NOR) flash chip protocol |
Status | supported |
License | GPLv2+ |
Source code | decoders/spiflash |
Input | spi |
Output | spiflash |
Probes | — |
Optional probes | — |
Options | — |
The spiflash protocol decoder supports the industry standard xx25 series SPI (NOR) flash chip protocol.
It is used (for example) in the Macronix MX25L1605D chip, and many others.
Hardware
Chip pinout
The Macronix MX25Lxx05D chips (and almost all SPI flash chips of the xx25 series) have the following pinout:
CS# | 1- | O | -8 | VCC |
SO | 2- | -7 | HOLD# | |
WP# | 3- | -6 | SCLK | |
GND | 4- | -5 | SI |
Macronix MX25L1605D in openbiosprog-spi
The spi/mx25l1605d directory in sigrok-dumps contains a set of example captures of a Macronix MX25L1605D (MX25L1605DPI-12G) SPI flash chip (16Mbit == 2Mbyte; NOR flash) that is probed, being written to, read, or erased.
The logic analyzer used was a ChronoVu LA8 (at 25MHz). It is probing the SPI chip in the openbiosprog-spi Open Hardware USB-based SPI chip programmer. The host software used is flashrom.
Probe setup:
Probe | MX25L1605D pin |
---|---|
0 (green) | CS# |
1 (orange) | SO/SIO1 (a.k.a MISO) |
2 (white) | SCLK |
3 (red) | SI/SIO0 (a.k.a MOSI) |
4 (gray) | WP#/ACC |
5 (brown) | HOLD# |
Photos:
Protocol
The xx25 series chips uses the standard SPI protocol and pins (MISO, MOSI, SCLK, CS#), with the additional (optional) HOLD# and WP#/ACC pins.
The host can send a large number of commands to the SPI chip (such as WREN, RDID, READ, SE, CE, PP, and many more). The commands have various length, and usually consist of one command ID byte, optional address bytes, one or more data/payload bytes, and so on (depending on the command).
See the chip datasheet for a detailed protocol/register/command description.